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1. 发明申请

WO2019115171A1 ELECTRIC DEVICE WITH TWO OR MORE CHIP COMPONENTS 审中-公开
公开(公告)号：WO2019115171A1
公开(公告)日：2019-06-20
申请号：PCT/EP2018/081804
申请日：2018-11-19
申请人： RF360 EUROPE GMBH
发明人： HO, Shook Foong (Jessica) , HOO, See Jin (Desmond)
IPC分类号： H01L25/065 , H03H9/05 , H01L23/13 , H01L25/16 , H01L25/18
CPC分类号： H01L25/0657 , H01L23/13 , H01L23/5384 , H01L24/13 , H01L24/14 , H01L24/16 , H01L25/0652 , H01L25/16 , H01L25/18 , H01L2224/131 , H01L2224/13147 , H01L2224/14135 , H01L2224/16227 , H01L2225/06517 , H01L2225/06568 , H01L2924/14 , H01L2924/1421 , H01L2924/1433 , H01L2924/1461 , H01L2924/15153 , H01L2924/15192 , H01L2924/15313 , H01L2924/15787 , H01L2924/1579 , H01L2924/19103 , H01L2924/19104 , H01L2924/351 , H03H9/0571 , H03H9/0576 , H01L2924/014 , H01L2924/00014
摘要： An electric device comprises a substrate (SU) as a carrier and at least two chip components mounted thereto. In the top surface of the substrate a recess (RC) is formed. One or more chip component (BC) is mounted to the bottom surface of the recess referred to as buried chip component. One or more top chip component (TC) is mounted to the top surface of the substrate to cover at least to some extend the recess and the buried chip component. Device pads (PD) are arranged on the bottom surface of the substrate. Each of them is electrically interconnected with one or both of the chip components.

2. 发明申请

WO2019055438A1 VERTICAL SWITCHED FILTER BANK 审中-公开
公开(公告)号：WO2019055438A1
公开(公告)日：2019-03-21
申请号：PCT/US2018/050534
申请日：2018-09-11
申请人： KNOWLES CAZENOVIA, INC.
发明人： BATES, David
IPC分类号： H05K1/14 , H05K3/46 , H01L23/498 , H01L23/538 , H01L23/66 , H05K1/18 , H05K1/02 , H05K3/36 , H01L25/11
CPC分类号： H01P5/16 , H01L23/5387 , H01L23/552 , H01L23/66 , H01L25/0655 , H01L25/105 , H01L2223/6627 , H01L2223/6683 , H01L2224/16227 , H01L2225/1047 , H01L2225/107 , H01L2924/15313 , H01L2924/3025 , H01L2924/351 , H01P1/20 , H01P3/081 , H01P11/003 , H05K1/0216 , H05K1/0243 , H05K1/028 , H05K1/115 , H05K1/144 , H05K1/147 , H05K1/189 , H05K3/0011 , H05K3/22 , H05K3/32 , H05K3/361 , H05K3/363 , H05K3/4691 , H05K2201/041 , H05K2201/042 , H05K2201/058 , H05K2201/10053 , H05K2201/1006
摘要： A method for manufacturing a microwave or radio frequency (RF) device (300) including stacked printed circuit boards (PCBs) (102, 152) mounted on a flexible PCB (206) having at least one ground plane and signal terminals is disclosed. Each of the stacked PCBs includes through-holes (120) the sidewalls of which are coated with a conductive material. The first PCB and the second PCB are bonded to the flexible PCB, the first PCB spaced apart from the second PCB exposing a bend portion of the flexible PCB. Microwave components (110, 112, 154, 156) are mounted on the flexible PCB within the through-holes, such that signal terminals of the components bond to respective signal terminals of the flexible PCB. A conductive cover (132, 228) is mounted on the PCBs such that the cover is in electrical contact with the ground plane of the flexible PCB through the conductive material, forming shielding cavities around the components. The flexible PCB is folded such that the cover (132) of one PCB (102) faces the cover (228) of the second PCB (152). The flexible PCB includes striplines or microstrips that carry RF or microwave signals to the signal terminals.

3. 发明申请

WO2017112245A1 SOLID STATE DEVICE MINIATURIZATION 审中-公开
标题翻译：固态器件的小型化
公开(公告)号：WO2017112245A1
公开(公告)日：2017-06-29
申请号：PCT/US2016/063293
申请日：2016-11-22
申请人： INTEL CORPORATION
发明人： MELONE, Mark , SHOJAIE, Saeed
IPC分类号： H01L23/498 , H01L23/13 , H01L23/31 , H01L23/24 , H01L25/065 , H01L25/18 , H01L23/00
CPC分类号： H01L25/162 , G06F1/1658 , H01L21/565 , H01L21/76802 , H01L21/76877 , H01L23/3107 , H01L23/3121 , H01L23/481 , H01L23/49833 , H01L23/49838 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0652 , H01L25/16 , H01L25/50 , H01L2224/16227 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/1306 , H01L2924/14 , H01L2924/1433 , H01L2924/1434 , H01L2924/1436 , H01L2924/15313 , H01L2924/15333 , H01L2924/157 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2924/00014 , H01L2924/00012
摘要： One or more example embodiments of miniaturized electric devices are disclosed. In some example embodiments, the electric device includes a first thin substrate layer and a second thin substrate layer positioned above the first thin substrate layer. The electric device further includes one or more components electrically coupled to the first thin substrate layer. An overmold compound is deposited covering the one or more components between the first thin substrate and the second thin substrate. The electric device further includes one or more through mold vias that electrically and communicatively connect the first thin substrate layer and the second thin substrate layer.
摘要翻译：公开了小型化电设备的一个或多个示例实施例。在一些示例实施例中，电气装置包括第一薄基底层和位于第一薄基底层上方的第二薄基底层。电装置还包括电耦合到第一薄基底层的一个或多个部件。沉积包覆第一薄基板和第二薄基板之间的一个或多个部件的包覆模制化合物。该电子器件还包括一个或多个通孔，该通孔电气且通信地连接第一薄基片层和第二薄基片层。

4. 发明申请

WO2017111903A1 INTEGRATING SYSTEM IN PACKAGE (SIP) WITH INPUT/OUTPUT (IO) BOARD FOR PLATFORM MINIATURIZATION 审中-公开
标题翻译：集成系统在包（SIP）与输入/输出（IO）板用于平台小型化
公开(公告)号：WO2017111903A1
公开(公告)日：2017-06-29
申请号：PCT/US2015/067085
申请日：2015-12-21
申请人： INTEL CORPORATION
发明人： GOH, Eng Huat , HOE, Wee , YONG, Khang Choong , OOI, Ping Ping
IPC分类号： H01L25/18 , H01L25/065 , H01L23/48
CPC分类号： H01L23/48 , H01L25/065 , H01L25/18 , H01L2924/1432 , H01L2924/15311 , H01L2924/15313 , H01L2924/19042 , H01L2924/19106
摘要： Methods and apparatus relating to integrating System in Package (SiP) with Input/Output (IO) board for platform miniaturization are described. In an embodiment, a SiP board includes a plurality of logic components. An IO board is coupled to the SiP board via a grid array. The plurality of logic components is provided on both sides of the SiP board and one or more of the plurality of logic components are to positioned in an opening in the IO board. Other embodiments are also disclosed and claimed.
摘要翻译：描述了与用于平台小型化的系统级封装（SiP）与输入/输出（IO）板集成有关的方法和设备。在一个实施例中，SiP板包括多个逻辑组件。 IO板通过网格阵列耦合到SiP板。多个逻辑部件设置在SiP板的两侧，并且多个逻辑部件中的一个或多个逻辑部件设置在IO板的开口中。其他实施例也被公开和要求保护。

5. 发明申请

WO2017012251A1 一种环境传感器审中-公开
公开(公告)号：WO2017012251A1
公开(公告)日：2017-01-26
申请号：PCT/CN2015/096921
申请日：2015-12-10
申请人：歌尔声学股份有限公司
发明人：张俊德
IPC分类号： G01D5/12 , H01L23/31
CPC分类号： G01D5/12 , H01L23/31 , H01L2224/16146 , H01L2224/16235 , H01L2224/17181 , H01L2224/32225 , H01L2224/73204 , H01L2924/15313 , H01L2924/16151 , H01L2924/1815
摘要：一种环境传感器，包括外部封装以及位于外部封装内部的ASIC芯片（3）、传感器芯片（4），外部封装包括电路板（1）；ASIC芯片（3）通过植锡球（5）焊接在电路板（1）上，且ASIC芯片（3）的输出端与设置在电路板（1）上的ASIC输出端导线（7）电连接；传感器芯片（4）通过植锡球（5）焊接在ASIC芯片（3）的上端，其中，传感器芯片（4）的输出端与ASIC芯片（3）的输入端电连接在一起；外部封装上还设置有将传感器芯片（4）暴露在外界环境中的通道。通过将传感器芯片（4）、ASIC芯片（3）分布在外部封装的竖直方向上，节省了外部封装空间，使产品小型化。

6. 发明申请

WO2016187022A1 CAVITY FORMATION IN SEMICONDUCTOR DEVICES 审中-公开
标题翻译：半导体器件中的形成
公开(公告)号：WO2016187022A1
公开(公告)日：2016-11-24
申请号：PCT/US2016/032404
申请日：2016-05-13
申请人： SKYWORKS SOLUTIONS, INC.
发明人： PETZOLD, David T. , WHITEFIELD, David Scott
IPC分类号： H01L29/66 , H01L29/78 , H01L21/768 , H04B1/38
CPC分类号： H01L23/562 , H01L21/30604 , H01L21/6835 , H01L21/76251 , H01L21/764 , H01L21/76802 , H01L21/76877 , H01L21/76895 , H01L21/76898 , H01L21/84 , H01L23/3121 , H01L23/5283 , H01L23/535 , H01L23/66 , H01L24/05 , H01L24/06 , H01L24/48 , H01L24/73 , H01L25/16 , H01L27/1203 , H01L27/20 , H01L28/10 , H01L29/0649 , H01L29/66772 , H01L29/78 , H01L29/786 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68359 , H01L2221/68368 , H01L2223/6677 , H01L2224/03 , H01L2224/03002 , H01L2224/04042 , H01L2224/05554 , H01L2224/06135 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/94 , H01L2924/00014 , H01L2924/1306 , H01L2924/1421 , H01L2924/15192 , H01L2924/15313 , H03H9/02566 , H03H9/24 , H04B1/40 , H04B1/44 , H01L2224/45099
摘要： Fabricating of radio-frequency (RF) devices involve providing a field-effect transistor (FET) formed over an oxide layer formed on a semiconductor substrate, removing at least part of the semiconductor substrate to expose at least a portion of a backside of the oxide layer, applying a sacrificial material to the backside of the oxide layer, applying an interface material to at least a portion of the backside of the oxide layer, the interface material at least partially covering the sacrificial material, and removing at least a portion of the sacrificial material to form a cavity at least partially covered by the interface layer.
摘要翻译：射频（RF）器件的制造涉及提供在形成于半导体衬底上的氧化物层上形成的场效应晶体管（FET），去除半导体衬底的至少一部分以暴露氧化物背面的至少一部分将牺牲材料施加到氧化物层的背面，将界面材料施加到氧化物层的背侧的至少一部分，所述界面材料至少部分地覆盖牺牲材料，以及去除所述氧化物层的至少一部分牺牲材料以形成至少部分被界面层覆盖的空腔。

7. 发明申请

WO2016181706A1 電子回路モジュール审中-公开
标题翻译：电子电路模块
公开(公告)号：WO2016181706A1
公开(公告)日：2016-11-17
申请号：PCT/JP2016/058761
申请日：2016-03-18
申请人：株式会社村田製作所
发明人：木戸口　光昭
IPC分类号： H05K9/00 , H01L23/00 , H01L23/28
CPC分类号： H05K1/182 , H01L23/295 , H01L23/3121 , H01L23/544 , H01L23/552 , H01L2223/54406 , H01L2223/54433 , H01L2223/54486 , H01L2224/16227 , H01L2924/15313 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H05K1/0266 , H05K1/0298 , H05K1/0306 , H05K1/0366 , H05K1/09 , H05K1/115 , H05K3/284 , H05K2201/0715 , H05K2201/09936
摘要：電子回路モジュール（１００）は、回路基板（１）と、電子部品（４、５）と、埋設層（６）と、導電性膜（７）とを備えている。回路基板（１）は、第１の電極（２Ａないし２Ｄ）が設けられた第１の主面（１Ａ）と、接地用電極（３Ａ、３Ｄ）を含む第２の電極（３Ａないし３Ｄ）が設けられた第２の主面（１Ｂ）と、両主面を接続する側面（１Ｃ）とを有している。電子部品（４、５）は、第１の電極（２Ａないし２Ｄ）に接続されている。埋設層（６）は、回路基板（１）の第１の主面（１Ａ）に、電子部品（４、５）を埋設して設けられている。導電性膜（７）は、接地用電極（３Ａ、３Ｄ）に接続されている。埋設層（６）の外表面は、埋設層（６）の外表面に対して凸状となるマーキング（８Ａ、８Ｂ）を有している。導電性膜（７）は、埋設層（６）の外表面を被覆して形成されている。
摘要翻译：该电子电路模块（100）具备电路基板（1），电子部件（4,5），嵌入层（6）和导电膜（7）。电路板（1）具有设置有第一电极（2A-2D）的第一主表面（1A），第二主面（1B），第二电极（3A-3D）包括接地电极（3A，3D））和两个主表面连接的侧表面（1C）。电子部件（4,5）连接到第一电极（2A-2D）。嵌入层（6）被提供到电路板（1）的第一主表面（1A），使得电子部件（4,5）嵌入其中。导电膜（7）连接到接地电极（3A，3D）。嵌入层（6）的外表面具有相对于嵌入层（6）的外表面凸出的标记（8A，8B）。导电膜（7）形成为覆盖嵌入层（6）的外表面。

8. 发明申请

WO2016104023A1 発光装置审中-公开
标题翻译：发光装置
公开(公告)号：WO2016104023A1
公开(公告)日：2016-06-30
申请号：PCT/JP2015/083028
申请日：2015-11-25
申请人：株式会社Nano Wave
发明人：今井　勇次
IPC分类号： H01L33/48
CPC分类号： H01L33/48 , H01L2224/48091 , H01L2224/48227 , H01L2924/15192 , H01L2924/15313 , H01L2924/181 , H01L2924/00014 , H01L2924/00012
摘要：　使用時に、より的確に平均演色評価数（Ｒａ）を大きくする。複数種類のＬＥＤ素子がＬＥＤ実装基板に直接的に実装された発光装置において、複数種類のＬＥＤ素子は青色ＬＥＤ素子と赤色ＬＥＤ素子を含み、青色ＬＥＤ素子の常温（２５℃）におけるピーク波長の発光強度をＢｎ２５、青色ＬＥＤ素子の使用温度（８０℃）におけるピーク波長の発光強度をＢｎ８０、赤色ＬＥＤ素子の常温（２５℃）におけるピーク波長の発光強度をＲｎ２５、赤色ＬＥＤ素子の使用温度（８０℃）におけるピーク波長の発光強度をＲｎ８０としたとき、Ｒｎ２５／Ｂｎ２５＜Ｒｎ８０／Ｂｎ８０を満たし、かつ、３．０≦Ｒｎ２５／Ｂｎ２５、及び、３．３≦Ｒｎ８０／Ｂｎ８０を満たすようにした。
摘要翻译：本发明的目的是更准确地提高使用期间的平均显色指数（Ra）。提供了一种发光装置，其中多个类型的LED元件直接安装到LED安装基板。多个类型的LED元件包括蓝色LED元件和红色LED元件，并且被配置为使得当Bn25表示在室温（25℃）下蓝色LED元件的峰值波长的发光强度时，Bn80表示在使用温度（80℃）下，蓝色LED元件的峰值波长的发光强度Rn25表示红外LED元件在室温（25℃）下的峰值波长的发光强度，Rn80 表示使用温度（80℃）时的红色LED元件的峰值波长的发光强度，Rn25 / Bn25

9. 发明申请

WO2016007120A1 PACKAGE-ON-PACKAGE STACKED MICROELECTRONIC STRUCTURES 审中-公开
标题翻译：包装封装微电子结构
公开(公告)号：WO2016007120A1
公开(公告)日：2016-01-14
申请号：PCT/US2014/045560
申请日：2014-07-07
申请人： INTEL IP CORPORATION
发明人： MEYER, Thorsten , OFNER, Gerald
IPC分类号： H01L25/065 , H01L23/48
CPC分类号： H01L25/0657 , H01L21/54 , H01L23/3135 , H01L23/3142 , H01L23/3178 , H01L23/49811 , H01L23/49838 , H01L24/16 , H01L25/065 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/131 , H01L2224/1329 , H01L2224/133 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/81815 , H01L2224/92125 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06544 , H01L2225/06558 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/15192 , H01L2924/15311 , H01L2924/15313 , H01L2924/15321 , H01L2924/1533 , H01L2924/15331 , H05K2201/10515 , H01L2924/00014 , H01L2924/014
摘要： A package-on-package stacked microelectronic structure comprising a pair of microelectronic packages attached to one another in a flipped configuration. In one embodiment, the package-on-package stacked microelectronic structure may comprise a first and a second microelectronic package, each comprising a substrate having at least one package connection bond pad formed on a first surface of each microelectronic package substrate, and each having at least one microelectronic device electrically connected to the each microelectronic package substrate first surface, wherein the first and the second microelectronic package are connected to one another with at least one package-to-package interconnection structure extending between the first microelectronic package connection bond pad and the second microelectronic package connection bond pad.
摘要翻译：一种封装在一起的堆叠微电子结构，其包括以翻转配置彼此附接的一对微电子封装。在一个实施例中，封装在封装上的堆叠微电子结构可以包括第一和第二微电子封装，每个包括基板，其具有形成在每个微电子封装基板的第一表面上的至少一个封装连接焊盘，电连接到每个微电子封装衬底第一表面的至少一个微电子器件，其中第一和第二微电子封装彼此连接，至少一个封装到封装互连结构在第一微电子封装连接焊盘和第二微电子封装连接焊盘。

10. 发明申请

WO2015175517A1 DEVICES AND METHODS FOR PROCESSING SINGULATED RADIO-FREQUENCY UNITS 审中-公开
标题翻译：用于处理单个无线电频率单元的设备和方法
公开(公告)号：WO2015175517A1
公开(公告)日：2015-11-19
申请号：PCT/US2015/030348
申请日：2015-05-12
申请人： SKYWORKS SOLUTIONS, INC.
发明人： READ, Matthew Sean
IPC分类号： H01L23/12
CPC分类号： H01L24/97 , H01L21/561 , H01L21/67132 , H01L21/67259 , H01L21/6838 , H01L23/3121 , H01L23/552 , H01L23/66 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/95 , H01L25/0652 , H01L25/0655 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/1421 , H01L2924/15311 , H01L2924/15313 , H01L2924/181 , H01L2924/00012 , H01L2224/83 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Devices and methods for processing singulated radio-frequency (RF) units. In some embodiments, a device for processing singulated RF packages can include a plate having a plurality of apertures. Each aperture can be dimensioned to receive and position a singulated RF package to thereby facilitate processing of the singulated RF packages positioned in their respective apertures. In some embodiments, such a device can be utilized to batch process high volume of RF packages as if the RF packages are still in a panel format.
摘要翻译：用于处理单个射频（RF）单元的装置和方法。在一些实施例中，用于处理单个RF封装的器件可以包括具有多个孔的板。每个孔可以被设计成接收和定位单个RF封装，从而便于处理位于其相应孔中的单个RF封装。在一些实施例中，这样的设备可以用于批量处理大量的RF封装，就好像RF封装仍然是面板格式。

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