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1. 发明申请

WO2007027880A3 MICROELECTRONIC IMAGING UNITS AND METHODS OF MANUFACTURING MICROELECTRONIC IMAGING UNITS AT THE WAFER LEVEL 审中-公开
标题翻译：微电子成像单元及其制造方法微波成像单位在水平
公开(公告)号：WO2007027880A3
公开(公告)日：2008-01-17
申请号：PCT/US2006034011
申请日：2006-08-31
申请人： MICRON TECHNOLOGY INC , OLIVER STEVEN D , VELICKY LU , HIATT WILLIAM M , HEMBREE DAVID R , TUTTLE MARK E , RIGG SIDNEY , WARK JAMES , FARNWORTH WARREN M , KIRBY KYLE
发明人： OLIVER STEVEN D , VELICKY LU , HIATT WILLIAM M , HEMBREE DAVID R , TUTTLE MARK E , RIGG SIDNEY , WARK JAMES , FARNWORTH WARREN M , KIRBY KYLE
IPC分类号： H01L27/146
CPC分类号： H01L21/00 , H01L21/76898 , H01L23/552 , H01L27/14609 , H01L27/14618 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14632 , H01L27/14636 , H01L27/14685 , H01L27/14687 , H01L2924/0002 , H01L2924/00
摘要： Microelectronic imaging units and methods for manufacturing a plurality of imaging units at the wafer level are disclosed herein. In one embodiment, a method for manufacturing a plurality of imaging units includes providing an imager workpiece having a plurality of imaging dies including integrated circuits, external contacts electrically coupled to the integrated circuits, and image sensors operably coupled to the integrated circuits. The individual image sensors include at least one dark current pixel at a perimeter portion of the image sensor. The method includes depositing a cover layer onto the workpiece and over the image sensors. The method further includes patterning and selectively developing the cover layer to form discrete volumes of cover layer material over corresponding image sensors. The discrete volumes of cover layer material have sidewalls aligned with an inboard edge of the individual dark current pixels such that the dark current pixels are not covered by the discrete volumes.
摘要翻译：本文公开了用于在晶片级制造多个成像单元的微电子成像单元和方法。在一个实施例中，制造多个成像单元的方法包括提供具有多个成像管芯的成像工件，所述成像管芯包括集成电路，电耦合到集成电路的外部触点以及可操作地耦合到集成电路的图像传感器。各个图像传感器包括在图像传感器的周边部分处的至少一个暗电流像素。该方法包括将覆盖层沉积在工件上并在图像传感器上方。该方法还包括图案化和选择性地显影覆盖层以在对应的图像传感器上形成分离体积的覆盖层材料。覆盖层材料的离散体积具有与各个暗电流像素的内侧边缘对准的侧壁，使得暗电流像素不被离散体积覆盖。

2. 发明申请

WO2006124295A2 BACKSIDE METHOD AND SYSTEM FOR FABRICATING SEMICONDUCTOR COMPONENTS WITH CONDUCTIVE INTERCONNECTS 审中-公开
标题翻译：用于制造具有导电互连的半导体元件的背面方法和系统
公开(公告)号：WO2006124295A2
公开(公告)日：2006-11-23
申请号：PCT/US2006017036
申请日：2006-05-04
申请人： MICRON TECHNOLOGY INC , WOOD ALAN G , HIATT WILLIAM M , HEMBREE DAVID R
发明人： WOOD ALAN G , HIATT WILLIAM M , HEMBREE DAVID R
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L21/76898 , H01L21/4885 , H01L21/6835 , H01L21/6836 , H01L23/3114 , H01L23/481 , H01L23/4951 , H01L23/4985 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/50 , H01L24/78 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/86 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05556 , H01L2224/05571 , H01L2224/06102 , H01L2224/06136 , H01L2224/11003 , H01L2224/1131 , H01L2224/1132 , H01L2224/11334 , H01L2224/1134 , H01L2224/114 , H01L2224/1147 , H01L2224/116 , H01L2224/13099 , H01L2224/131 , H01L2224/1319 , H01L2224/2518 , H01L2224/45015 , H01L2224/451 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/4813 , H01L2224/4824 , H01L2224/4845 , H01L2224/48465 , H01L2224/48599 , H01L2224/48699 , H01L2224/48799 , H01L2224/78301 , H01L2224/8121 , H01L2224/81815 , H01L2224/85001 , H01L2224/851 , H01L2224/85203 , H01L2224/85205 , H01L2224/85207 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12044 , H01L2924/14 , H01L2924/19042 , Y10T29/53187 , Y10T29/53209 , H01L2924/00 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076 , H01L2224/83851 , H01L2224/05552
摘要： A backside method for fabricating a semiconductor component (50) with a conductive interconnect (44) includes the step of providing a semiconductor substrate (12) having a circuit side (14), a backside (16), and a substrate contact (18) on the circuit side (14). The method also includes the steps of forming a substrate opening (30) from the backside (16) to the substrate contact (18), and then bonding the conductive interconnect (44) to an inner surface (32) of the substrate contact (18). A system (62) for performing the method includes the semiconductor substrate (12), a thinning system (64) for thinning the semiconductor substrate (12), an etching system (66A) for forming the substrate opening (30), and a bonding system (38) for bonding the conductive interconnect (44) to the substrate contact (18). The semiconductor component (50) can be used to form module components (98), underfilled components (106), stacked components (116), and image sensor semiconductor components (50IS).
摘要翻译：用于制造具有导电互连（44）的半导体部件（50）的背面方法包括提供具有电路侧（14），背面（16）和衬底接触（18）的半导体衬底（12）的步骤，在电路侧（14）上。该方法还包括以下步骤：从背面（16）形成衬底开口（30）到衬底触点（18），然后将导电互连（44）接合到衬底触点（18）的内表面（32））。用于执行该方法的系统（62）包括半导体衬底（12），用于使半导体衬底（12）变薄的变薄系统（64），用于形成衬底开口（30）的蚀刻系统（66A）系统（38），用于将导电互连（44）接合到衬底触点（18）。半导体部件（50）可以用于形成模块部件（98），未充满部件（106），堆叠部件（116）和图像传感器半导体部件（50IS）。

3. 发明申请

WO2006028715A3 SELECTIVE NICKEL PLATING OF ALUMINIUM, COPPER AND TUNGSTEN STRUCTURES 审中-公开
标题翻译：选择性镀镍铝，铜和钨结构
公开(公告)号：WO2006028715A3
公开(公告)日：2007-09-07
申请号：PCT/US2005030228
申请日：2005-08-25
申请人： MICRON TECHNOLOGY INC , AKRAM SALMAN , WARK JAMES M , HIATT WILLIAM M
发明人： AKRAM SALMAN , WARK JAMES M , HIATT WILLIAM M
IPC分类号： C23C18/16 , C23C18/18 , C23C18/32 , C23C18/34 , H01L21/288 , H01L21/768
CPC分类号： H01L21/76879 , C23C18/1607 , C23C18/1637 , C23C18/1831 , C23C18/1834 , C23C18/34 , C23C18/36 , H01L21/288 , H01L21/76898 , H01L2924/00013 , Y10T428/12528 , Y10T428/24917 , H01L2224/29099
摘要： A method of selectively plating nickel on an intermediate semiconductor device structure. The method comprises providing an intermediate semiconductor device structure having at least one aluminum or copper structure and at least one tungsten structure. One of the aluminum or copper structure and the tungsten structure is nickel plated while the other remains unplated. The aluminum or copper structure or the tungsten structure may first be activated toward nickel plating. The activated aluminum or copper structure or the activated tungsten structure may then be nickel plated by immersing the intermediate semiconductor device structure in an electroless nickel plating solution. The unplated aluminum or copper structure or the unplated tungsten structure may subsequently be nickel plated by activating the unplated structure and nickel plating the activated structure. A method of simultaneously plating the aluminum or copper structure and the tungsten structure with nickel is also disclosed, as is an intermediate semiconductor device structure.
摘要翻译：在中间半导体器件结构上选择性镀镍的方法。该方法包括提供具有至少一个铝或铜结构和至少一个钨结构的中间半导体器件结构。铝或铜结构中的一个和钨结构是镀镍的，而另一个保持不镀。可以首先将铝或铜结构或钨结构活化成镀镍。然后可以通过将中间半导体器件结构浸入无电镀镍溶液中来将活化的铝或铜结构或活化的钨结构镀镍。随后可以通过激活未镀层的结构和镀镍活化的结构来将未镀覆的铝或铜结构或未镀覆的钨结构镀镍。还公开了一种用镍同时电镀铝或铜结构和钨结构的方法，以及中间半导体器件结构。

4. 发明申请

WO2004043680A3 PROGRAMMABLE MATERIAL CONSOLIDATION SYSTEMS AND METHODS 审中-公开
标题翻译：可编程材料综合系统和方法
公开(公告)号：WO2004043680A3
公开(公告)日：2004-09-23
申请号：PCT/US0336745
申请日：2003-11-11
申请人： MICRON TECHNOLOGY INC
发明人： FARNWORTH WARREN M , HIATT WILLIAM M , HEMBREE DAVID R , BENSON PETER A , AHMAD SYED SAJID , HESS MICHAEL E
IPC分类号： B29C67/00
CPC分类号： B29C64/35 , B29C64/135 , B33Y30/00 , B33Y40/00 , B33Y50/02
摘要： A programmed material consolidation apparatus includes at least one fabrication site and a material consolidation system (200) associated with the at least one fabrication site. The at least one fabrication site may be configured to receive one or more fabrication substrates, such as semiconductor substrates. A machine vision system with a translatable or locationally fixed camera may be associated with the at least one fabrication site and the material consolidation system. A cleaning component may also be associated with the at least one fabrication site. The cleaning component may share one or more elements with the at least one fabrication site, or may be separate therefrom. The programmed material consolidation apparatus may also include a substrate handling system, which places fabrication substrates at appropriate locations of the programmed material consolidation apparatus.
摘要翻译：编程材料合并装置包括与所述至少一个制造部位相关联的至少一个制造部位和材料固结系统（200）。至少一个制造位置可以被配置为接收一个或多个制造衬底，例如半导体衬底。具有可移动或位置固定的照相机的机器视觉系统可以与至少一个制造场所和材料合并系统相关联。清洁部件也可以与至少一个制造部位相关联。清洁部件可以与至少一个制造部位共享一个或多个元件，或者可以与其分开。编程材料合并装置还可以包括基板处理系统，其将制造基板放置在编程材料固结装置的适当位置。

5. 发明申请

WO2004112137A3 IMAGER WITH TUNED COLOR FILTER 审中-公开
标题翻译：具有调色彩过滤器的图像
公开(公告)号：WO2004112137A3
公开(公告)日：2005-04-14
申请号：PCT/US2004017714
申请日：2004-06-04
申请人： MICRON TECHNOLOGY INC
发明人： HIATT WILLIAM M , BOETTIGER ULRICH C , MCKEE JEFFREY A
IPC分类号： G02B5/20 , H01L27/14 , H04N5/369 , H04N9/04 , H04N9/083 , H01L27/146
CPC分类号： H01L27/14685 , H01L27/14621 , H01L27/14625 , H04N5/335 , H04N9/045
摘要： An optimized color filter array is formed in, above or below a one or more damascene layers. The color filter array includes filter regions which are configured to optimize the combined optical properties of the layers of the device to maximize the intensity of the particular wavelength of light incident to a respective underlying photodiode.
摘要翻译：在一个或多个镶嵌层的上方或下方形成优化的滤色器阵列。滤色器阵列包括滤波器区域，其被配置为优化器件的层的组合光学性质，以使入射到相应的下面光电二极管的光的特定波长的强度最大化。

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