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    • 1. 发明申请
    • REWRITABLE MEMORY DEVICE WITH MULTI-LEVEL, WRITE-ONCE MEMORY CELLS
    • 具有多级一体化存储器单元的可恢复存储器件
    • WO2011078917A1
    • 2011-06-30
    • PCT/US2010/055547
    • 2010-11-05
    • SANDISK CORPORATIONSCHEUERLEIN, Roy, E.FASOLI, Luca
    • SCHEUERLEIN, Roy, E.FASOLI, Luca
    • G11C11/56G11C16/34G11C17/16
    • G11C11/5692G11C16/349G11C17/16G11C2211/5641G11C2211/5646
    • The embodiments described herein are directed to a memory device with multi level, write-once memory cells. In one embodiment, a memory device has a memory array comprising a plurality of multi-level write-once memory cells, wherein each memory cell is programmable to one of a plurality of resistivity levels. The memory device also contains circuitry configured to select a group of memory cells from the memory array, and read a set of flag bits associated with the group of memory cells. The set of flag bits indicate a number of times the group of memory cells has been written to. The circuitry is also configured to select a threshold read level appropriate for the number of times the group of memory cells has been written to, and for each memory cell in the group, read the memory cell as an unprogrammed single-bit memory cell or as a programmed single-bit memory cell based on the selected threshold read level.
    • 这里描述的实施例涉及具有多级,一次写入存储器单元的存储器件。 在一个实施例中,存储器装置具有包括多个多级一次写入存储器单元的存储器阵列,其中每个存储器单元可编程为多个电阻率水平中的一个。 存储器件还包含被配置为从存储器阵列中选择一组存储器单元的电路,并且读取与该组存储器单元相关联的一组标志位。 该组标志位指示存储器单元组被写入的次数。 电路还被配置为选择适合于已经写入存储器单元组的次数的阈值读取电平,并且对于组中的每个存储器单元,读取作为未编程的单位存储器单元的存储器单元或者作为 基于所选择的阈值读取电平的编程的单位存储器单元。