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1. 发明申请

WO2014142075A1 半導体装置审中-公开
标题翻译：半导体器件
公开(公告)号：WO2014142075A1
公开(公告)日：2014-09-18
申请号：PCT/JP2014/056185
申请日：2014-03-10
申请人：ピーエスフォールクスコエスエイアールエル , 片桐光昭 , 長谷川優 , 伊佐聡
发明人：片桐　光昭 , 長谷川　優 , 伊佐　聡
IPC分类号： H01L21/60 , H01L21/3205 , H01L21/768 , H01L21/822 , H01L23/12 , H01L23/522 , H01L27/04
CPC分类号： H01L24/17 , H01L21/561 , H01L22/32 , H01L23/12 , H01L23/3107 , H01L23/3128 , H01L23/481 , H01L23/49816 , H01L23/49838 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L2224/0235 , H01L2224/02375 , H01L2224/0345 , H01L2224/03912 , H01L2224/0392 , H01L2224/0401 , H01L2224/05014 , H01L2224/05015 , H01L2224/05025 , H01L2224/05166 , H01L2224/05548 , H01L2224/05554 , H01L2224/05647 , H01L2224/0603 , H01L2224/06051 , H01L2224/06102 , H01L2224/11462 , H01L2224/11472 , H01L2224/11849 , H01L2224/13006 , H01L2224/13007 , H01L2224/13013 , H01L2224/13014 , H01L2224/13017 , H01L2224/13018 , H01L2224/13021 , H01L2224/13024 , H01L2224/13025 , H01L2224/13028 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/14051 , H01L2224/1411 , H01L2224/14131 , H01L2224/14135 , H01L2224/14136 , H01L2224/14177 , H01L2224/14181 , H01L2224/14515 , H01L2224/16145 , H01L2224/16146 , H01L2224/16148 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/17181 , H01L2224/17517 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/81193 , H01L2224/81203 , H01L2224/81801 , H01L2224/83102 , H01L2224/83862 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06596 , H01L2924/15311 , H01L2924/3011 , H01L2924/3511 , H05K1/025 , H05K1/141 , H05K1/185 , H05K2201/10734 , H01L2224/81 , H01L2224/83 , H01L2924/00012 , H01L2924/00014 , H01L2224/11 , H01L2924/014 , H01L2924/00
摘要：【課題】半導体チップ内に設けられた所定の配線のインピーダンスを低下させる。【解決手段】複数のパッド電極１１０ａ，１１０ｃを有する半導体チップ１００と、半導体チップ１００上に設けられた配線構造体である配線基板２００とを備える。配線基板２００は、複数の外部端子２６０と、外部端子２６０とパッド電極１１０ａとをそれぞれ電気的に接続する複数の配線パターン２４０と、配線基板２００内において外部端子２６０のいずれにも電気的に接続されることなく、複数のパッド電極１１０ｃを電気的に共通接続するブリッジ配線２９０とを有する。本発明によれば、配線構造体に設けられたブリッジ配線２９０が半導体チップ１００内の配線を補助することから、所定の配線のインピーダンスを低下させることが可能となる。
摘要翻译： [问题]减少设置在半导体芯片中的预定布线的阻抗。 [解决方案]提供具有多个焊盘电极（110a，110c）的半导体芯片（100）和设置在半导体芯片（100）上的作为布线结构的布线基板（200）。布线基板（200）具有多个外部端子（260），用于电连接各外部端子（260）和焊盘电极（110a）的多个布线图案（240）和用于以共享的方式电连接多个焊盘电极（110c），而不与电路连接到布线基板（200）中的任何外部端子（260）。通过本发明，由于提供给布线结构的桥接布线（290）补充了半导体芯片（100）中的布线，因此可以减小预定布线的阻抗。

2. 发明申请

WO2014011612A3 NON-CIRCULAR UNDER BUMP METALLIZATION (UBM) STRUCTURE, ORIENTATION OF NON-CIRCULAR UBM STRUCTURE AND TRACE ORIENTATION TO INHIBIT PEELING AND/OR CRACKING 审中-公开
标题翻译：非圆形非金属结构（UBM）结构，非圆形UBM结构的定向和跟踪方向，以阻止剥离和/或破裂
公开(公告)号：WO2014011612A3
公开(公告)日：2014-04-10
申请号：PCT/US2013049682
申请日：2013-07-09
申请人： QUALCOMM INC
发明人： BAO ZHONGPING , ZHAO LILY , HAN MICHAEL
IPC分类号： H01L23/485 , H01L21/60 , H01L23/498
CPC分类号： H01L24/14 , H01L23/49811 , H01L23/49838 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05541 , H01L2224/05552 , H01L2224/05572 , H01L2224/05647 , H01L2224/06051 , H01L2224/06131 , H01L2224/06133 , H01L2224/06141 , H01L2224/06145 , H01L2224/06517 , H01L2224/13006 , H01L2224/13012 , H01L2224/13015 , H01L2224/13022 , H01L2224/13027 , H01L2224/13082 , H01L2224/14145 , H01L2224/811 , H01L2224/81191 , H01L2224/81203 , H01L2224/81447 , H01L2224/81815 , H01L2924/3512 , H01L2924/00012 , H01L2924/00014 , H01L2924/2064
摘要： Some exemplary embodiments of this disclosure pertain to a semiconductor package that includes a packaging substrate, a die and a set of under bump metallization (UBM) structures coupled to the packaging substrate and the die. Each UBM structure has a non-circular cross-section along its respective lateral dimension. Each UBM structure includes a first narrower portion and a second wider portion. The first narrower portion has a first width. The second wider portion has a second width that is greater than the first width. Each UBM structure is oriented towards a particular region of the die such that the first narrower portion of the UBM structure is closer than the second wider portion of the UBM structure to the particular region of the die.
摘要翻译：本公开的一些示例性实施例涉及包括封装衬底，管芯和耦合到封装衬底和管芯的一组凹凸金属化（UBM）结构的半导体封装。每个UBM结构沿其相应的横向尺寸具有非圆形横截面。每个UBM结构包括第一较窄部分和第二较宽部分。第一较窄部分具有第一宽度。第二较宽部分具有大于第一宽度的第二宽度。每个UBM结构朝向模具的特定区域，使得UBM结构的第一较窄部分比UBM结构的第二较宽部分更靠近模具的特定区域。

3. 发明申请

WO2014023287A2 CONTACT BUMP CONNECTION AND CONTACT BUMP AND METHOD FOR PRODUCING A CONTACT BUMP CONNECTION 审中-公开
标题翻译：联系HÖCKER连接，然后与HÖCKER及其制造方法的联系人HÖCKERCONNECTION
公开(公告)号：WO2014023287A2
公开(公告)日：2014-02-13
申请号：PCT/DE2013000451
申请日：2013-08-09
申请人： SMARTRAC TECHNOLOGY GMBH
发明人： NIELAND CARSTEN , KRIEBEL FRANK
IPC分类号： H01L23/485
CPC分类号： H05K1/18 , H01L21/76885 , H01L23/49811 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05567 , H01L2224/11462 , H01L2224/11622 , H01L2224/13006 , H01L2224/13011 , H01L2224/13012 , H01L2224/13019 , H01L2224/13022 , H01L2224/16113 , H01L2224/16225 , H01L2224/73104 , H01L2224/73204 , H01L2224/81191 , H01L2224/81201 , H01L2224/81206 , H01L2224/81345 , H01L2224/81898 , H01L2224/83862 , H01L2224/9211 , H01L2224/92125 , H01L2924/00014 , H05K3/301 , H05K3/3431 , H05K2201/1059 , H05K2201/10674 , H05K2201/10954 , H05K2203/0415 , Y10T29/49018 , Y10T29/4913 , H01L2924/00012 , H01L2224/81 , H01L2224/83 , H01L2224/05552
摘要： The invention relates to a contact bump connection (24) and to a method for producing a contact bump connection between an electronic component provided with at least one terminal face (11) and a contact substrate (26) contacted with the component and having at least one second terminal face (25), wherein the first terminal face is provided with a contact bump (10) which has a raised edge (15) and has at least one displacement pin (16) in a displacement compartment (18) which is surrounded by the raised edge and is open towards a head end of the contact bump, and in a contact region (31) with the first terminal face the second terminal face has a contact bead (30) which is formed by displacement of a contact material (29) of the second terminal face into the displacement compartment and surrounds the displacement pin, wherein said contact bead has a bead crown (33) which is directed to a base (17) of the displacement compartment and is raised relative to a level contact surface (32) of the second terminal face surrounding the contact region.
摘要翻译：本发明涉及一种突点互连（24）和提供电子B和与B触点基板（26）接触的auelement用于制造具有至少一个第一连接面（11）auelement一个之间的凸块连接的方法与至少一个第二连接面（25），其特征在于提供了具有一个接触尖点（10），其具有一个边缘仰角（15）和在边缘仰角中的一个和所述凸块的头端包围的第一垫是朝向位移空间（18）至少一个位移销（16）和在所述第二连接表面开通过形成在位移腔室中的第二焊盘的接触材料（29）的位移的接触区域（31）与所述第一配合表面的，包围Kontaktwulst（30）的位移销，定向与所述位移腔室的底部（17）和抵靠所述KONTAKT 围绕所述第二垫的平面接触表面（32）tbereich增加Wulstkrone（33）。

4. 发明申请

WO2014011612A2 NON-CIRCULAR UNDER BUMP METALLIZATION (UBM) STRUCTURE, ORIENTATION OF NON-CIRCULAR UBM STRUCTURE AND TRACE ORIENTATION TO INHIBIT PEELING AND/OR CRACKING 审中-公开
标题翻译：非凸面金属化（UBM）结构下的非圆形，非圆形UBM结构的定向以及抑制剥离和/或开裂的痕迹定向
公开(公告)号：WO2014011612A2
公开(公告)日：2014-01-16
申请号：PCT/US2013/049682
申请日：2013-07-09
申请人： QUALCOMM INCORPORATED
发明人： BAO, Zhongping , ZHAO, Lily , HAN, Michael
IPC分类号： H01L23/485
CPC分类号： H01L24/14 , H01L23/49811 , H01L23/49838 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05541 , H01L2224/05552 , H01L2224/05572 , H01L2224/05647 , H01L2224/06051 , H01L2224/06131 , H01L2224/06133 , H01L2224/06141 , H01L2224/06145 , H01L2224/06517 , H01L2224/13006 , H01L2224/13012 , H01L2224/13015 , H01L2224/13022 , H01L2224/13027 , H01L2224/13082 , H01L2224/14145 , H01L2224/811 , H01L2224/81191 , H01L2224/81203 , H01L2224/81447 , H01L2224/81815 , H01L2924/3512 , H01L2924/00012 , H01L2924/00014 , H01L2924/2064
摘要： Some exemplary embodiments of this disclosure pertain to a semiconductor package that includes a packaging substrate, a die and a set of under bump metallization (UBM) structures coupled to the packaging substrate and the die. Each UBM structure has a non-circular cross-section along its respective lateral dimension. Each UBM structure includes a first narrower portion and a second wider portion. The first narrower portion has a first width. The second wider portion has a second width that is greater than the first width. Each UBM structure is oriented towards a particular region of the die such that the first narrower portion of the UBM structure is closer than the second wider portion of the UBM structure to the particular region of the die.
摘要翻译：本公开的一些示例性实施例涉及一种半导体封装，其包括封装衬底，管芯和耦合到封装衬底和管芯的一组凸底下金属化（UBM）结构。每个UBM结构沿其各自的横向尺寸具有非圆形横截面。每个UBM结构包括第一较窄部分和第二较宽部分。第一较窄部分具有第一宽度。第二较宽部分具有大于第一宽度的第二宽度。每个UBM结构朝向管芯的特定区域定向，使得UBM结构的第一较窄部分比UBM结构的第二较宽部分更靠近管芯的特定区域。

5. 发明申请

WO2011096800A3 SEMICONDUCTOR DEVICE WITH A VARIABLE INTEGRATED CIRCUIT CHIP BUMP PITCH 审中-公开
标题翻译：具有可变集成电路芯片保护膜的半导体器件
公开(公告)号：WO2011096800A3
公开(公告)日：2012-04-26
申请号：PCT/NL2011050069
申请日：2011-02-02
申请人： POLYMER VISION BV , VAN LIESHOUT PETRUS JOHANNES GERARDUS
发明人： VAN LIESHOUT PETRUS JOHANNES GERARDUS
IPC分类号： H01L23/485 , G02F1/1333 , G06F1/16 , H01L21/60
CPC分类号： H01L24/14 , G02F1/133305 , G06F1/1652 , H01L23/5387 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/83 , H01L24/94 , H01L2224/0401 , H01L2224/0612 , H01L2224/11472 , H01L2224/13006 , H01L2224/13007 , H01L2224/13027 , H01L2224/13099 , H01L2224/13144 , H01L2224/274 , H01L2924/00011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01075 , H01L2924/01079 , H01L2924/14 , H01L2224/83851
摘要： Embodiments of the invention provide a semiconductor device comprising an IC chip (6) or a flip chip enabling mitigation of misalignment problems occurring due to changes of size of a substrate (9), for example a flexible display, to which the IC chip (6) is conceived to be electrically connected. In particular, it is an object of the invention to provide a semiconductor device with bump pitch variation possibilities whereby misalignment problems between substrate's bonding pads (8) and IC bumps (2) are counteracted. To this end according to an aspect of the invention the semiconductor device comprises an integrated circuit (IC) chip (6) including a plurality of electrodes (4) arranged in at least one row for enabling electrical connectivity to an IC chip circuit. The electrodes (4) have centerlines in a direction transverse to a row direction. Moreover, a plurality of bumps (2) arranged atop the electrodes (4) form respective bump-electrode pairs. The bumps (2) have centerlines in a direction transverse to the row direction, wherein positions of bump centerlines with respect to electrode centerlines for the bump- electrodes pairs are different for different locations on the IC chip (6). This technical measure is based on the insight that different bump sizing may be provided by allowing a lateral shift between respective centerlines of the bumps and the centerlines of the electrodes, thereby enabling manufacturing of differently sized bump sets using substantially the same chip architecture.
摘要翻译：本发明的实施例提供一种包括IC芯片（6）或倒装芯片的半导体器件，其能够减轻由于基板（9）的尺寸变化引起的未对准问题，例如柔性显示器，IC芯片（6））被认为是电连接的。特别地，本发明的目的是提供一种具有凸起间距变化可能性的半导体器件，由此抵消衬底的焊盘（8）和IC凸块（2）之间的对准问题。为此，根据本发明的一个方面，半导体器件包括集成电路（IC）芯片（6），其包括布置在至少一行中的多个电极（4），以实现与IC芯片电路的电连接。电极（4）在横向于行方向的方向上具有中心线。此外，布置在电极（4）顶部的多个凸块（2）形成相应的凸起 - 电极对。凸块（2）在横向于行方向的方向上具有中心线，其中相对于凸块电极对的电极中心线的凸起中心线的位置对于IC芯片（6）上的不同位置是不同的。该技术措施基于以下认识：可以通过允许凸块的各个中心线和电极的中心线之间的横向偏移来提供不同的凸块尺寸，从而使得能够使用基本上相同的芯片架构来制造不同尺寸的凸块组。

6. 发明申请

WO2012004136A2 METHOD TO FORM SOLDER ALLOY DEPOSITS ON SUBSTRATES 审中-公开
标题翻译：在衬底上形成焊料合金沉积物的方法
公开(公告)号：WO2012004136A2
公开(公告)日：2012-01-12
申请号：PCT/EP2011/060579
申请日：2011-06-23
申请人： ATOTECH DEUTSCHLAND GMBH , MATEJAT, Kai-Jens , LAMPRECHT, Sven , EWERT, Ingo
发明人： MATEJAT, Kai-Jens , LAMPRECHT, Sven , EWERT, Ingo
IPC分类号： H01L21/48 , H01L23/498
CPC分类号： B23K31/02 , H01L21/4853 , H01L23/49816 , H01L24/11 , H01L24/13 , H01L2224/03464 , H01L2224/0361 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/11462 , H01L2224/1147 , H01L2224/11474 , H01L2224/1148 , H01L2224/11502 , H01L2224/11849 , H01L2224/11901 , H01L2224/11912 , H01L2224/13006 , H01L2224/13018 , H01L2224/13022 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01052 , H01L2924/01061 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/15787 , H01L2924/351 , H01L2924/00 , H01L2224/05552
摘要： Described is a method of forming a solder alloy deposit on a substrate comprising the following steps i) provide a substrate including a surface bearing electrical circuitry that includes at least one inner layer contact pad, ii) form a solder mask layer that is placed on the substrate surface and patterned to expose the at least one contact area, iii) contact the entire substrate area including the solder mask layer and the at least one contact area with a solution suitable to provide a metal seed layer on the substrate surface, iv) form a structured resist layer on the metal seed layer, v) electroplate a first solder material layer containing tin onto the conductive layer, vi) electroplate a second solder material layer onto the first solder material layer, vii) remove the structured resist layer and etch away an amount of the metal seed layer sufficient to remove the metal seed layer from the solder mask layer area and reflow the substrate and in doing so form a solder alloy deposit from the metal seed layer, the first solder material layer and the second solder material layer.
摘要翻译：描述了一种在基板上形成焊料合金沉积物的方法，包括以下步骤：i）提供包括表面承载电路的基板，所述电路包括至少一个内层接触垫，ii）形成焊接掩模层，其被放置在衬底表面上并且被图案化以暴露所述至少一个接触区域; iii）使包括焊料掩模层和所述至少一个接触区域的整个衬底区域与适合于提供金属晶种层的溶液接触 iv）在所述金属种子层上形成结构化抗蚀剂层，v）在所述导电层上电镀包含锡的第一焊料材料层，vi）在所述第一焊料材料层上电镀第二焊料材料层，vii）去除结构化抗蚀剂层并且蚀刻掉足够量的金属种子层以从焊料掩模层区域去除金属种子层并回流基板，并且这样形成焊料从金属种子层，第一焊料材料层和第二焊料材料层合金沉积。

7. 发明申请

WO2011061989A1 デバイス基板およびその製造方法审中-公开
标题翻译：装置基板及其制造方法
公开(公告)号：WO2011061989A1
公开(公告)日：2011-05-26
申请号：PCT/JP2010/065980
申请日：2010-09-15
申请人：シャープ株式会社 , 中濱裕喜 , 松井隆司 , 堀口武志 , 塩田素二
发明人：中濱　裕喜 , 松井　隆司 , 堀口　武志 , 塩田　素二
IPC分类号： G09F9/00 , G02F1/1345 , H01L21/60 , H01L23/15
CPC分类号： G02F1/1345 , G02F2001/13456 , H01L23/4985 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L2224/02185 , H01L2224/0401 , H01L2224/05567 , H01L2224/1146 , H01L2224/13006 , H01L2224/13019 , H01L2224/16 , H01L2224/16013 , H01L2224/16112 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/17107 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/81385 , H01L2224/81395 , H01L2224/81424 , H01L2224/81481 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01004 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/07802 , H01L2924/14 , H01L2924/15788 , Y10T156/10 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/0665 , H01L2924/00 , H01L2224/05552
摘要：　表面に端子部（２４）が形成される絶縁層（６０）は、表示部を除くガラス基板（２０）全面に渡って形成されているので、絶縁層（６０）の境界部分（外周部分）がＮＣＦ（８１）が設けられる領域すなわちＬＳＩチップ（４０）近傍等に差し掛かることがない。よって、ＮＣＦ（８１）によって当該境界部分から絶縁層（６０）が剥がされることにより端子部（２４）が破壊されることを防止することができる。また絶縁層（６０）の弾性力により、端子部（２４）とバンプ電極（４０ａ）とは恒常的に圧着され、電気的に安定に接続される。
摘要翻译：公开了一种器件基板，其中，由于在玻璃基板（20）的整个表面上形成在表面上形成有端子部（24）的绝缘层（60），除了显示部以外，所以边界部（外周绝缘层（60）的部分没有到达设置有NCF（81）的区域，即靠近LSI芯片（40）的区域。因此，由于绝缘层（60）从边界部分的剥离，终端部分（24）被防止断裂，所述剥离是由NCF（81）引起的。此外，端子部（24）和突起电极（40a）通过绝缘层（60）的弹性力彼此恒定地压接，并且彼此电连接。

8. 发明申请

WO2009013678A3 REINFORCED STRUCTURE FOR A STACK OF LAYERS IN A SEMICONDUCTOR COMPONENT 审中-公开
标题翻译：半导体元件堆叠的强化结构
公开(公告)号：WO2009013678A3
公开(公告)日：2009-06-25
申请号：PCT/IB2008052874
申请日：2008-07-17
申请人： NXP BV , HOCHSTENBACH HENDRIK PIETER , VAN DRIEL WILLEM DIRK
发明人： HOCHSTENBACH HENDRIK PIETER , VAN DRIEL WILLEM DIRK
IPC分类号： H01L23/00 , H01L23/485
CPC分类号： H01L24/05 , H01L23/3192 , H01L23/522 , H01L23/5283 , H01L23/53295 , H01L23/562 , H01L24/16 , H01L2224/0401 , H01L2224/05568 , H01L2224/13006 , H01L2224/16 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01067 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/14 , H01L2924/1461 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/351 , H01L2924/00 , H01L2224/05552
摘要： The present application relates to a reinforcing structure (1, 2) for reinforcing a stack of layers (100) in a semiconductor component, wherein at least one reinforcing element (110, 118) having at least one integrated anchor-like part (110 a, 110 b), is provided. The basic idea is to reinforce bond pad structures by providing a better mechanical connection between the layers below an advanced underbump metallization (BUMA, UBM) by providing reinforcing elements under the UBM and/or BUMA layer.
摘要翻译：本申请涉及一种用于加强半导体部件中的层叠体（100）的加强结构（1,2），其中至少一个加强元件（110,118）具有至少一个集成的锚固部分（110a），110b）。基本思想是通过在UBM和/或BUMA层下提供增强元件，在先进的下凸块金属化（BUMA，UBM）之下的层之间提供更好的机械连接来增强粘结垫结构。

9. 发明申请

WO2009031522A1 半導体素子およびその製造方法、ならびにその半導体素子を実装する実装構造体审中-公开
标题翻译：半导体元件，半导体元件制造方法和安装半导体元件的安装结构
公开(公告)号：WO2009031522A1
公开(公告)日：2009-03-12
申请号：PCT/JP2008/065739
申请日：2008-09-02
申请人：京セラ株式会社 , 加藤謙一 , 下赤善男
发明人：加藤謙一 , 下赤善男
IPC分类号： H01L21/60
CPC分类号： H01L24/13 , H01L24/11 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05541 , H01L2224/05559 , H01L2224/05655 , H01L2224/13005 , H01L2224/13006 , H01L2224/13082 , H01L2224/13109 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/136 , H01L2224/13609 , H01L2224/13611 , H01L2224/13613 , H01L2224/13616 , H01L2224/13618 , H01L2224/13624 , H01L2224/13639 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/16 , H01L2924/00013 , H01L2924/01004 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/351 , H01L2924/00014 , H01L2924/0105 , H01L2924/207 , H01L2224/13099 , H01L2924/00 , H01L2924/013 , H01L2924/01014
摘要：　機械的な信頼性および電気的な信頼性の両方に優れた半導体素子および該半導体素子の実装構造体を提供する。　その半導体素子は、基板と、基板上に設けられた導電層と、導電層上に設けられた開口部を有する保護層と、開口部において導電層に接合されたバリアメタル層と、バリアメタル層上に形成された導電性バンプとを有している。このバリアメタル層は、リンを含有しており、かつ該リン含有率が他の部分より大きいリンリッチ部位を含んでいる。このリンリッチ部位は、導電性バンプ側の表面部に位置し、かつ導電性バンプの形成領域の周縁部における厚さが当該形成領域の中央部における厚さより大きい。
摘要翻译：提供了在机械可靠性和电可靠性方面都优异的半导体元件。还提供了其上安装有这种半导体元件的结构。半导体元件设置有基板; 布置在所述基板上的导电层; 保护层，其具有布置在所述导电层上的开口部分; 阻挡金属层，其在所述开口部处接合在所述导电层上; 以及形成在阻挡金属层上的导电凸块。阻挡金属层包含磷，并且包括磷含量高于其它部分的磷含量部分。富磷部分位于导电凸块侧的表面上，并且在导电凸块形成区域的周边处的厚度大于成形区域的中心部分的厚度。

10. 发明申请

WO2007096095A3 ETCHING SOLUTION AND METHOD FOR STRUCTURING A UBM LAYER SYSTEM 审中-公开
标题翻译：蚀刻溶液和工艺结构甲UBM膜层系统的
公开(公告)号：WO2007096095A3
公开(公告)日：2008-02-07
申请号：PCT/EP2007001363
申请日：2007-02-16
申请人： FRAUNHOFER GES ZUER FOERDERUNG , DIETZ FRANK , KOHLMANN-VON PLATEN KLAUS , QUENZER HANS-JOACHIM
发明人： DIETZ FRANK , KOHLMANN-VON PLATEN KLAUS , QUENZER HANS-JOACHIM
IPC分类号： C23F1/02 , C23F1/16 , C23F1/18 , C23F1/44 , H01L21/60
CPC分类号： C23F1/02 , C23F1/16 , C23F1/18 , C23F1/44 , H01L21/32134 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05001 , H01L2224/05124 , H01L2224/05155 , H01L2224/0554 , H01L2224/05647 , H01L2224/114 , H01L2224/116 , H01L2224/13006 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01016 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/19043 , H01L2224/13099 , H01L2924/00014
摘要： The invention relates to an etching solution for etching a layer system comprising at least one aluminium layer, at least one copper layer and at least a third layer selected from nickel vanadium, nickel and the alloys thereof, and arranged between the at least one aluminium layer and the at least one copper layer. Said solution contains phosphoric acid, nitric acid, deionised water and at least one salt that can release halogen ions, or consists of said constituents. The claimed etching solution is the basis for a single-step structuring method for a UBM layer system used for the production of components produced by means of a method relating to semiconductor technology.
摘要翻译：本发明涉及一种蚀刻溶液用于蚀刻的层系统，其包含的至少一种铝层，铜镍钒，镍及其合金的第三层，其被布置在至少一个铝层和至少一个铜层之间的和至少至少一层 ,,其中磷酸，硝酸，离子交换水和能够释放卤离子中的至少一种盐的溶液含有或由这些组件。所要求保护的蚀刻溶液为这是在装置，其通过一个UBM层系统的半导体工艺来制造的制造中使用单级图案化的方法的基础。

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