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    • 4. 发明申请
    • SEMICONDUCTOR DEVICE WITH A VARIABLE INTEGRATED CIRCUIT CHIP BUMP PITCH
    • 具有可变集成电路芯片保护膜的半导体器件
    • WO2011096800A3
    • 2012-04-26
    • PCT/NL2011050069
    • 2011-02-02
    • POLYMER VISION BVVAN LIESHOUT PETRUS JOHANNES GERARDUS
    • VAN LIESHOUT PETRUS JOHANNES GERARDUS
    • H01L23/485G02F1/1333G06F1/16H01L21/60
    • H01L24/14G02F1/133305G06F1/1652H01L23/5387H01L24/06H01L24/11H01L24/13H01L24/83H01L24/94H01L2224/0401H01L2224/0612H01L2224/11472H01L2224/13006H01L2224/13007H01L2224/13027H01L2224/13099H01L2224/13144H01L2224/274H01L2924/00011H01L2924/01013H01L2924/01014H01L2924/01033H01L2924/01075H01L2924/01079H01L2924/14H01L2224/83851
    • Embodiments of the invention provide a semiconductor device comprising an IC chip (6) or a flip chip enabling mitigation of misalignment problems occurring due to changes of size of a substrate (9), for example a flexible display, to which the IC chip (6) is conceived to be electrically connected. In particular, it is an object of the invention to provide a semiconductor device with bump pitch variation possibilities whereby misalignment problems between substrate's bonding pads (8) and IC bumps (2) are counteracted. To this end according to an aspect of the invention the semiconductor device comprises an integrated circuit (IC) chip (6) including a plurality of electrodes (4) arranged in at least one row for enabling electrical connectivity to an IC chip circuit. The electrodes (4) have centerlines in a direction transverse to a row direction. Moreover, a plurality of bumps (2) arranged atop the electrodes (4) form respective bump-electrode pairs. The bumps (2) have centerlines in a direction transverse to the row direction, wherein positions of bump centerlines with respect to electrode centerlines for the bump- electrodes pairs are different for different locations on the IC chip (6). This technical measure is based on the insight that different bump sizing may be provided by allowing a lateral shift between respective centerlines of the bumps and the centerlines of the electrodes, thereby enabling manufacturing of differently sized bump sets using substantially the same chip architecture.
    • 本发明的实施例提供一种包括IC芯片(6)或倒装芯片的半导体器件,其能够减轻由于基板(9)的尺寸变化引起的未对准问题,例如柔性显示器,IC芯片(6) )被认为是电连接的。 特别地,本发明的目的是提供一种具有凸起间距变化可能性的半导体器件,由此抵消衬底的焊盘(8)和IC凸块(2)之间的对准问题。 为此,根据本发明的一个方面,半导体器件包括集成电路(IC)芯片(6),其包括布置在至少一行中的多个电极(4),以实现与IC芯片电路的电连接。 电极(4)在横向于行方向的方向上具有中心线。 此外,布置在电极(4)顶部的多个凸块(2)形成相应的凸起 - 电极对。 凸块(2)在横向于行方向的方向上具有中心线,其中相对于凸块电极对的电极中心线的凸起中心线的位置对于IC芯片(6)上的不同位置是不同的。 该技术措施基于以下认识:可以通过允许凸块的各个中心线和电极的中心线之间的横向偏移来提供不同的凸块尺寸,从而使得能够使用基本上相同的芯片架构来制造不同尺寸的凸块组。