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1. 发明申请

WO2014094115A1 DEVICES AND SYSTEMS COMPRISING DRIVERS FOR POWER CONVERSION CIRCUITS 审中-公开
标题翻译：包含电源转换电路驱动器的设备和系统
公开(公告)号：WO2014094115A1
公开(公告)日：2014-06-26
申请号：PCT/CA2013/001019
申请日：2013-12-12
申请人： GAN SYSTEMS INC.
发明人： ROBERTS, John , KLOWAK, Greg
IPC分类号： H03K17/687 , H02M1/08
CPC分类号： H03K17/687 , H01F19/08 , H01L23/49524 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L23/645 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/18 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05555 , H01L2224/0557 , H01L2224/06051 , H01L2224/06131 , H01L2224/06181 , H01L2224/13147 , H01L2224/16145 , H01L2224/32245 , H01L2224/40245 , H01L2224/48137 , H01L2224/48195 , H01L2224/48247 , H01L2224/49107 , H01L2224/49175 , H01L2224/73253 , H01L2224/73265 , H01L2924/00014 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/12035 , H01L2924/1204 , H01L2924/1305 , H01L2924/1306 , H01L2924/13064 , H01L2924/13091 , H01L2924/15747 , H01L2924/181 , H01L2924/19104 , H01L2924/30107 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electronic switching system and device comprising driver circuits for power transistors are disclosed, with particular application for MOSFET driven, normally-on gallium nitride (GaN) power transistors. Preferably, a low power, high speed CMOS driver circuit with an integrated low voltage, lateral MOSFET driver is series coupled, in a hybrid cascode arrangement, to a high voltage GaN HEMT and provides for improved control of noise and voltage transients. Monitoring and control functions, including latching and clamping, are based on monitoring of V cc conditions for shut-down and start-up conditioning to enable safer operation, particularly for high voltage and high current switching. Preferred embodiments also provide isolated, self-powered, high speed driver devices, with reduced input losses.
摘要翻译：公开了一种包括用于功率晶体管的驱动电路的电子开关系统和装置，其特别适用于MOSFET驱动的常规氮化镓（GaN）功率晶体管。优选地，具有集成的低电压横向MOSFET驱动器的低功率，高速CMOS驱动器电路以混合共源共栅布置串联耦合到高电压GaN HEMT，并且提供对噪声和电压瞬变的改进的控制。监控和控制功能，包括闭锁和钳位，都是基于对关闭和启动调节的Vcc条件进行监控，以实现更安全的操作，特别是对于高电压和高电流开关。优选实施例还提供具有减小的输入损耗的隔离，自供电的高速驱动器件。

2. 发明申请

WO2012103633A1 GALLIUM NITRIDE POWER DEVICES USING ISLAND TOPOGRAPHY 审中-公开
标题翻译：使用岛屿地形的GALLIUM NITRIDE POWER DEVICES
公开(公告)号：WO2012103633A1
公开(公告)日：2012-08-09
申请号：PCT/CA2012/000080
申请日：2012-02-02
申请人： GAN SYSTEMS INC. , ROBERTS, John , MIZAN, Ahmad , PATTERSON, Girvan , KLOWAK, Greg
发明人： ROBERTS, John , MIZAN, Ahmad , PATTERSON, Girvan , KLOWAK, Greg
IPC分类号： H01L29/41 , H01L27/06 , H01L29/775 , H01L29/201
CPC分类号： H01L29/0696 , H01L23/528 , H01L24/14 , H01L29/2003 , H01L29/205 , H01L29/41775 , H01L29/42356 , H01L29/475 , H01L29/7787 , H01L2224/73253 , H01L2924/13091 , H01L2924/14 , H01L2924/00
摘要： A semiconductor device in provided having a substrate and a semiconductor layer formed on a main surface of the substrate. A plurality of first island electrodes and a plurality of second island electrodes are placed over the semiconductor layer. The plurality of first island electrodes and second island electrodes are spaced apart from each other so as to be alternatively arranged to produce two-dimensional active regions in all feasible areas of the semiconductor layer. Each side of the first island electrodes is opposite a side of the second island electrodes. The semiconductor device can also include a plurality of strip electrodes that are formed in the regions between the first island electrodes and the second island electrodes. The strip electrodes serve as the gate electrodes of a multi-island transistor. The first island electrodes serve as the source electrodes of the multi -island transistor. The second island electrodes serve as the drain electrodes of the multi-island transistor. A plurality of connections to the gate electrodes are provided at each interstice defined by corners of the first island electrodes and the second island electrodes.
摘要翻译：一种半导体器件，其具有基板和形成在基板的主表面上的半导体层。多个第一岛电极和多个第二岛电极放置在半导体层上。多个第一岛状电极和第二岛状电极彼此间隔开，以便交替地布置成在半导体层的所有可行区域中产生二维有源区。第一岛状电极的两侧与第二岛状电极的一侧相反。半导体器件还可以包括形成在第一岛状电极和第二岛状电极之间的区域中的多个条状电极。带状电极用作多岛晶体管的栅电极。第一岛状电极用作多晶体管的源电极。第二岛电极用作多岛晶体管的漏电极。在由第一岛状电极和第二岛状电极的角部限定的每个间隙设置与栅电极的多个连接。

3. 发明申请

WO2011127568A1 HIGH DENSITY GALLIUM NITRIDE DEVICES USING ISLAND TOPOLOGY 审中-公开
标题翻译：高密度GALLIUM NITRIDE设备使用岛屿拓扑学
公开(公告)号：WO2011127568A1
公开(公告)日：2011-10-20
申请号：PCT/CA2011000396
申请日：2011-04-13
申请人： GAN SYSTEMS INC , ROBERTS JOHN , MIZAN AHMAD , PATTERSON GIRVAN , KLOWAK GREG
发明人： ROBERTS JOHN , MIZAN AHMAD , PATTERSON GIRVAN , KLOWAK GREG
IPC分类号： H01L23/48 , H01L23/485 , H01L27/085
CPC分类号： H01L29/42316 , H01L24/05 , H01L24/13 , H01L27/0605 , H01L27/0629 , H01L27/085 , H01L29/2003 , H01L29/402 , H01L29/41725 , H01L2224/0401 , H01L2224/05572 , H01L2224/05644 , H01L2224/13144 , H01L2924/00014 , H01L2924/0002 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/00 , H01L2224/05552
摘要： A Gallium Nitride (GaN) series of devices - transistors and diodes are disclosed - that have greatly superior current handling ability per unit area than previously described GaN devices. The improvement is due to improved layout topology. The devices also include a simpler and superior flip chip connection scheme and a means to reduce the thermal resistance. A simplified fabrication process is disclosed and the layout scheme which uses island electrodes rather than finger electrodes is shown to increase the active area density by two to five times that of conventional interdigitated structures. Ultra low on resistance transistors and very low loss diodes can be built using the island topology. Specifically, the present disclosure provides a means to enhance cost/effective performance of all lateral GaN structures.
摘要翻译：公开了一种氮化镓（GaN）系列器件 - 晶体管和二极管，其具有比先前描述的GaN器件具有非常优异的每单位面积的电流处理能力。改进是由于布局拓扑的改进。这些器件还包括一个更简单和更好的倒装芯片连接方案和降低热阻的手段。公开了简化的制造工艺，并且示出了使用岛电极而不是手指电极的布局方案来增加有效面积密度是常规叉指结构的两到五倍。可以使用岛拓扑构建超低导通电阻晶体管和非常低的损耗二极管。具体地，本公开提供了增强所有横向GaN结构的成本/有效性能的手段。

4. 发明申请

WO2020176971A1 FAST PULSE, HIGH CURRENT LASER DRIVERS 审中-公开
公开(公告)号：WO2020176971A1
公开(公告)日：2020-09-10
申请号：PCT/CA2020/050257
申请日：2020-02-27
申请人： GAN SYSTEMS INC.
发明人： MOUSAVIAN, Hossein , SPAZIANI, Larry
IPC分类号： H01S5/042 , G01S7/484 , H01S5/42
摘要： Pulsed laser drivers are disclosed comprising Gallium Nitride (GaN) power transistors for driving diode laser systems requiring high current and fast pulses, such as laser drivers for LIDAR (Light Detection and Ranging) systems. Drivers are capable of delivering pulses with peak current ≥100A, e.g. 170A to provide high peak power, fast pulses with nanosecond rise times and nanosecond pulse duration, for driving multi-channel laser diode arrays with 40A per channel for 120W output per channel for a combined peak output of 480W. For lower duty cycle, example driver circuits are disclosed comprising a high current power transistor for direct drive with drive assist. For higher duty cycle, example resonant driver circuits are disclosed comprising two high current power transistors. Implementation of resonant driver circuits with GaN technology provides fast charging for short pulse operation at higher repetition rates or for pulse code modulation.

5. 发明申请

WO2015135072A1 POWER SWITCHING SYSTEMS COMPRISING HIGH POWER E-MODE GAN TRANSISTORS AND DRIVER CIRCUITRY 审中-公开
标题翻译：包含高功率E模式晶体管和驱动电路的电源开关系统
公开(公告)号：WO2015135072A1
公开(公告)日：2015-09-17
申请号：PCT/CA2015/000168
申请日：2015-03-10
申请人： GAN SYSTEMS INC.
发明人： ROBERTS, John , SCOTT, Iain, H.
IPC分类号： H03K17/687 , H01L27/085 , H01L29/20 , H01L29/778
CPC分类号： H03K17/687 , H01L27/0605 , H01L27/085 , H01L29/2003 , H01L29/7787 , H03K5/08 , H03K17/04123 , H03K2217/0036
摘要： Driver circuitry for switching systems comprising enhancement mode (E-Mode) GaN power transistors with low threshold voltage is disclosed. An E-Mode high electron mobility transistor (HEMT) D3 has a monolithically integrated GaN driver, comprising smaller E- Mode GaN HEMTs D1 and D2, and a discrete dual-voltage pre-driver. D1 provides the gate drive voltage to the gate of the GaN switch D3, D2 clamps the gate of the GaN switch D3, an internal source-sense connection closely couples the source of D3 and the source of D1. An additional source-sense connection is provided for the pre-driver. Boosting the drive voltage to the gate of D1 produces firm and rapid pull-up of D1 and D3 for improved switching performance at higher switching speeds. High current handling components of the driver circuitry are integrated with the GaN switch and closely coupled to reduce inductance, while the discrete pre-driver can be thermally separated from the GaN chip.
摘要翻译：公开了包括具有低阈值电压的增强模式（E模））GaN功率晶体管的开关系统的驱动电路。 E模式高电子迁移率晶体管（HEMT）D3具有单片集成GaN驱动器，其包括较小的E-mode GaN HEMT D1和D2以及分立的双电压预驱动器。 D1将栅极驱动电压提供给GaN开关D3的栅极，D2钳位GaN开关D3的栅极，内部源极检测连接紧密耦合D3的源极和D1源。为前置驱动程序提供了一个附加的源感测连接。将D1和D3的驱动电压提升到D1的栅极，可以实现更快速的D1和D3上拉，从而提高开关速度下的开关性能。驱动器电路的大电流处理部件与GaN开关集成，并且紧密耦合以减小电感，而离散预驱动器可以与GaN芯片热分离。

6. 发明申请

WO2011127568A4 HIGH DENSITY GALLIUM NITRIDE DEVICES USING ISLAND TOPOLOGY 审中-公开
公开(公告)号：WO2011127568A4
公开(公告)日：2011-10-20
申请号：PCT/CA2011/000396
申请日：2011-04-13
申请人： GAN SYSTEMS INC. , ROBERTS, John , MIZAN, Ahmad , PATTERSON, Girvan , KLOWAK, Greg
发明人： ROBERTS, John , MIZAN, Ahmad , PATTERSON, Girvan , KLOWAK, Greg
IPC分类号： H01L23/48 , H01L23/485 , H01L27/085
摘要： A Gallium Nitride (GaN) series of devices - transistors and diodes are disclosed - that have greatly superior current handling ability per unit area than previously described GaN devices. The improvement is due to improved layout topology. The devices also include a simpler and superior flip chip connection scheme and a means to reduce the thermal resistance. A simplified fabrication process is disclosed and the layout scheme which uses island electrodes rather than finger electrodes is shown to increase the active area density by two to five times that of conventional interdigitated structures. Ultra low on resistance transistors and very low loss diodes can be built using the island topology. Specifically, the present disclosure provides a means to enhance cost/effective performance of all lateral GaN structures.

7. 发明申请

WO2021163785A1 APPARATUS, SYSTEMS AND METHODS FOR LOAD-ADAPTIVE 3D WIRELESS CHARGING 审中-公开
公开(公告)号：WO2021163785A1
公开(公告)日：2021-08-26
申请号：PCT/CA2021/050127
申请日：2021-02-05
申请人： GAN SYSTEMS INC.
发明人： SHI, Tiefeng , WIENER, Paul
IPC分类号： H02J50/12 , H02J50/80 , H02J50/90 , H03F3/20
摘要： Apparatus, systems and methods for load-adaptive 3D wireless charging are disclosed. In a 3D charging system of an example embodiment, features comprise a 3D coil design that provides magnetic field distribution coverage for a 3D charging space, e.g. hemi-spherical space/volume; a push-pull class EF2 PA with EMI filter and transmitter circuitry that provides constant current to the 3D coil, with current direction, phase and timing control capability to adapt to load conditions; reactance shift detection circuitry comprising a voltage sensor, current sensor and phase detector and hardware for fast, real-time, computation of reactance and comparison to upper and lower limits for load-adaptive reactance tuning and for auto-protection; and a switchable tuning capacitor network arrangement of shunt and series capacitors configured for auto-tuning of input impedance, e.g. in response to a X detection trigger signal, which enables both coarse-tuning and uniform fine-tuning steps over an extended reactance range.

8. 发明申请

WO2015157845A1 EMBEDDED PACKAGING FOR DEVICES AND SYSTEMS COMPRISING LATERAL GAN POWER TRANSISTORS 审中-公开
标题翻译：用于装置和包含侧向功率晶体管的系统的嵌入式封装
公开(公告)号：WO2015157845A1
公开(公告)日：2015-10-22
申请号：PCT/CA2015/000244
申请日：2015-04-15
申请人： GAN SYSTEMS INC.
发明人： KLOWAK, Gregory P. , MIZAN, Ahmad , ROBERTS, John
IPC分类号： H01L23/00 , H01L23/28 , H01L23/535 , H01L29/20
CPC分类号： H01L23/49844 , H01L23/3107 , H01L23/4824 , H01L23/5226 , H01L23/53228 , H01L24/19 , H01L24/20 , H01L29/2003 , H01L29/778 , H01L29/78 , H01L2224/04105 , H01L2224/18 , H01L2224/2518 , H01L2224/82
摘要： Embedded packaging for devices and systems comprising lateral GaN power transistors is disclosed. The packaging assembly is suitable for large area, high power GaN transistors and comprises an assembly of a GaN power transistor and package components comprising a three level interconnect structure. In preferred embodiments, the three level interconnect structure comprises an on-chip metal layer, a copper redistribution layer and package metal layers, in which there is a graduated or tapered contact area sizing through the three levels for dividing/applying current on-chip and combining/collecting current off-chip, with distributed contacts over the active area of the GaN power device. This embedded packaging assembly provides a low inductance, low resistance interconnect structure suitable for devices and systems comprising large area, high power GaN transistors for high voltage/high current applications.
摘要翻译：公开了包括横向GaN功率晶体管的器件和系统的嵌入式封装。封装组件适用于大面积高功率GaN晶体管，并且包括GaN功率晶体管和包括三级互连结构的封装组件的组件。在优选实施例中，三电平互连结构包括片上金属层，铜再分布层和封装金属层，其中存在通过三个级别分级/施加电流片上的刻度或锥形接触面积，在GaN功率器件的有源区域上结合/收集芯片外的电流与分布式触点。该嵌入式封装组件提供适合于用于高电压/高电流应用的大面积高功率GaN晶体管的器件和系统的低电感，低电阻互连结构。

9. 发明申请

WO2015061881A1 FAULT TOLERANT DESIGN FOR LARGE AREA NITRIDE SEMICONDUCTOR DEVICES 审中-公开
标题翻译：用于大面积氮化物半导体器件的容错设计
公开(公告)号：WO2015061881A1
公开(公告)日：2015-05-07
申请号：PCT/CA2014/000762
申请日：2014-10-28
申请人： GAN SYSTEMS INC.
发明人： KLOWAK, Gregory P. , MCKNIGHT-MACNEIL, Cameron , TWEDDLE, Howard , MIZAN, Ahmad , SPRINGETT, Nigel
IPC分类号： H01L29/778 , H01L21/66 , H01L29/41 , H01L27/02 , H01L29/20
CPC分类号： H01L29/2003 , H01L22/14 , H01L22/22 , H01L29/41758 , H01L29/7786
摘要： A fault tolerant design for large area nitride semiconductor devices is provided, which facilitates testing and isolation of defective areas. A transistor comprises an array of a plurality of islands, each island comprising an active region, source and drain electrodes, and a gate electrode. Electrodes of each island are electrically isolated from electrodes of neighbouring islands in at least one direction of the array. Source, drain and gate contact pads are provided to enable electrical testing of each island. After electrical testing of islands to identify defective islands, overlying electrical connections are formed to interconnect source electrodes in parallel, drain electrodes in parallel, and to interconnect gate electrodes to form a common gate electrode of large gate width Wg. Interconnections are provided selectively to good islands, while electrically isolating defective islands. This approach makes it economically feasible to fabricate large area GaN devices, including hybrid devices.
摘要翻译：提供了大面积氮化物半导体器件的容错设计，便于测试和隔离缺陷区域。晶体管包括多个岛的阵列，每个岛包括有源区，源极和漏极以及栅电极。每个岛的电极在阵列的至少一个方向上与相邻岛的电极电隔离。提供源极，漏极和栅极接触焊盘，以实现每个岛的电气测试。在岛的电测试以识别有缺陷的岛之后，形成覆盖的电连接以使源电极并联连接，并联的漏电极，并且互连栅电极以形成具有大栅极宽度Wg的公共栅电极。选择性地向好的岛提供互连，同时电隔离有缺陷的岛。这种方法使得制造大面积GaN器件（包括混合器件）在经济上是可行的。

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