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91. 发明申请

WO2003069677A1 STRUCTURE, METHOD OF MANUFACTURING THE SAME, AND DEVICE USING THE SAME 审中-公开
标题翻译：结构，制造方法及使用该装置的装置
公开(公告)号：WO2003069677A1
公开(公告)日：2003-08-21
申请号：PCT/JP2003/001368
申请日：2003-02-10
申请人： CANON KABUSHIKI KAISHA , FUKUTANI, Kazuhiko , DEN, Tohru
发明人： FUKUTANI, Kazuhiko , DEN, Tohru
IPC分类号： H01L29/12
CPC分类号： H01L29/0665 , B82Y10/00 , C30B23/00 , C30B29/60 , G11C2216/08 , H01L29/0673 , H01L29/0676 , H01L29/12 , H01L29/7613 , H01L49/006 , Y10T428/24917
摘要： A composite structure is formed so as to contain aluminum and silicon or silicon / germanium. The composite structure comprises pillar-shaped members containing aluminum and a region containing silicon or silicon / germanium and surrounding the pillar-shaped members. The structure contains silicon or silicon / germanium at a content not less than 20 atomic% and not more than 70 atomic% relative to the total amount aluminum and silicon or silicon / germanium.
摘要翻译：形成复合结构以便包含铝和硅或硅/锗。该复合结构包括含有铝的柱状构件和含有硅或硅/锗的区域并围绕柱状构件。该结构含有相对于铝和硅或硅/锗总量不少于20原子％且不大于70原子％的硅或硅/锗。

92. 发明申请

WO2002080280A1 METHODS OF FABRICATING NANOSTRUCTURES AND NANOWIRES AND DEVICES FABRICATED THEREFROM 审中-公开
标题翻译：制造纳米结构的方法和纳米结构及其制备的器件
公开(公告)号：WO2002080280A1
公开(公告)日：2002-10-10
申请号：PCT/US2002/010002
申请日：2002-03-29
申请人： THE REGENTS OF THE UNIVERSITY OF CALIFORNIA , MAJUMDAR, Arun , SHAKOURI, Ali , SANDS, Timothy, D. , YANG, Peidong , MAO, Samuel, S. , RUSSO, Richard, E. , FEICK, Henning , KIND, Hannes , WEBER, Eicke, R. , HUANG, Michael , YAN, Haoquan , WU, Yiying , FAN, Rong
发明人： MAJUMDAR, Arun , SHAKOURI, Ali , SANDS, Timothy, D. , YANG, Peidong , MAO, Samuel, S. , RUSSO, Richard, E. , FEICK, Henning , KIND, Hannes , WEBER, Eicke, R. , HUANG, Michael , YAN, Haoquan , WU, Yiying , FAN, Rong
IPC分类号： H01L29/06
CPC分类号： H01L29/0665 , B82Y10/00 , B82Y20/00 , G02B6/107 , H01L21/0237 , H01L21/02381 , H01L21/0245 , H01L21/02521 , H01L21/02532 , H01L21/02554 , H01L21/02603 , H01L21/02645 , H01L21/02653 , H01L24/45 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/12 , H01L29/125 , H01L31/0352 , H01L33/06 , H01L33/18 , H01L33/24 , H01L35/00 , H01L41/094 , H01L41/18 , H01L41/183 , H01L2224/45565 , H01L2224/45599 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/0101 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01027 , H01L2924/01028 , H01L2924/0103 , H01L2924/01031 , H01L2924/01032 , H01L2924/01039 , H01L2924/01047 , H01L2924/01051 , H01L2924/01052 , H01L2924/01058 , H01L2924/0106 , H01L2924/01061 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01083 , H01L2924/01084 , H01L2924/04953 , H01L2924/10253 , H01L2924/10329 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01S5/341 , H01S5/3412 , Y10S977/762 , Y10S977/763 , Y10S977/764 , Y10S977/765 , Y10S977/951 , Y10T428/24994 , Y10T428/249949 , Y10T428/29 , Y10T428/2913 , Y10T428/2916 , Y10T428/292 , Y10T428/2933 , Y10T428/2958 , Y10T428/2973 , Y10T428/298 , H01L2924/00011 , H01L2924/00 , H01L2224/48
摘要： One-dimensional nanostructures having uniform diameters of less than approximately 200 nm. These inventive nanostructures, which we refer to as "nanowires", include single-crystalline homostructures as well as heterostructures of at least two single-crystalline materials having different chemical compositions. Because single-crystalline materials are used to form the heterostructure, the resultant heterostructure will be single-crystalline as well. The nanowire heterostructures are generally based on a semiconducting wire wherein the doping and composition are controlled in either the longitudinal or radial directions, or in both directions, to yield a wire that comprises different materials. Examples of resulting nanowire heterostructures include a longitudinal heterostructure nanowire (LOHN) and a coaxial heterostructure nanowire (COHN).
摘要翻译：具有小于约200nm的均匀直径的一维纳米结构。这些本发明的纳米结构，我们称之为“纳米线”，包括具有不同化学成分的至少两种单晶材料的单晶均匀结构以及异质结构。由于使用单晶材料来形成异质结构，所以得到的异质结构也将是单晶的。纳米线异质结构通常基于半导体线，其中掺杂和组成在纵向或径向方向上或在两个方向上被控制，以产生包括不同材料的导线。所得纳米线异质结构的实例包括纵向异质结构纳米线（LOHN）和同轴异质结构纳米线（COHN）。

93. 发明申请

WO01018866A1 STRONGLY TEXTURED ATOMIC RIDGES AND DOTS 审中-公开
标题翻译：强烈的纹理原型和魔法
公开(公告)号：WO01018866A1
公开(公告)日：2001-03-15
申请号：PCT/US2000/024815
申请日：2000-09-08
IPC分类号： B81B3/00 , G01N27/414 , G01Q70/06 , G01Q70/08 , H01L21/335 , H01L29/06 , H01L49/00 , H01L27/14
CPC分类号： H01L29/0665 , B22F1/0025 , B22F1/025 , B22F9/02 , C30B29/602 , G03F1/20 , H01L29/0669 , H01L29/0673 , H01L29/66439 , H01L49/006 , H01L2924/0002 , Y10S977/855 , Y10S977/874 , Y10S977/882 , Y10S977/888 , Y10S977/936 , Y10T428/12479 , H01L2924/00
摘要： The present invention provides a MOSFET device comprising: a substrate (1104) including a plurality of atomic ridges, each of the atomic ridges including a semiconductor layer comprising Si (1106) and a dielectric layer comprising a Si compound (1108); a plurality nanogrooves between the atomic ridges; at least one elongated molecule located in at least one of the nanogrooves (1110); a porous gate layer located on top of the plurality of atomic ridges (1112). The present invention also provides a membrane comprising: a substrate; and a plurality of nanowindows in the substrate and a method for forming nanowindows in a substrate. The present invention also provides a multi-tip array device comprising: a substrate; a multi-tip array of atomic tips on the substrate, the multi-tip array having a pitch of 0.94 to 5.4 nm between adjacent tips in at least one direction; and means for moving the substrate. The present invention also provides an atomic claw comprising: a mounting block; a paddle having a multi-tip array thereon, the multi-tip array having a pitch of 0.94 to 5.4 nm between adjacent tips in at least one direction; and a cantilever connected to the paddle and the mounting block, wherein the cantilever allows the paddle to be moved in at least one arcuate direction.
摘要翻译：本发明提供了一种MOSFET器件，包括：包括多个原子脊的衬底（1104），每个原子脊包括包含Si（1106）的半导体层和包含Si化合物（1108）的介电层; 在原子脊之间的多个纳米岩; 至少一个细长分子位于纳米罗（1110）中的至少一个中; 位于所述多个原子脊（1112）顶部的多孔栅层。本发明还提供了一种膜，包括：基材; 以及基板中的多个纳米窗口以及在基板中形成纳米窗口的方法。本发明还提供一种多头阵列装置，包括：基片; 在所述衬底上的多尖端的原子尖端阵列，所述多尖端阵列在至少一个方向上在相邻尖端之间具有0.94至5.4nm的间距; 以及用于移动衬底的装置。本发明还提供一种原子爪，包括：安装块; 在其上具有多尖端阵列的桨叶，所述多尖端阵列在至少一个方向上在相邻尖端之间具有0.94至5.4nm的间距; 以及连接到桨叶和安装块的悬臂，其中悬臂允许桨在至少一个弧形方向上移动。

94. 发明申请

WO2018176537A1 一种场效应晶体管及其制备方法审中-公开
公开(公告)号：WO2018176537A1
公开(公告)日：2018-10-04
申请号：PCT/CN2017/081774
申请日：2017-04-25
申请人：深圳市华星光电半导体显示技术有限公司
发明人：谢华飞
IPC分类号： H01L21/336 , H01L29/78 , H01L29/12 , H01L29/16
CPC分类号： H01L29/78684 , B82Y10/00 , B82Y30/00 , B82Y40/00 , C09D5/24 , C09D7/40 , C09D7/67 , H01L21/0206 , H01L21/02164 , H01L21/0217 , H01L21/02178 , H01L21/02271 , H01L21/02343 , H01L21/02488 , H01L21/02527 , H01L21/02601 , H01L21/02628 , H01L21/02664 , H01L21/042 , H01L21/043 , H01L21/044 , H01L27/1292 , H01L29/0665 , H01L29/127 , H01L29/16 , H01L29/1604 , H01L29/1606 , H01L29/41733 , H01L29/45 , H01L29/66045 , H01L29/66227 , H01L29/66742 , H01L29/78696
摘要：提供了一种场效应晶体管及其制备方法，该方法包括在基板上沉积第一绝缘层（S11）；在第一绝缘层上形成源极及漏极（S12）；形成覆盖源极及漏极的碳量子点有源层（S13）；在碳量子点有源层上依次形成第二绝缘层及栅极（S14）。通过上述方法，使用碳量子点为材料制备场效应晶体管中的有源层，丰富了场效应晶体管的制备材料，减少了现有技术中使用金属点膜层制备有源层时对环境的污染，同时降低了对金属元素的依赖性。

95. 发明申请

WO2017065920A1 NANOWIRE CHANNEL STRUCTURES OF CONTINUOUSLY STACKED NANOWIRES FOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) DEVICES 审中-公开
标题翻译：连续堆叠纳米线用于互补金属氧化物半导体（CMOS）器件的纳米通道结构
公开(公告)号：WO2017065920A1
公开(公告)日：2017-04-20
申请号：PCT/US2016/052039
申请日：2016-09-16
申请人： QUALCOMM INCORPORATED
发明人： XU, Jeffrey, Junhao , SONG, Stanley, Seungchul , YANG, Da , MACHKAOUTSAN, Vladimir , BADAROGLU, Mustafa , YEAP, Choh, Fei
IPC分类号： H01L21/8234 , H01L29/423 , H01L27/092 , H01L29/786 , H01L29/06 , H01L29/78 , H01L29/66
CPC分类号： H01L21/823821 , H01L21/02118 , H01L21/022 , H01L21/823431 , H01L21/823807 , H01L27/0924 , H01L29/045 , H01L29/0649 , H01L29/0665 , H01L29/0673 , H01L29/66439 , H01L29/66545 , H01L29/66795 , H01L29/775 , H01L29/7853
摘要： Nanowire channel structures of continuously stacked nanowires for complementary metal oxide semiconductor (CMOS) devices are disclosed.In one aspect, an exemplary CMOS device includes a nanowire channel structure that includes a plurality of continuously stacked nanowires.Vertically adjacent nanowires are connected at narrow top and bottom end portions of each nanowire.Thus, the nanowire channel structure comprises a plurality of narrow portions that are narrower than a corresponding plurality of central portions.A wrap-around gate material is disposed around the nanowire channel structure, including the plurality of narrow portions, without entirely wrapping around any nanowire therein.The exemplary CMOS device provides, for example, a larger effective channel width and better gate control than a conventional fin field-effect transistor (FET) (FinFET) of a similar footprint.The exemplary CMOS device further provides, for example, a shorter nanowire channel structure than a conventional nanowire FET.
摘要翻译：公开了用于互补金属氧化物半导体（CMOS）器件的连续堆叠纳米线的纳米线沟道结构。在一个方面，示例性CMOS器件包括纳米线沟道结构，纳米线沟道结构包括多个连续堆叠的纳米线。垂直相邻的纳米线连接在每个纳米线的窄的顶端部分和底端部分。因此，纳米线沟道结构包括比相应的多个中心部分更窄的多个窄部分。环绕纳米线沟道结构，包括多个窄部分，而不完全缠绕在其中的任何纳米线周围。示例性CMOS器件例如提供比传统鳍式场效应晶体管（FET）（FinFET）更大的有效沟道宽度和更好的栅极控制示例性的CMOS器件进一步提供了例如比其更短的纳米线沟道结构一个传统的纳米线FET。

96. 发明申请

WO2016196318A1 THIN-FILM PN JUNCTIONS AND APPLICATIONS THEREOF 审中-公开
标题翻译：薄膜PN结及其应用
公开(公告)号：WO2016196318A1
公开(公告)日：2016-12-08
申请号：PCT/US2016/034722
申请日：2016-05-27
申请人： WAKE FOREST UNIVERSITY
发明人： CARROLL, David
IPC分类号： H01L51/05 , B82Y30/00 , H01L25/11 , H01L27/08 , H01L29/861 , H05B41/28
CPC分类号： H01L51/0587 , B82Y30/00 , H01L25/115 , H01L27/286 , H01L29/0665 , H01L29/24 , H01L29/242 , H01L29/861
摘要： In one aspect, composite materials including a thin-film layer of lateral p-n junctions are described herein, which can be employed in circuits or various components of electrical devices. Briefly, a composite material comprises a thin-film layer including p-type regions alternating with n-type regions along a face of the thin-film layer, the p-type regions comprising electrically conductive particles dispersed in a first organic carrier and the n-type regions comprising electrically conductive particles dispersed in a second organic carrier, wherein p-n junctions are established at interfaces between the p-type and n-type regions. As described further herein, the thin-film layer is flexible, permitting the thin-film to be folded or arranged into a number of configurations to provide various circuits or components of electrical devices.
摘要翻译：在一方面，本文描述了包括横向p-n结的薄膜层的复合材料，其可以用于电气装置的电路或各种部件中。简而言之，复合材料包括薄膜层，该薄膜层包括沿着薄膜层的表面与n型区域交替的p型区域，p型区域包括分散在第一有机载体中的导电颗粒，n型区域型区域包括分散在第二有机载体中的导电颗粒，其中pn结在p型区域和n型区域之间的界面处建立。如本文进一步描述的那样，薄膜层是柔性的，允许薄膜被折叠或布置成多种构型以提供电气装置的各种电路或部件。

97. 发明申请

WO2016133245A1 팔라듐이 첨가된 산화코발트 나노구조체를 이용한 메틸벤젠 가스센서 및 그 제조 방법 审中-公开
标题翻译：使用加入氧化钴的纳米结构的甲基苯气体传感器及其制造方法
公开(公告)号：WO2016133245A1
公开(公告)日：2016-08-25
申请号：PCT/KR2015/004765
申请日：2015-05-12
申请人： 고려대학교 산학협력단
发明人： 이종흔 , 강윤찬 , 윤지욱 , 황수진
IPC分类号： G01N27/407 , B82B1/00
CPC分类号： G01N33/0027 , B82B1/00 , G01N27/407 , H01L21/02565 , H01L21/02601 , H01L21/02628 , H01L29/0665 , H01L29/245
摘要： 본 발명은 메틸벤젠 가스를 선택적으로 그리고 고감도로 감응하는 개량된 성능의 산화물 반도체형 가스센서 및 그 제조 방법을 제공한다. 본 발명에 따른 가스센서는, 가스 감응층이 팔라듐(Pd)이 첨가된 산화코발트(Co 3 O 4 ) 나노구조체로 이루어진 메틸벤젠 가스 감지용 가스센서이다. 본 발명은 Pd이 첨가된 Co 3 O 4 나노 중공계층구조 및 난황구조를 이용하여 5 ppm의 저농도에서 자일렌 가스에 대하여 150 이상, 톨루엔 가스에 대하여 100배 이상의 고감도를 나타내고 자일렌 및 톨루엔을 포함하는 메틸벤젠 가스에 대한 선택적 감지(에탄올 가스 감도 대비 자일렌 30배, 톨루엔 15배 이상)가 매우 우수한 산화물 반도체형 가스센서를 제공할 수 있다.
摘要翻译：本发明提供：具有改进性能的氧化物半导体型气体传感器，其以选择性和高灵敏度敏化甲基苯气体; 及其制造方法。根据本发明的气体传感器涉及用于感测甲苯气体的气体传感器，其中气敏层由加钯的氧化钴（Co 3 O 4）纳米结构构成。本发明可以提供一种氧化物半导体型气体传感器，其通过使用Pd添加的Co 3 O 4中空分层纳米结构和蛋黄 - 壳结构，对于二甲苯气体显示出高达150倍或更高的灵敏度，并且对于甲苯气体的浓度低于5ppm，对甲苯（包括二甲苯和甲苯）（对于二甲苯为30倍或更高，甲苯为15倍或更多，与乙醇气体的敏感性相比）具有极好的选择性检测。

98. 发明申请

WO2015047349A1 TRANSISTOR STRUCTURE WITH VARIABLE CLAD/CORE DIMENSION FOR STRESS AND BAND GAP MODULATION 审中-公开
标题翻译：用于应力和带隙调制的可变分离/核心尺寸的晶体管结构
公开(公告)号：WO2015047349A1
公开(公告)日：2015-04-02
申请号：PCT/US2013/062468
申请日：2013-09-27
申请人： INTEL CORPORATION , RACHMADY, Willy , LE, Van H. , PILLARISETTY, Ravi , RADOSAVLJEVIC, Marko , DEWEY, Gilbert , MUKHERJEE, Niloy , KAVALIEROS, Jack T. , CHAU, Robert S. , CHU-KUNG, Benjamin , KOTLYAR, Roza
发明人： RACHMADY, Willy , LE, Van H. , PILLARISETTY, Ravi , RADOSAVLJEVIC, Marko , DEWEY, Gilbert , MUKHERJEE, Niloy , KAVALIEROS, Jack T. , CHAU, Robert S. , CHU-KUNG, Benjamin , KOTLYAR, Roza
IPC分类号： H01L29/78 , H01L29/20 , H01L21/336
CPC分类号： H01L29/7842 , H01L29/0665 , H01L29/0673 , H01L29/068 , H01L29/1054 , H01L29/16 , H01L29/165 , H01L29/20 , H01L29/42392 , H01L29/512 , H01L29/66439 , H01L29/66568 , H01L29/775 , H01L29/778 , H01L29/78696
摘要： An apparatus including a heterostructure disposed on a substrate and defining a channel region, the heterostructure including a first material having a first band gap less than a band gap of a material of the substrate and a second material having a second band gap that is greater than the first band gap; and a gate stack on the channel region, wherein the second material is disposed between the first material and the gate stack. A method including forming a first material having a first band gap on a substrate; forming a second material having a second band gap greater than the first band gap on the first material; and forming a gate stack on the second material.
摘要翻译：一种包括设置在衬底上并限定沟道区的异质结构的装置，所述异质结构包括具有小于所述衬底的材料的带隙的第一带隙的第一材料和具有大于所述衬底的材料的第二带隙的第二材料第一个带隙; 以及栅极堆叠，其中所述第二材料设置在所述第一材料和所述栅极叠层之间。一种方法，包括在基板上形成具有第一带隙的第一材料; 形成具有大于所述第一材料上的所述第一带隙的第二带隙的第二材料; 以及在所述第二材料上形成栅叠层。

99. 发明申请

WO2014152509A1 PLASMONIC DEVICE ENHANCEMENTS 审中-公开
标题翻译： PLASMONIC设备增强
公开(公告)号：WO2014152509A1
公开(公告)日：2014-09-25
申请号：PCT/US2014/027417
申请日：2014-03-14
申请人： SOLAN, LLC , DAVIS, Mark, Alan
发明人： DAVIS, Mark, Alan
IPC分类号： H01L31/0248 , H01L31/028 , H01L31/18
CPC分类号： H01L49/006 , B82Y10/00 , B82Y20/00 , B82Y30/00 , B82Y40/00 , G02B5/008 , H01L29/0665 , H01L29/1606 , H01L29/1608 , H01L31/0248 , H01L31/028 , H01L31/18 , Y02E10/547
摘要： An integrated graphene-based structure comprises an N-dimensional array of elements formed on a surface of a substrate. The N-dimensional array of elements includes a plurality of rows. Each respective row in the plurality of rows comprises a corresponding plurality of elements formed along a first dimension. Each element in the corresponding plurality of elements comprising at least one graphene stack and separated from an adjacent element along the first dimension by a first average spatial separation thereby resulting in a first periodicity in lateral spacing along the first dimension. Each respective row in the plurality of rows is separated from an adjacent row along a second dimension by a second average spatial separation, thereby resulting in a second periodicity in lateral spacing along the second dimension. The N-dimensional array exhibits a set of characteristic electromagnetic interference properties in response to electromagnetic radiation incident on the N-dimensional array.
摘要翻译：集成的基于石墨烯的结构包括形成在基底表面上的元素的N维阵列。元素的N维阵列包括多行。多行中的每个行包括沿着第一维度形成的对应的多个元件。相应的多个元件中的每个元件包括至少一个石墨烯堆叠并且沿着第一维度与相邻元件分开第一平均空间间隔，从而导致沿第一维度的横向间隔的第一周期性。多行中的每一行都沿着第二维与相邻行分开第二平均空间间隔，从而导致沿着第二维度的横向间隔的第二周期性。 N维阵列响应于入射到N维阵列上的电磁辐射，表现出一组特征电磁干扰特性。

100. 发明申请

WO2014142039A1 論理演算素子审中-公开
标题翻译：逻辑操作元件
公开(公告)号：WO2014142039A1
公开(公告)日：2014-09-18
申请号：PCT/JP2014/056079
申请日：2014-03-09
申请人：独立行政法人科学技術振興機構
发明人：真島　豊 , 寺西　利治 , 松本　和彦 , 前橋　兼三 , 須崎　友文 , 大野　恭秀 , 松崎　功佑 , ギョーム　ヒューベル　フレデリック　ハケンベルジェ
IPC分类号： H01L29/66 , H01L29/06
CPC分类号： H01L29/7613 , B82Y10/00 , B82Y40/00 , H01L29/0665 , H01L29/127 , H01L29/41725 , H01L29/4232 , H01L29/66439
摘要：　３以上の入力の論理演算を一つのユニークなデバイスで実現する論理演算素子を提供する。論理演算素子３０は、ナノギャップを有するように設けられた一方の電極５Ａ及び他方の電極５Ｂと、一方の電極５Ａと他方の電極５Ｂとの間に絶縁して配置された金属ナノ粒子７と、金属ナノ粒子７の電荷を調整するための複数のゲート電極５Ｃ，５Ｄ，１１，１１Ａ，１１Ｂと、を備え、３つ以上のゲート電極５Ｃ，５Ｄ，１１，１１Ａ，１１ｂに印加される電圧に従って一方の電極５Ａと他方の電極５Ｂとの間に流れる電流が制御される。
摘要翻译：提供了使用单个唯一设备来执行三个或更多个输入逻辑运算的逻辑运算元件。所述逻辑运算元件（30）设置有电极（5A）和另一电极（5B），所述电极（5A）和所述另一电极（5B）被布置成具有纳米隙，金属纳米颗粒（7）被绝缘并且布置在所述电极另一个电极（5B）和用于调节金属纳米颗粒（7）的电负载的多个栅电极（5C，5D，11,11A，11B）。根据施加到三个以上的栅电极（5C，5D，11,11A，11B）的电压来控制在电极（5A）和另一电极（5B）之间流动的电流。

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