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1. 发明申请

WO2008019252A1 SYSTEMS AND METHODS FOR DISTINGUISHING REFLECTIONS OF MULTIPLE LASER BEAMS FOR CALIBRATION FOR SEMICONDUCTOR STRUCTURE PROCESSING 审中-公开
标题翻译：用于确定用于半导体结构处理校准的多个激光束反射的系统和方法
公开(公告)号：WO2008019252A1
公开(公告)日：2008-02-14
申请号：PCT/US2007/074773
申请日：2007-07-30
申请人： ELECTRO SCIENTIFIC INDUSTRIES, INC. , LO, Ho Wai , HEMENWAY, David Martin , NILSEN, Brady , BRULAND, Kelly J.
发明人： LO, Ho Wai , HEMENWAY, David Martin , NILSEN, Brady , BRULAND, Kelly J.
IPC分类号： H01L21/66 , H01L21/82
CPC分类号： H01L23/5258 , G11C17/14 , G11C17/143 , H01L2924/0002 , H01L2924/00
摘要： A system (700A, 700B, 800) determines relative positions of a semiconductor substrate (240) and a plurality of laser beam spots on or within the semiconductor substrate (240) in a machine for selectively irradiating structures on or within the substrate using a plurality of laser beams. The system (700A, 700B, 800) comprises a laser source (220, 720), first and second laser beam propagation paths, first and second reflection sensors (798, 853), and a processor (680). The laser source (220, 720) produces at least the first and second laser beams, which propagate toward the substrate along the first and second propagation paths, respectively, which have respective first and second axes that intersects the substrate at respective first and second spots. The reflection sensors (798, 853) are positioned to detect reflection of the spots, as the spots moves relative to the substrate, thereby generating reflection signals. The processor (680) is configured to determine, based on the reflection signals, positions of the spots on or within the substrate (240).
摘要翻译：系统（700A，700B，800）确定半导体衬底（240）中的多个激光束斑点和半导体衬底（240）内的多个激光束斑点在机器中的相对位置，用于使用多个的激光束。系统（700A，700B，800）包括激光源（220,720），第一和第二激光束传播路径，第一和第二反射传感器（798,853）以及处理器（680）。所述激光源（220,720）至少产生所述第一和第二激光束，所述第一和第二激光束分别沿着所述第一和第二传播路径传播到所述衬底，所述第一和第二激光束具有相应的第一和第二轴线，所述第一和第二轴线在相应的第一和第二点。当反射传感器（798,853）相对于基板移动时，反射传感器（798,853）被定位成检测光斑的反射，从而产生反射信号。处理器（680）被配置为基于反射信号确定衬底（240）上或衬底（240）内的点的位置。

2. 发明申请

WO2008005944A2 SYSTEMS AND METHODS FOR ALIGNMENT OF LASER BEAM (S) FOR SEMICONDUCTOR LINK PROCESSING 审中-公开
标题翻译：用于半导体链接处理的激光束对准系统和方法
公开(公告)号：WO2008005944A2
公开(公告)日：2008-01-10
申请号：PCT/US2007/072683
申请日：2007-07-02
申请人： ELECTRO SCIENTIFIC INDUSTRIES, INC. , BRULAND, Kelly, J. , SWARINGEN, Steven, N.
发明人： BRULAND, Kelly, J. , SWARINGEN, Steven, N.
IPC分类号： G11C17/14 , G11C29/00 , H01L23/525
CPC分类号： H01L23/5258 , B23K26/043 , G11C17/14 , G11C17/143 , H01L2924/0002 , H01L2924/00
摘要： A method (400) makes a discrete adjustment to static alignment of a laser beam in a machine (500, 700A, 700B, 700C, 800, 1000) for selectively irradiating conductive links on or within a semiconductor substrate (240) using the laser beam. The laser beam propagates along a beam path (510, 640, 710) having an axis (650) extending from a laser to a laser beam spot (110, 610) at a location on or within the semiconductor substrate (240). The method (400) generates (420), based on at least one measured characteristic of the laser beam, at least one signal to control an adjustable optical element (555, 560, 720, 730, 744, 746, 836, 838, 840, 854, 860, 225) of the machine (500, 700A, 700B, 700C, 800, 1000) effecting the laser beam path (510, 640, 710). The method (400) also sends (430) said at least one signal to the adjustable optical element (555, 560, 720, 730, 744, 746, 836, 838, 840, 854, 860, 225). The method (400) then adjusts (440) the adjustable optical element (555, 560, 720, 730, 744, 746, 836, 838, 840, 854, 860, 225) in response to said at least one signal so as to improve static alignment of the laser beam path axis (650).
摘要翻译：一种方法（400）对在机器（500,700A，700B，700C，800,1000）中的激光束的静态对准进行离散调整，用于使用激光束选择性地照射半导体衬底（240）上或内部的导电连接。激光束沿着具有从激光器延伸到半导体衬底（240）上或其上的位置处的激光束点（110,610）的轴（650）的光束路径（510,640,710）传播。方法（400）基于激光束的至少一个测量特性产生（420）至少一个信号以控制可调光学元件（555,560,720,730,744,746,836,838,840 ，激光束路径（510,640,710）的机器（500,700A，700B，700C，800,1000）中的至少一个，854,860,225）。方法（400）还向可调光学元件（555,560,720,730,744,746,836,838,840,854,860,225）发送（430）所述至少一个信号。然后，方法（400）响应于所述至少一个信号调整（440）可调节光学元件（555,560,720,730,744,746,836,838,840,854,860,225），以便改善激光束路径轴（650）的静态对准。

3. 发明申请

WO2016134650A1 一种实现单线可编程电路的方法和系统审中-公开
公开(公告)号：WO2016134650A1
公开(公告)日：2016-09-01
申请号：PCT/CN2016/074387
申请日：2016-02-24
申请人：智恒厦门微电子有限公司
发明人：郑政
IPC分类号： G06F13/14 , G06F13/38
CPC分类号： G11C17/143 , G06F13/14 , G06F13/38 , G11C17/18
摘要：一种实现单线可编程电路的方法及其系统，该系统包括主电路模块（11）、控制主电路模块（11）的OTP存储器模块（12）、控制OTP存储器（12）的读/写熔断的OTP控制模块（13）、同OTP控制模块（13）通讯的单线转多线模块（14）、由OTP模块（12）的其中一位OTPL控制的S1,S2,S3模拟开关、同S1（18）并联的电阻R1（17）、可由S3控制的时钟（15）；R1（17）及S1（18）并联电路的一端与主电路模块（11）相连，另一端和电路的输出OUT（16）相连；单线转多线电路模块（14）的一端可选择通过S2和OUT（16）相连或直接和OUT（16）相连，另一端与OTP控制模块（13）相连；OTP控制模块（13）与OTP存储器模块（12）相连，并通过OTP存储器模块（12）实现对电路的各种参数的设置。该系统在芯片切换编程模式和正常输出模式时不需要重新启动芯片，提高了芯片编程效率，简化了芯片编程系统。

4. 发明申请

WO2006053321A2 CONTROLLING CLOCK RATE USING CONFIGURATION INFORMATION 审中-公开
标题翻译：使用配置信息控制时钟速率
公开(公告)号：WO2006053321A2
公开(公告)日：2006-05-18
申请号：PCT/US2005/041325
申请日：2005-11-14
申请人： ATI TECHNOLOGIES, INC. , BROWN, Andrew, S.
发明人： BROWN, Andrew, S.
IPC分类号： G06F1/04
CPC分类号： G06F1/04 , G06F1/08 , G11C17/143 , G11C17/165 , G11C17/18 , G11C29/785 , G11C2029/4402
摘要： Systems and methods for controlling clock rates of circuits are provided. The systems and methods, collectively referred to as clock rate control, generate a clock rate control parameter from data of one or more fuses. The clock rate control detects any overclocked signal of received clock signals by determining a clock signal is running faster than a threshold represented by the clock rate control parameter. The clock rate control controls a circuit clock rate using a selected signal of the clock signals that is not an overclocked signal.
摘要翻译：提供了用于控制电路的时钟速率的系统和方法。统称为时钟速率控制的系统和方法从一个或多个熔丝的数据产生时钟速率控制参数。时钟速率控制通过确定时钟信号比由时钟速率控制参数表示的阈值运行得更快来检测接收到的时钟信号的任何超频信号。时钟速率控制使用不是超频信号的时钟信号的选定信号来控制电路时钟速率。

5. 发明申请

WO2006043687A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2006043687A1
公开(公告)日：2006-04-27
申请号：PCT/JP2005/019450
申请日：2005-10-18
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , ABE, Hiroko , IWAKI, Yuji , YUKAWA, Mikio , YAMAZAKI, Shunpei , ARAI, Yasuyuki , WATANABE, Yasuko , MORIYA, Yoshitaka
发明人： ABE, Hiroko , IWAKI, Yuji , YUKAWA, Mikio , YAMAZAKI, Shunpei , ARAI, Yasuyuki , WATANABE, Yasuko , MORIYA, Yoshitaka
IPC分类号： H01L27/10 , H01L27/28 , H01L51/05 , G11C13/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/00 , G11C17/14 , G11C17/143 , G11C17/16 , H01L27/285 , H01L51/0051 , H01L51/0059
摘要： The present invention provides a semiconductor device which has a storage element having a simple structure in which an organic compound layer is sandwiched between a pair of conductive layers and a manufacturing method of such a semiconductor device. With this characteristic, a semiconductor device having a storage circuit which is nonvolatile, additionally recordable, and easily manufactured and a manufacturing method of such a semiconductor device are provided. A semiconductor device according to the present invention has a plurality of field-effect transistors provided over an insulating layer and a plurality of storage elements provided over the plurality of field-effect transistors. Each of the plurality of field-effect transistors uses a single-crystal semiconductor layer as a channel portion and each of the plurality of storage elements is an element in which a first conductive layer, an organic compound layer, and a second conductive layer are stacked in order.
摘要翻译：本发明提供一种半导体器件，其具有其中有机化合物层夹在一对导电层之间的简单结构的存储元件和这种半导体器件的制造方法。利用该特征，提供了具有非易失性，可追加记录和容易制造的存储电路的半导体器件和这种半导体器件的制造方法。根据本发明的半导体器件具有设置在绝缘层上的多个场效应晶体管和设置在多个场效应晶体管上的多个存储元件。多个场效应晶体管中的每一个使用单晶半导体层作为沟道部分，并且多个存储元件中的每一个是其中堆叠第一导电层，有机化合物层和第二导电层的元件为了。

6. 发明申请

WO2003052890A1 PROCESSING A MEMORY LINK WITH A SET OF AT LEAST TWO LASER PULSES 审中-公开
标题翻译：用一组至少两个激光脉冲处理存储器链接
公开(公告)号：WO2003052890A1
公开(公告)日：2003-06-26
申请号：PCT/US2002/040410
申请日：2002-12-17
申请人： ELECTRO SCIENTIFIC INDUSTRIES, INC. , SUN, Yunlong , SWENSON, Edward, J. , HARRIS, Richard, S.
发明人： SUN, Yunlong , SWENSON, Edward, J. , HARRIS, Richard, S.
IPC分类号： H01S3/10
CPC分类号： H01S3/0057 , B23K26/0604 , B23K26/0613 , B23K26/0622 , B23K26/0624 , B23K26/067 , G11C17/14 , G11C17/143 , H01L23/5258 , H01L2924/0002 , H01S5/4012 , H01L2924/00
摘要： A set (50) of laser pulses (52) is employed to sever a conductive link (22) in a memory or other IC chip. The duration of the set (50) is preferably shorter than 500 ns; and the pulse width of each laser pulse (52) within the set (50) is preferably within a range of about 0.1 ps to 30 ns. The set (50) can be treated as a single "pulse" by conventional laser positioning systems (62) to perform on-the-fly link removal without stopping whenever the laser system (60) fires a set (50) of laser pulses (52) at each link (22). Conventional IR wavelengths or their harmonics can be employed.
摘要翻译：激光脉冲（52）的组（50）被用于切断存储器或其他IC芯片中的导电链路（22）。该组（50）的持续时间优选短于500ns; 并且该组（50）内的每个激光脉冲（52）的脉冲宽度优选在约0.1ps至30ns的范围内。该组（50）可以被视为单个“脉冲” 通过传统的激光定位系统（62）在每个激光系统（60）在每个链路（22）处激发一组（50个）激光脉冲（52）时执行即时链路移除而不停止。传统的红外波长或它们的谐波可以被采用。

7. 发明申请

WO2015147782A1 ANTIFUSE ELEMENT USING SPACER BREAKDOWN 审中-公开
标题翻译：防爆元件使用间隔开
公开(公告)号：WO2015147782A1
公开(公告)日：2015-10-01
申请号：PCT/US2014/031592
申请日：2014-03-24
申请人： INTEL CORPORATION , CHANG, Ting , JAN, Chia-Hong , HAFEZ, Walid, M.
发明人： CHANG, Ting , JAN, Chia-Hong , HAFEZ, Walid, M.
IPC分类号： H01L23/62 , G11C29/04
CPC分类号： H01L23/5252 , G11C11/005 , G11C17/143 , G11C17/16 , G11C17/165 , H01L23/62 , H01L27/1021 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： Techniques and circuitry are disclosed for efficiently implementing programmable memory array circuit architectures, including both non- volatile and volatile memories. The memory circuitry employs an antifuse scheme that includes an array of IT bitcells, wherein each bitcell effectively contains one gate or transistor-like device that provides both an antifuse element and a selector device for that bitcell. In particular, the bitcell device has asymmetric trench-based source/drain contacts such that one contact forms a capacitor in conjunction with the spacer and gate metal, and the other contact forms a diode in conjunction with a doped diffusion area and the gate metal. The capacitor serves as the antifuse element of the bitcell, and can be programmed by breaking down the spacer. The diode effectively provides a Schottky junction that serves as a selector device which can eliminate program and read disturbs from bitcells sharing the same bitline/wordline.
摘要翻译：公开了用于有效实现包括非易失性和易失性存储器的可编程存储器阵列电路架构的技术和电路。存储器电路采用包括IT比特单元阵列的反熔丝方案，其中每个位单元有效地包含一个栅极或类似晶体管的器件，该器件为该位单元提供反熔丝元件和选择器器件。特别地，位单元器件具有不对称的基于沟槽的源极/漏极触点，使得一个触点与间隔物和栅极金属结合形成电容器，而另一个触点与掺杂扩散区域和栅极金属结合形成二极管。电容器用作位单元的反熔断元件，并且可以通过分隔间隔来编程。二极管有效地提供肖特基结，其作为选择器装置，其可以消除共享相同位线/字线的位单元的程序和读取干扰。

8. 发明申请

WO2006009818A3 SEMICONDUCTOR STRUCTURE PROCESSING USING MULTIPLE LASER BEAM SPOTS 审中-公开
标题翻译：使用多个激光束的半导体结构处理
公开(公告)号：WO2006009818A3
公开(公告)日：2007-03-01
申请号：PCT/US2005021406
申请日：2005-06-16
申请人： ELECTRO SCIENT IND INC , BRULAND KELLY J , LO HO WAI , BAIRD BRIAN W , EVANS FRANK G , HARRIS RICHARD S , SUN YUNLONG , SWARINGEN STEPHEN N
发明人： BRULAND KELLY J , LO HO WAI , BAIRD BRIAN W , EVANS FRANK G , HARRIS RICHARD S , SUN YUNLONG , SWARINGEN STEPHEN N
IPC分类号： H01L21/26
CPC分类号： B23K26/067 , B23K26/0676 , B23K26/0853 , B23K2201/40 , G11C17/143 , G11C17/16 , G11C17/18 , G11C29/02 , G11C29/027 , H01L21/268 , H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： Methods and systems process electrically conductive links on or within a semiconductor substrate (740) using multiple laser beams. For example, a method utilizes N series of laser pulses to obtain a throughput benefit, wherein N = 2. The links are arranged in a plurality of substantially parallel rows extending in a generally lengthwise direction. The N series of laser pulses propagate along N respective beam axes until incident upon selected links. The pattern of resulting laser spots may be on links in N distinct rows, on distinct links in the same row, or on the same link, either partially or completely overlapping. The resulting laser spots may be offset from one another in the lengthwise direction of the rows or offset from one another in a direction perpendicular to the lengthwise direction of the rows, or both.
摘要翻译：方法和系统使用多个激光束在半导体衬底（740）上或内部处理导电链路。例如，一种利用N系列激光脉冲获得吞吐量优点的方法，其中N = 2。所述链路被布置成沿大致长度方向延伸的多个基本平行的行。 N系列激光脉冲沿着N个相应的波束轴传播，直到在所选择的链路上入射。所产生的激光斑点的图案可以是N个不同行中的链接，在相同行中的不同链接上，或者在同一链接上，部分地或完全重叠。所得到的激光点可以在行的长度方向上彼此偏移，或者在与行的长度方向垂直的方向上彼此偏移，或者两者偏离。

9. 发明申请

WO2006053320A2 SYSTEM AND METHOD FOR CONFIGURING AN INTEGRATED CIRCUIT 审中-公开
标题翻译：用于配置集成电路的系统和方法
公开(公告)号：WO2006053320A2
公开(公告)日：2006-05-18
申请号：PCT/US2005/041324
申请日：2005-11-14
申请人： ATI TECHNOLOGIES, INC. , BROWN, Andrew, S.
发明人： BROWN, Andrew, S.
IPC分类号： G06F1/04
CPC分类号： G06F1/04 , G06F1/08 , G11C17/143 , G11C17/165 , G11C17/18 , G11C29/785 , G11C2029/4402
摘要： A system and method for configuring an integrated circuit. Embodiments include a method for manufacturing an integrated circuit (IC), comprising associating configuration items of the integrated circuit with at least one fuse of at least one type of fuse, wherein a fuse comprises a bit field and a physical fuse, and configuring the integrated circuit by setting the at least one fuse to a value, comprising logically combining multiple fuse values to determine a particular configuration, wherein at least one of fuse values if not alterable after manufacture of the IC.
摘要翻译：一种用于配置集成电路的系统和方法。实施例包括用于制造集成电路（IC）的方法，包括将集成电路的配置项与至少一种类型的熔丝的至少一个熔丝相关联，其中熔丝包括位域和物理熔丝，并且将集成电路通过将所述至少一个熔丝设置为值，包括逻辑地组合多个熔丝值以确定特定配置，其中，在所述IC制造之后不可更改的熔丝值中的至少一个。

10. 发明申请

WO2006051996A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2006051996A1
公开(公告)日：2006-05-18
申请号：PCT/JP2005/020983
申请日：2005-11-09
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , ABE, Hiroko , YUKAWA, Mikio , NOMURA, Ryoji , YAMAZAKI, Shunpei , NEMOTO, Yukie
发明人： ABE, Hiroko , YUKAWA, Mikio , NOMURA, Ryoji , YAMAZAKI, Shunpei , NEMOTO, Yukie
IPC分类号： H01L27/10 , H01L27/28 , H01L29/786 , H01L45/00 , H01L49/02 , H01L51/05 , H01Q1/38
CPC分类号： H01L27/2463 , B82Y10/00 , G11C13/00 , G11C13/0004 , G11C13/0014 , G11C13/0016 , G11C13/0069 , G11C17/143 , G11C17/16 , G11C17/18 , G11C2013/009 , G11C2213/77 , G11C2213/79 , H01L21/8221 , H01L23/66 , H01L27/0688 , H01L27/1266 , H01L27/2409 , H01L27/2436 , H01L27/283 , H01L45/06 , H01L45/065 , H01L45/1213 , H01L45/1233 , H01L45/141 , H01L45/143 , H01L45/144 , H01L51/0098 , H01L2223/6677 , H01L2224/48091 , H01L2224/48137 , H01L2224/49107 , H01L2224/73265 , H01L2924/12044 , H01L2924/00014 , H01L2924/00
摘要： The invention provides a semiconductor device which is non-volatile, easily manufactured, and can be additionally written. A semiconductor device of the invention includes a plurality of transistors, a conductive layer which functions as a source wiring or a drain wiring of the transistors, and a memory element which overlaps one of the the plurality of transistors, and a conductive layer which functions as an antenna. The memory element includes a first conductive layer, an organic compound layer and a phase change layer, and a second conductive layer stacked in this order. The conductive layer which functions as an antenna and a conductive layer which functions as a source wiring or a drain wiring of the plurality of transistors are provided on the same layer.
摘要翻译：本发明提供了一种非易失性，易于制造并且可以额外写入的半导体器件。本发明的半导体器件包括多个晶体管，用作晶体管的源极布线或漏极布线的导电层，以及与多个晶体管之一重叠的存储元件，以及与第天线。存储元件包括第一导电层，有机化合物层和相变层，以及依次层叠的第二导电层。用作天线的导电层和用作多个晶体管的源极布线或漏极布线的导电层设置在同一层上。

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