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1. 发明申请

WO2016043738A1 DIE WITH INTEGRATED MICROPHONE DEVICE USING THROUGH-SILICON VIAS (TSVs) 审中-公开
标题翻译：使用通过硅胶（TSV）的集成麦克风设备
公开(公告)号：WO2016043738A1
公开(公告)日：2016-03-24
申请号：PCT/US2014/056133
申请日：2014-09-17
申请人： INTEL CORPORATION , LEE, Kevin J. , SARASWAT, Ruchir , ZILLMANN, Uwe , RAO, Valluri Bob , LUND-LARSEN, Tor , COWLEY, Nicholas P.
发明人： LEE, Kevin J. , SARASWAT, Ruchir , ZILLMANN, Uwe , RAO, Valluri Bob , LUND-LARSEN, Tor , COWLEY, Nicholas P.
IPC分类号： H01L27/04 , H01L21/60 , B81B7/02
CPC分类号： H04R1/04 , B81B7/02 , B81B2201/0257 , B81B2207/096 , B81C1/00158 , B81C2201/0132 , B81C2203/0109 , H01L21/6835 , H01L21/6836 , H01L21/76898 , H01L23/481 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/131 , H01L2224/16227 , H01L2224/27002 , H01L2224/27618 , H01L2224/27848 , H01L2224/29011 , H01L2224/2919 , H01L2224/3201 , H01L2224/32058 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/83005 , H01L2224/83193 , H01L2224/83438 , H01L2224/8346 , H01L2224/83488 , H01L2224/8359 , H01L2224/83688 , H01L2224/83862 , H01L2224/92 , H01L2224/9222 , H01L2224/92225 , H01L2924/1461 , H01L2924/15311 , H01L2924/161 , H01L2924/16151 , H01L2924/16152 , H01L2924/163 , H01L2924/166 , H04R1/406 , H04R19/005 , H04R19/04 , H01L2924/014 , H01L2924/0665 , H01L2924/01014 , H01L2924/00014 , H01L2924/00012 , H01L2224/11 , H01L2224/27 , H01L2224/83 , H01L2224/81 , H01L2221/68304
摘要： Embodiments of the present disclosure describe a die with integrated microphone device using through-silicon vias (TSVs) and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a semiconductor substrate having a first side and a second side disposed opposite to the first side, an interconnect layer formed on the first side of the semiconductor substrate, a through-silicon via (TSV) formed through the semiconductor substrate and configured to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate, and a microphone device formed on the second side of the semiconductor substrate and electrically coupled with the TSV. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例描述了具有使用穿硅通孔（TSV）和相关联的技术和配置的集成麦克风设备的管芯。在一个实施例中，一种装置包括一种装置，包括具有第一侧和与第一侧相对设置的第二侧的半导体衬底，形成在半导体衬底的第一侧上的互连层，形成的穿硅通孔（TSV）通过半导体衬底并且被配置为在半导体衬底的第一侧和半导体衬底的第二侧之间布置电信号，以及形成在半导体衬底的第二侧上并与TSV电耦合的麦克风器件。可以描述和/或要求保护其他实施例。

2. 发明申请

WO2016022125A1 METHOD AND APPARATUS FOR FORMING BACKSIDE DIE PLANAR DEVICES AND SAW FILTER 审中-公开
标题翻译：用于形成背面平面设备和SAW滤波器的方法和装置
公开(公告)号：WO2016022125A1
公开(公告)日：2016-02-11
申请号：PCT/US2014/050134
申请日：2014-08-07
申请人： INTEL CORPORATION , LEE, Kevin J. , SARASWAT, Ruchir , ZILLMANN, Uwe , COWLEY, Nicholas P. , GOLDMAN, Richard J.
发明人： LEE, Kevin J. , SARASWAT, Ruchir , ZILLMANN, Uwe , COWLEY, Nicholas P. , GOLDMAN, Richard J.
IPC分类号： H03H7/00 , H04B1/00
CPC分类号： H01L24/09 , G06F1/16 , H01F27/2804 , H01L23/481 , H01L23/5226 , H01L23/5227 , H01L23/525 , H01L23/645 , H01L23/66 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L2223/6616 , H01L2223/6661 , H01L2223/6677 , H01L2224/0233 , H01L2224/02372 , H01L2224/02375 , H01L2224/02379 , H01L2224/0401 , H01L2224/05548 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H03H7/42 , H03H9/64
摘要： Described is an apparatus which comprises: a backside of a first die having a redistribution layer(RDL); one or more passive planar devices disposed on the backside, the one or more passive planar devices formed in the RDL; a front-side of the first die having an active region; and one or more vias to couple the active region with the one or more passive planar devices.
摘要翻译：描述了一种装置，其包括：具有再分配层（RDL）的第一管芯的背面; 设置在背面的一个或多个无源平面装置，形成在RDL中的一个或多个无源平面装置; 所述第一管芯的前侧具有活性区域; 以及一个或多个通孔，以将有源区域与一个或多个无源平面器件耦合。

3. 发明申请

WO2013095514A1 A DUAL MODE VOLTAGE REGULATOR WITH DYNAMIC RECONFIGURATION CAPABILITY 审中-公开
标题翻译：具有动态重构能力的双模电压调节器
公开(公告)号：WO2013095514A1
公开(公告)日：2013-06-27
申请号：PCT/US2011/066866
申请日：2011-12-22
申请人： INTEL CORPORATION , COWLEY, Nicholas P. , TALBOT, Andrew D. , ALI, Isaac , PINSON, Keith , PERRY, Colin L. , AITKEN, Matthew T. , KAN, Chi Man , MUDD, Mark S. , SPINKS, Stephen J. , MARTIN, Alan J. , BARBER, William L.
发明人： COWLEY, Nicholas P. , TALBOT, Andrew D. , ALI, Isaac , PINSON, Keith , PERRY, Colin L. , AITKEN, Matthew T. , KAN, Chi Man , MUDD, Mark S. , SPINKS, Stephen J. , MARTIN, Alan J. , BARBER, William L.
IPC分类号： G05F1/10 , G05F1/575
CPC分类号： H02M3/156 , G05F1/46 , H02M3/158 , H02M2001/0045
摘要： A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.
摘要翻译：根据一个实施例的双模式电压调节器包括无源调节器电路; 开关稳压电路; 以及控制器电路，被配置为监视双模式电压调节器的操作参数，并且在输入电压端口和输出负载之间选择性地耦合无源调节器电路或开关调节器电路。选择耦合是基于对参数的监视，包括输出负载的电流，输入电压端口的电压和输出负载的电压以及系统时钟信号的可用性。

4. 发明申请

WO2014110314A1 A SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERSION WITH GAIN CONTROL FOR TUNERS 审中-公开
标题翻译：具有调节器增益控制的连续逼近的模拟数字转换
公开(公告)号：WO2014110314A1
公开(公告)日：2014-07-17
申请号：PCT/US2014/010962
申请日：2014-01-10
申请人： INTEL CORPORATION , COWLEY, Nicholas P. , ALI, Isaac , SUETINOV, Viatcheslav I. , PINSON, Keith
发明人： COWLEY, Nicholas P. , ALI, Isaac , SUETINOV, Viatcheslav I. , PINSON, Keith
IPC分类号： G06F17/50
CPC分类号： H03M1/183
摘要： A method and system for implementing a gain control with fine resolution and minimal additional circuitry. The fine digital gain control may be deployed in conjunction with a coarse switched gain at the front end of a sampling receiver. The fine digital gain control mechanism is configured to receive an input signal and moderate gains applied to the received input signal. The output of a low noise amplifier (LNA) is connected to a switched attenuator which provides fine gain stepped gain control. The output of this stage is connected to the switch stage whose output is connected to a charge redistribution successive approximation register digital-to- analog converter (SAR ADC) configured to convert an analog waveform into a digital representation.
摘要翻译：一种用于实现具有精细分辨率和最小额外电路的增益控制的方法和系统。精细的数字增益控制可以结合在采样接收器的前端处的粗略的开关增益来部署。精细数字增益控制机构被配置为接收输入信号并且适中的增益被施加到所接收的输入信号。低噪声放大器（LNA）的输出连接到提供精细增益阶梯增益控制的开关衰减器。该级的输出连接到开关级，其输出端连接到配置为将模拟波形转换为数字表示的电荷再分配逐次逼近寄存器数模转换器（SAR ADC）。

5. 发明申请

WO2013165401A1 VOLTAGE REGULATOR WITH ADAPTIVE CONTROL 审中-公开
标题翻译：具有自适应控制的电压调节器
公开(公告)号：WO2013165401A1
公开(公告)日：2013-11-07
申请号：PCT/US2012/036014
申请日：2012-05-01
申请人： INTEL CORPORATION , ALI, Isaac , COWLEY, Nicholas P.
发明人： ALI, Isaac , COWLEY, Nicholas P.
IPC分类号： G05F1/575 , G05F1/10
CPC分类号： H02M3/10 , H02M3/157 , H02M2001/0025 , H02M2003/1566
摘要： Generally, this disclosure describes an apparatus, systems and methods for adaptively controlling a voltage regulator. The apparatus may include a differencing circuit configured to generate an error signal based on a difference between a reference voltage and the output voltage of the voltage regulator; a proportional control circuit coupled to the differencing circuit, the proportional control circuit configured to generate a control signal proportional to the error signal; a derivative control circuit coupled to the differencing circuit, the derivative control circuit configured to generate a control signal based on the derivative of the error signal; a summer circuit coupled to the proportional control circuit and the derivative control circuit, the summer circuit configured to sum the proportional control signal and the derivative control signal; a PWM signal generator circuit coupled to the summer circuit, the PWM generator circuit configured to adjust the PWM modulation based on the summed control signal; and a state monitor circuit configured to monitor the state of the output voltage and perform a gain adjustment on the proportional control signal and the derivative control signal based on the monitored state.
摘要翻译：通常，本公开描述了用于自适应地控制电压调节器的装置，系统和方法。该装置可以包括差分电路，其被配置为基于参考电压和电压调节器的输出电压之间的差产生误差信号; 比例控制电路，其耦合到所述差分电路，所述比例控制电路被配置为产生与所述误差信号成比例的控制信号; 微分控制电路，被配置为基于误差信号的导数产生控制信号;微分控制电路，夏季电路，其耦合到比例控制电路和微分控制电路，所述加法电路被配置为对比例控制信号和微分控制信号进行求和; PWM信号发生器电路，其耦合到所述加法电路，所述PWM发生器电路被配置为基于所述相加的控制信号调整所述PWM调制; 以及状态监视电路，其被配置为基于所监视的状态来监视所述输出电压的状态并对所述比例控制信号和所述微分控制信号执行增益调整。

6. 发明申请

WO2013158104A1 SYSTEM, APPARATUS AND METHOD TO IMPROVE ANALOG-TO-DIGITAL CONVERTER OUTPUT 审中-公开
标题翻译：系统，装置和方法来改进模拟数字转换器输出
公开(公告)号：WO2013158104A1
公开(公告)日：2013-10-24
申请号：PCT/US2012/034237
申请日：2012-04-19
申请人： INTEL CORPORATION , COWLEY, Nicholas P. , ALI, Isaac
发明人： COWLEY, Nicholas P. , ALI, Isaac
IPC分类号： H03M1/12
CPC分类号： H03M1/08 , H03M1/00 , H03M1/0695 , H03M1/1028 , H03M1/12 , H03M1/1215
摘要： According to various embodiments, a system, an apparatus and a method are presented that relate to determining and correcting signal imbalances between output samples of an analog-to-digital (A-D) converter array (that may be implemented as part of a wideband ADC). A statistic module and correction module are associated with the A-D converter array. The statistic module is configured to receive digital samples from the plurality of A-D converters, and generate a statistical sample value for each A-D converter using a set of digital samples received therefrom. The correction module is configured to, for at least one of the plurality of A-D converters, determine an offset value by comparing the statistical sample value for the at least one of the plurality of A-D converters with a reference value, and apply the offset value to a digital sample from that at least one A-D converter to generate a corrected digital sample.
摘要翻译：根据各种实施例，提出了一种涉及确定和校正模数（AD）转换器阵列（可被实现为宽带ADC的一部分）的输出采样之间的信号不平衡的系统，装置和方法，。统计模块和校正模块与A-D转换器阵列相关联。统计模块被配置为从多个A-D转换器接收数字样本，并且使用从其接收的一组数字样本为每个A-D转换器生成统计采样值。校正模块被配置为，对于多个AD转换器中的至少一个，通过将多个AD转换器中的至少一个AD转换器的统计采样值与参考值进行比较来确定偏移值，并将偏移值应用于来自该至少一个AD转换器的数字样本以产生经校正的数字样本。

7. 发明申请

WO2013158101A1 A SIGNAL AMPLIFIER WITH ACTIVE POWER MANAGEMENT 审中-公开
标题翻译：具有有源电源管理的信号放大器
公开(公告)号：WO2013158101A1
公开(公告)日：2013-10-24
申请号：PCT/US2012/034211
申请日：2012-04-19
申请人： INTEL CORPORATION , COWLEY, Nicholas P. , ALI, Isaac , BARBER, William L.
发明人： COWLEY, Nicholas P. , ALI, Isaac , BARBER, William L.
IPC分类号： H03F1/02 , H04L25/03
CPC分类号： H03F1/0227 , H03F1/3241 , H03F3/195 , H03F3/245 , H03F2200/09 , H03F2200/102 , H03F2200/333 , H03F2200/411 , H03F2200/504 , H03F2200/541 , H03G3/30 , H04L25/0264 , H04L25/0272 , H04L27/361
摘要： A system for amplifying a signal with active power management according to one embodiment includes a first digital to analog converter (DAC) circuit configured to provide a modulated carrier signal; a amplifier circuit coupled to the first DAC, where the amplifier circuit is configured to amplify the modulated carrier signal; an output stage circuit coupled to the amplifier circuit, where the output stage circuit is configured to provide the amplified signal to a network; a second DAC circuit configured to provide a full wave rectified envelope of the modulated carrier signal; and a switching regulator circuit including a voltage reference input coupled to the second DAC circuit, where the switching regulator circuit is configured to provide a supply voltage to the output stage circuit and the supply voltage is modulated in response to the envelope received at the voltage reference input.
摘要翻译：根据一个实施例的用于放大具有有功功率管理的信号的系统包括被配置为提供调制载波信号的第一数模转换器（DAC）电路; 耦合到所述第一DAC的放大器电路，其中所述放大器电路被配置为放大所述经调制的载波信号; 耦合到放大器电路的输出级电路，其中输出级电路被配置为向网络提供放大的信号; 第二DAC电路，被配置为提供调制载波信号的全波整流包络; 以及开关调节器电路，其包括耦合到所述第二DAC电路的电压参考输入，其中所述开关调节器电路被配置为向所述输出级电路提供电源电压，并且响应于在所述电压基准处接收到的信封来调制所述电源电压输入。

8. 发明申请

WO2011084264A1 EFFICIENT TUNING AND DEMODULATION TECHNIQUES 审中-公开
标题翻译：有效的调谐和解调技术
公开(公告)号：WO2011084264A1
公开(公告)日：2011-07-14
申请号：PCT/US2010/058223
申请日：2010-11-29
申请人： INTEL CORPORATION , COWLEY, Nicholas P. , ARAMBEPOLA, Bernard , MARTIN, Alan J. , ALI, Isaac
发明人： COWLEY, Nicholas P. , ARAMBEPOLA, Bernard , MARTIN, Alan J. , ALI, Isaac
IPC分类号： H04N5/44
CPC分类号： H04N21/42615 , H04H2201/60 , H04N5/50 , H04N5/765 , H04N21/4263 , H04N21/4347 , H04N21/4382 , H04N21/4383 , H04N21/4436
摘要： Techniques for the reception and processing of wireless signals are disclosed. For instance, an apparatus may include multiple receiving paths, a content stream generation module, and a distribution module. The multiple receiving paths include a first receiving path that generates a first decoded signal from an input RF signal in accordance with a first tuning setting. The content stream generation module has first and second inputs. Based on decoded signals received at the first and second inputs, the content stream generation module may generate first and second content streams, respectively. In situations where both the first and second content streams correspond to the first tuning setting, the distribution module provides the first decoded signal to both the first and second inputs of the content stream generation module. Also, a control module may remove operational power from any of the plurality of receiving paths that are currently being unused.
摘要翻译：公开了接收和处理无线信号的技术。例如，设备可以包括多个接收路径，内容流生成模块和分发模块。多个接收路径包括根据第一调谐设置从输入RF信号产生第一解码信号的第一接收路径。内容流生成模块具有第一和第二输入。基于在第一和第二输入处接收到的解码信号，内容流生成模块可以分别生成第一和第二内容流。在第一和第二内容流都对应于第一调谐设置的情况下，分配模块将第一解码信号提供给内容流生成模块的第一和第二输入。此外，控制模块可以从当前未被使用的多个接收路径中的任何一个接收路径移除操作功率。

9. 发明申请

WO2012134832A2 COUPLED INDUCTOR TO FACILITATE INTEGRATED POWER DELIVERY 审中-公开
标题翻译：耦合电感器，以便于整合电力输送
公开(公告)号：WO2012134832A2
公开(公告)日：2012-10-04
申请号：PCT/US2012/029348
申请日：2012-03-16
申请人： INTEL CORPORATION , COWLEY, Nicholas P. , ALI, Isaac , SPINKS, Stephen J.
发明人： COWLEY, Nicholas P. , ALI, Isaac , SPINKS, Stephen J.
IPC分类号： H01F17/04 , H01F27/28
CPC分类号： H02M3/1584 , H01F17/02 , Y10T29/49071
摘要： An embodiment of the present invention provides an apparatus, comprising a surface mounted device (SMD) inductor, the SMD inductor including at least two counter wound aircoils formed on a same SMD former; wherein the at least two counter wound aircoils are connected to three terminals on the SMD former, wherein a single terminal is connected to a common node of both windings with two independent terminals accessing the other winding node.
摘要翻译：本发明的一个实施例提供了一种包括表面安装器件（SMD）电感器的器件，该SMD电感器包括形成在同一SMD成形器上的至少两个反绕绕的电极; 其中所述至少两个计数器缠绕的空心体连接到所述SMD形成器上的三个端子，其中单个端子连接到两个绕组的公共节点，其中两个独立的端子接近另一绕组节点。

10. 发明申请

WO2014127358A1 METHODS AND SYSTEMS TO STRESS-PROGRAM AN INTEGRATED CIRCUIT 审中-公开
标题翻译：应力计算集成电路的方法与系统
公开(公告)号：WO2014127358A1
公开(公告)日：2014-08-21
申请号：PCT/US2014/016904
申请日：2014-02-18
申请人： INTEL CORPORATION , COWLEY, Nicholas P. , MUTHUKARUPPAN, Ramnarayanan
发明人： COWLEY, Nicholas P. , MUTHUKARUPPAN, Ramnarayanan
IPC分类号： H03K19/177 , G01R31/26
CPC分类号： H03K19/173 , G11C17/18
摘要： Methods and systems to stress-program a first integrated circuit (IC) block to output a pre-determined value upon activation/reset, such as to support time-zero compensation/trimming. To program, the first block is configured with first-block program parameters to cause the first block to output a pre-determined value. The first block is stressed while configured with the first-block program parameters, to cause the first block to output the pre-determined value without the first-block program parameters. The first block may include a latch designed as a fully balance circuit and may be asymmetrically stressed to alter a characteristic of one path relative to another. The pre-determined value may be selected to compensate for process corner variations and/or other random variations.
摘要翻译：压缩程序化第一集成电路（IC）块以在激活/复位时输出预定值的方法和系统，例如支持时间零补偿/修整。为了编程，第一块被配置有第一块程序参数，以使第一块输出预定值。第一个程序段被配置了第一个程序段的第一个程序参数，使第一个程序段输出预定义的值，而没有第一个程序参数。第一块可以包括被设计为完全平衡电路的闩锁，并且可以是不对称应力以改变相对于另一路径的一个路径的特性。可以选择预定值以补偿过程角变化和/或其他随机变化。

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