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1. 发明申请

WO2005101038A3 WIRELESS TEST CASSETTE 审中-公开
标题翻译：无线测试CASSETTE
公开(公告)号：WO2005101038A3
公开(公告)日：2005-12-15
申请号：PCT/US2005011849
申请日：2005-04-08
申请人： FORMFACTOR INC , ELDRIDGE BENJAMIN N , KHANDROS IGOR Y , MILLER CHARLES A , SPORCK NICHOLAS A
发明人： ELDRIDGE BENJAMIN N , KHANDROS IGOR Y , MILLER CHARLES A , SPORCK NICHOLAS A
IPC分类号： G01R1/073 , G01R31/02 , G01R31/26
CPC分类号： G01R1/0491 , G01R1/073 , G01R31/3025
摘要： A base controller (210) disposed in a test cassette (110) receives test data for testing a plurality of electronic devices (236a,236b). The base controller wirelessly transmits the test data to a plurality of wireless test control chips (214a,214b,214c,214d,214e,214f,214g), which write the test data to each of the electronic devices. The wireless test control chips (214a,214b,214c,214d,214e,214f,214g), then read response data generated by the electronic devices (236a, 236b), and the wireless test control chips wirelessly transmit the response data to the base controller (210).
摘要翻译：设置在测试盒（110）中的基本控制器（210）接收用于测试多个电子设备（236a，236b）的测试数据。基站控制器将测试数据无线发送到多个无线测试控制芯片（214a，214b，214c，214d，214e，214f，214g），其将测试数据写入每个电子设备。无线测试控制芯片（214a，214b，214c，214d，214e，214f，214g）然后读取由电子设备（236a，236b）产生的响应数据，并且无线测试控制芯片将响应数据无线地发送到基站控制器（210）。

2. 发明申请

WO2007035664A3 APPARATUS AND METHOD OF TESTING SINGULATED DIES 审中-公开
标题翻译：装置和测试方法
公开(公告)号：WO2007035664A3
公开(公告)日：2009-04-30
申请号：PCT/US2006036336
申请日：2006-09-18
申请人： FORMFACTOR INC , DOZIER II THOMAS H , ELDRIDGE BENJAMIN N , HSU DAVID S , KHANDROS IGOR Y , MILLER CHARLES A
发明人： DOZIER II THOMAS H , ELDRIDGE BENJAMIN N , HSU DAVID S , KHANDROS IGOR Y , MILLER CHARLES A
IPC分类号： G01R31/02
CPC分类号： G01R31/2889 , G01R31/2893 , G01R31/31905
摘要： An exemplary die carrier is disclosed. In some embodiments, the die carrier can hold a plurality of singulated dies while the dies are tested. The dies can be arranged on the carrier in a pattern that facilities testing the dies. The carrier can be configured to allow interchangeable interfaces to different testers to be attached to and detached from the carrier. The carrier can also be configured as a shipping container for the dies.
摘要翻译：公开了一种示例性的模具载体。在一些实施例中，模具载体可以在测试模具的同时保持多个单个模具。模具可以以对模具进行测试的模式布置在载体上。载体可以被配置为允许不同的测试仪的可互换的接口被附接到载体上并与载体分离。载体也可以被配置为模具的运输容器。

3. 发明申请

WO2006068939A3 REMOTE TEST FACILITY WITH WIRELESS INTERFACE TO LOCAL TEST FACILITIES 审中-公开
标题翻译：远程测试设施与无线接口到本地测试设备
公开(公告)号：WO2006068939A3
公开(公告)日：2006-12-28
申请号：PCT/US2005045611
申请日：2005-12-15
申请人： FORMFACTOR INC , KHANDROS IGOR Y , ELDRIDGE BENJAMIN N
发明人： KHANDROS IGOR Y , ELDRIDGE BENJAMIN N
IPC分类号： G01R31/26 , G01R31/28
CPC分类号： G01R31/2884 , G01R31/3025 , G01R31/31907
摘要： A central test facility transmits wirelessly test data to a local test facility, which tests electronic devices using the test data. The local test facility transmits wirelessly response data generated by the electronic devices back to the central test facility, which analyzes the response data to determine which electronic devices passed the testing. The central test facility may provide the results of the testing to other entities, such as a design facility where the electronic devices were designed or a manufacturing facility where the electronic devices where manufactured. The central test facility may accept requests for test resources from any of a number of local test facilities, schedule test times corresponding to each test request, and at a scheduled test time, wirelessly transmits test data to a corresponding local test facility.
摘要翻译：中央测试设备将无线测试数据传输到本地测试设备，该设备使用测试数据测试电子设备。本地测试设施将由电子设备生成的无线响应数据发送回中央测试设施，中央测试设施分析响应数据以确定哪些电子设备通过了测试。中央测试设施可以将测试结果提供给其他实体，例如设计电子设备的设计设施或制造电子设备的制造设施。中央测试设施可以接受来自多个本地测试设施中的任何一个的测试资源的请求，调度对应于每个测试请求的测试时间，并且在预定的测试时间，将测试数据无线传输到相应的本地测试设施。

4. 发明申请

WO9900844A3 SOCKETS FOR SEMICONDUCTOR DEVICES WITH SPRING CONTACT ELEMENTS 审中-公开
标题翻译：具有弹簧触点元件的半导体器件插座
公开(公告)号：WO9900844A3
公开(公告)日：1999-04-29
申请号：PCT/US9813692
申请日：1998-06-30
申请人： FORMFACTOR INC , DOZIER THOMAS H II , ELDRIDGE BENJAMIN N , GRUBE GARY W , KHANDROS IGOR Y , MATHIEU GAETAN L , PEDERSEN DAVID V , STADT MICHAEL A
发明人： DOZIER THOMAS H II , ELDRIDGE BENJAMIN N , GRUBE GARY W , KHANDROS IGOR Y , MATHIEU GAETAN L , PEDERSEN DAVID V , STADT MICHAEL A
IPC分类号： G01R1/04 , H01L23/04 , H01L23/13 , H01L23/32 , H01L23/48 , H01L23/538 , H05K3/30 , H05K3/32
CPC分类号： G01R1/0408 , B23K3/087 , G01R1/0416 , G01R1/0466 , G01R31/2886 , H01L23/04 , H01L23/13 , H01L23/32 , H01L23/5385 , H01L24/72 , H01L2224/1134 , H01L2224/13099 , H01L2224/16 , H01L2224/16237 , H01L2224/73251 , H01L2224/8114 , H01L2224/81901 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01078 , H01L2924/01079 , H05K1/119 , H05K3/308 , H05K3/325 , H05K2201/0311 , H05K2201/09472 , H05K2201/09827 , Y10T29/49128 , Y10T29/4913 , Y10T29/49139 , Y10T29/4914 , Y10T29/49147 , Y10T29/49153 , Y10T29/49208 , Y10T29/53174 , Y10T29/53178 , Y10T29/53183 , H01L2924/00014 , H01L2224/72
摘要： Temporary connections to spring contact elements extending from an electronic component such as a semiconductor device are made by urging the electronic component, consequently the ends of the spring contact elements, vertically against terminals of an interconnection substrate, or by horizontally urging terminals of an interconnection substrate against end portions of the spring contact elements. A variety of terminal configurations are disclosed.
摘要翻译：通过迫使电子元件，因此弹簧接触元件的端部竖直地抵靠互连基板的端子，或者通过水平地推动互连基板的端子来形成从诸如半导体器件的电子部件延伸的弹簧接触元件的临时连接抵靠弹簧接触元件的端部。公开了各种终端配置。

5. 发明申请

WO2007081522A3 A PROBE ARRAY STRUCTURE AND A METHOD OF MAKING A PROBE ARRAY STRUCTURE 审中-公开
标题翻译：探索阵列结构和制作探测阵列结构的方法
公开(公告)号：WO2007081522A3
公开(公告)日：2009-02-12
申请号：PCT/US2006048723
申请日：2006-12-19
申请人： FORMFACTOR INC , ELDRIDGE BENJAMIN N , FANG TRELIANT , GRITTERS JOHN K , KHANDROS IGOR Y , MA LUNYU , MATHIEU GAETAN L
发明人： ELDRIDGE BENJAMIN N , FANG TRELIANT , GRITTERS JOHN K , KHANDROS IGOR Y , MA LUNYU , MATHIEU GAETAN L
IPC分类号： G01R31/02
CPC分类号： G01R3/00 , G01R1/06716 , G01R1/06727 , G01R1/06744
摘要： Probe array structures and methods of making probe array structures are disclosed. A plurality of electrically conductive elongate contact structures disposed on a first substrate can be provided. The contact structures can then be partially encased in a securing material such that ends of the contact structures extend from a surface of the securing material. The exposed portions of the contact structures can then be captured in a second substrate.
摘要翻译：公开了探针阵列结构和制造探针阵列结构的方法。可以提供设置在第一基板上的多个导电细长接触结构。然后可以将接触结构部分地包封在固定材料中，使得接触结构的端部从固定材料的表面延伸。然后接触结构的暴露部分可以在第二衬底中被捕获。

6. 发明申请

WO9638858A3 CONTACT CARRIERS (TILES) FOR POPULATING LARGER SUBSTRATES WITH SPRING CONTACTS 审中-公开
标题翻译：联系人（TILES）用于具有弹簧触点的人口大型基底
公开(公告)号：WO9638858A3
公开(公告)日：1997-03-20
申请号：PCT/US9608117
申请日：1996-05-24
申请人： FORMFACTOR INC , KHANDROS IGOR Y , ELDRIDGE BENJAMIN N , MATHIEU GAETEAN L , DOZIER THOMAS H , SMITH WILLIAM D
发明人： KHANDROS IGOR Y , ELDRIDGE BENJAMIN N , MATHIEU GAETEAN L , DOZIER THOMAS H , SMITH WILLIAM D
IPC分类号： B23K20/00 , C23C18/16 , C25D5/08 , C25D5/22 , C25D7/12 , C25D21/02 , G01R1/067 , G01R1/073 , G01R3/00 , G01R31/28 , H01L21/00 , H01L21/48 , H01L21/56 , H01L21/60 , H01L21/603 , H01L21/66 , H01L21/68 , H01L23/48 , H01L23/485 , H01L23/49 , H01L23/498 , H01L25/065 , H01L25/16 , H01R33/76 , H05K1/14 , H05K3/20 , H05K3/32 , H05K3/40 , H01L
CPC分类号： B23K20/004 , B23K2201/40 , C25D5/08 , C25D5/22 , C25D21/02 , G01R1/06711 , G01R1/06716 , G01R1/06744 , G01R1/07342 , G01R3/00 , G01R31/2884 , G01R31/2886 , H01L21/4853 , H01L21/4889 , H01L21/563 , H01L22/20 , H01L23/49811 , H01L24/11 , H01L24/13 , H01L24/72 , H01L24/81 , H01L25/0652 , H01L25/16 , H01L2224/13099 , H01L2224/131 , H01L2224/16145 , H01L2224/45144 , H01L2224/73203 , H01L2224/81801 , H01L2224/85201 , H01L2225/0651 , H01L2225/06527 , H01L2225/06555 , H01L2225/06572 , H01L2924/0001 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01057 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/1532 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H05K1/141 , H05K3/20 , H05K3/326 , H05K3/4015 , H01L2924/00
摘要： A plurality of contact elements, such as contact bumps or free-standing spring contacts (710) including both monolithic and composite interconnection elements, are mounted to relatively small tile substrates (702) which, in turn, are mounted and connected to a relatively large electronic component substrate (706), thereby populating the electronic component with a plurality of contact elements while avoiding the necessity of yielding the contact elements directly upon the electronic component. The relatively large electronic component is suitably a space transformer component of a probe card assembly. In this manner, pressure connections can be made to an entire semiconductor wafer, at once, to provide for wafer-level bum-in, and the like. Solder balls, z-axis conductive adhesive, or compliant connections are suitably employed for making electrical connections between the tile substrates and the electronic component. Multiple die sites on a semiconductor wafer are readily probed using the disclosed techniques, and the tiles can be arranged to optimize probing of an entire wafer. Composite interconnection elements having a relatively soft core overcoated by a relatively hard shell, as the resilient contact structures are described. Techniques for maintaining a prescribed x-y and z-axis alignment of the tiles to the relatively large substrate are disclosed.

7. 发明申请

WO2006037056A3 STACKED DIE MODULE 审中-公开
标题翻译：堆叠模块
公开(公告)号：WO2006037056A3
公开(公告)日：2006-12-21
申请号：PCT/US2005034861
申请日：2005-09-26
申请人： FORMFACTOR INC , KHANDROS IGOR Y , MILLER CHARLES A , BARBARA BRUCE J , VASQUEZ BARBARA
发明人： KHANDROS IGOR Y , MILLER CHARLES A , BARBARA BRUCE J , VASQUEZ BARBARA
IPC分类号： H01L23/02 , H01L21/44 , H01L23/34 , H01L23/52
CPC分类号： H01L24/48 , H01L23/13 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/05554 , H01L2224/05599 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/48465 , H01L2224/4911 , H01L2224/73215 , H01L2224/73265 , H01L2224/85186 , H01L2225/06506 , H01L2225/0651 , H01L2225/06527 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/01005 , H01L2924/01014 , H01L2924/01031 , H01L2924/01033 , H01L2924/01082 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
摘要： Semiconductor dies (101/104/106) are stacked offset from one another so that terminals (122/124/126) located along two edges of each die are exposed. The two edges of the dies having terminals may be oriented in the same direction. Electrical connections (130/132/134) may connect terminals on one die with terminals on another die and the stack may be disposed on a wiring substrate (112) to which the terminals of the dies may be electrically connected.
摘要翻译：半导体管芯（101/104/106）彼此堆叠地偏置，使得沿着每个管芯的两个边缘定位的端子（122/124/126）被暴露。具有端子的模具的两个边缘可以沿相同的方向定向。电连接（130/132/134）可以将一个管芯上的端子与另一个管芯上的端子连接，并且堆叠可以布置在可以电连接管芯的端子的布线基板（112）上。

8. 发明申请

WO9716866A3 CHIP INTERCONNECTION CARRIER AND METHODS OF MOUNTING SPRING CONTACTS TO SEMICONDUCTOR DEVICES 审中-公开
标题翻译：芯片互连载体和安装弹簧触点到半导体器件的方法
公开(公告)号：WO9716866A3
公开(公告)日：1997-06-19
申请号：PCT/US9608328
申请日：1996-05-28
申请人： FORMFACTOR INC , KHANDROS IGOR Y , CHANG SUNG CHUL , SMITH WILLIAM D
发明人： KHANDROS IGOR Y , CHANG SUNG CHUL , SMITH WILLIAM D
IPC分类号： H01L21/60 , B23K20/00 , C23C18/16 , C25D5/08 , C25D5/22 , C25D7/12 , C25D21/02 , H01L21/00 , H01L21/48 , H01L21/603 , H01L21/66 , H01L23/32 , H01L23/48 , H01L23/485 , H01L23/49 , H01L23/498 , H01L25/16 , H05K3/32 , H01R
CPC分类号： B23K20/004 , C25D5/08 , C25D5/22 , C25D7/12 , C25D21/02 , H01L21/4853 , H01L21/4889 , H01L22/20 , H01L23/49811 , H01L24/10 , H01L24/13 , H01L24/45 , H01L24/72 , H01L24/81 , H01L25/16 , H01L2224/13 , H01L2224/13099 , H01L2224/16145 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/81801 , H01L2224/85201 , H01L2224/85205 , H01L2225/0651 , H01L2225/06527 , H01L2225/06555 , H01L2225/06572 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01057 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/14 , H01L2924/1532 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H05K3/326 , H01L2924/00 , H01L2224/48
摘要： A plurality of free-standing spring elements (512) are mounted to a surface (510a) of a carrier substrate (510). The carrier substrate (510) is mounted to a surface (502a) of a semiconductor device (502). Bond pads (504) of the semiconductor device are connected to the spring elements (512) by bond wires (520) extending between the bond pads (504) and terminals (516) associated with the spring elements. Alternatively, the carrier is flip-chip reflow soldered to the semiconductor device. The carrier substrate (510) is suitably mounted to one or more semiconductor devices (532, 534) prior to the semiconductor devices being singulated from a semiconductor wafer upon which they are formed. Resilience and compliance to effect pressure connections to the semiconductor device (502) are provided by the spring elements (512) extending from the carrier substrate (510), per se. Hence, the carrier substrate (510) suitably remains rigid with respect to the semiconductor device (502). The carrier substrate (510) is advantageously pre-fabricated, by mounting the spring elements (512) thereto prior to mounting the carrier substrate to the semiconductor device(s).

9. 发明申请

WO0039848A2 TEST METHOD AND ASSEMBLY INCLUDING A TEST DIE FOR TESTING A SEMICONDUCTOR PRODUCT DIE 审中-公开
标题翻译：测试方法和包括用于测试半导体产品模具的测试模具的组件
公开(公告)号：WO0039848A2
公开(公告)日：2000-07-06
申请号：PCT/US9930916
申请日：1999-12-22
申请人： FORMFACTOR INC
发明人： ELDRIDGE BENJAMIN N , KHANDROS IGOR Y , PEDERSEN DAVID V , WHITTEN RALPH G
IPC分类号： G01R1/06 , G01R1/073 , G01R31/28 , G01R31/3183 , H01L21/66 , H01L21/822 , H01L23/544 , H01L27/04
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/14 , H01L2924/00
摘要： A test assembly (2000) for testing product circuitry (202, 302, 304) of a product die (2011, 300). In one embodiment, the test assembly includes a test die (2010, 400) and an interconnection substrate (2008) for electrically coupling the test die to a host controller (2002) that communicates with the test die. The test die may be designed according to a design methodology (100) for a test die and a product die that includes the step of concurrently designing test circuitry (202A, 402, 404) and product circuitry in a unified design (102). The test circuitry can be designed to provide a high degree of fault coverage for the corresponding product circuitry generally without regard to the amount of silicon area that will be required by the test circuitry. The design methodology then partitions (104) the unified design into the test die and the product die. The test die includes the test circuitry and the product die includes the product circuitry. The product die may contain some test circuitry. The product and test die may then be fabricated on separate semiconductor wafers. By partitioning the product circuitry and test circuitry into separate die, embedded test circuitry can be either eliminated or minimized on the product die. This will tend to decrease the size of the product die and decrease the cost of manufacturing the product die while maintaining a high degree of test coverage of the product circuits within the product die. The test die can be used to test multiple product die on one or more wafers.
摘要翻译：用于测试产品管芯（2011,300）的产品电路（202,302,304）的测试组件（2000）。在一个实施例中，测试组件包括用于将测试管芯电耦合到与测试管芯通信的主机控制器（2002）的测试管芯（2010,400）和互连衬底（2008）。可以根据用于测试裸片和产品裸片的设计方法（100）来设计测试裸片，其包括在统一设计（102）中同时设计测试电路（202A，402,404）和产品电路的步骤。测试电路可以被设计成为相应的产品电路提供高度故障覆盖，而不考虑测试电路所需的硅面积量。然后，设计方法将统一设计划分（104）到测试模具和产品模具中。测试芯片包含测试电路，产品芯片包含产品电路。产品芯片可能包含一些测试电路。产品和测试管芯然后可以制造在分离的半导体晶片上。通过将产品电路和测试电路划分成单独的管芯，嵌入式测试电路可以在产品管芯上消除或最小化。这将趋于减小产品管芯的尺寸并降低制造产品管芯的成本，同时保持产品管芯内产品电路的高度测试覆盖率。测试芯片可用于测试一个或多个晶圆上的多个产品芯片。

10. 发明申请

WO9743656A3 WAFER-LEVEL BURN-IN AND TEST 审中-公开
标题翻译： WAFER-LEVEL BURN-IN和TEST
公开(公告)号：WO9743656A3
公开(公告)日：1998-03-12
申请号：PCT/US9708604
申请日：1997-05-15
申请人： FORMFACTOR INC
发明人： KHANDROS IGOR Y , PEDERSEN DAVID V
IPC分类号： G01R31/26 , G01R1/067 , G01R1/073 , G01R3/00 , G01R31/28 , G01R31/30 , H01H1/00 , H01L21/60 , H01L21/66 , H01L23/32 , H01L23/48 , H01L23/485 , H01L23/498 , H05K3/20 , H05K3/34 , H05K3/40 , G01R31/316
CPC分类号： H01L23/49811 , G01R1/06716 , G01R1/06744 , G01R1/07342 , G01R3/00 , G01R31/287 , G01R31/2884 , G01R31/2889 , H01H1/0036 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/04042 , H01L2224/06136 , H01L2224/11003 , H01L2224/11334 , H01L2224/13016 , H01L2224/1308 , H01L2224/13144 , H01L2224/13155 , H01L2224/13173 , H01L2224/45144 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01037 , H01L2924/01039 , H01L2924/01042 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/3011 , H01L2924/3025 , H01L2924/351 , H05K3/20 , H05K3/3421 , H05K3/4015 , H01L2224/13099 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
摘要： Techniques for performing wafer-level burn-in and test of semiconductor devices include a test substrate having active electronic components such as ASICs mounted to an interconnection substrate or incorporated therein, metallic spring contact element effecting interconnections between the ASICs and a plurality of devices-under-test (DUTs) on a wafer-under-test (WUT), all disposed in a vacuum vessel so that the ASICs can be operated at temperatures independent from and significantly lower than the burn-in temperature of the DUTs. The spring contact elements may be mounted to either the DUTs or to the ASICs, and may fan out to relax tolerance constraints on aligning and interconnecting the ASICs and the DUTs. A significant reduction in interconnect count and consequent simplification of the interconnection substrate is realized because the ASICs are capable of receiving a plurality of signals for testing the DUTs over relatively few signal lines from a host controller and promulgating these signals over the relatively many interconnections between the ASICs and the DUTs. The ASICs can also generate at least a portion of these signals in response to control signals from the host controller. Physical alignment techniques are also described. Micromachined indentations on the front surface of the ASICs ensure capturing free ends of the spring contact elements. Micromachined features on the back surface of the ASICs and the front surface of the interconnection substrate to which they are mounted facilitate precise alignment of a plurality of ASICs on the support substrate. 00000
摘要翻译：用于执行半导体器件的晶片级老化和测试的技术包括具有有源电子部件（例如安装到互连衬底或并入其中的ASIC）的测试衬底，金属弹簧接触元件实现ASIC和多个器件之间的互连在测试晶片（WUT）上的测试（DUT）都被置于真空容器中，使得ASIC可以在与DUT的老化温度无关并且显着低于DUT的老化温度的温度下工作。弹簧接触元件可以被安装到DUT或ASIC上，并且可以扇出来放松对ASIC和DUT的对准和互连的容限约束。由于ASIC能够通过相对较少的来自主机控制器的信号线接收用于测试DUT的多个信号，并且在这些信号之间的相对多的互连上发布这些信号，因此实现了互连计数的显着减少和互连基板的随后简化。 ASIC和DUT。 ASIC还可以响应于来自主机控制器的控制信号而产生这些信号的至少一部分。还描述了物理对准技术。 ASIC的前表面上的微加工凹口确保捕获弹簧接触元件的自由端。 ASIC的后表面上的微加工特征和它们所安装的互连衬底的前表面有助于精确地对准支撑衬底上的多个ASIC。 00000

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