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1. 发明申请

WO2015109208A2 WAFER SCALE TEST INTERFACE UNIT: LOW LOSS AND HIGH ISOLATION DEVICES AND METHODS FOR HIGH SPEED AND HIGH DENSITY MIXED SIGNAL INTERCONNECTS AND CONTACTORS 审中-公开
标题翻译： WAFER SCALE测试接口单元：低损耗和高隔离设备及其高密度和高密度混合信号互连和接触器的方法
公开(公告)号：WO2015109208A2
公开(公告)日：2015-07-23
申请号：PCT/US2015011789
申请日：2015-01-16
申请人： NUVOTRONICS LLC
发明人： THOMPSON RICK L , VANHILLE KENNETH , BORYSSENKO ANATOLIY O , ROLLIN JEAN-MARC
IPC分类号： G01R31/28
CPC分类号： G01R31/2889 , G01R1/06716 , G01R1/06722 , G01R1/07307 , G01R1/07357
摘要： Devices and methods for multilayer packages, antenna array feeds, test interface units, connectors, contactors, and large format substrates.
摘要翻译：用于多层封装，天线阵列馈电，测试接口单元，连接器，接触器和大幅面衬底的装置和方法。

2. 发明申请

WO2014105243A1 INTERFACE FOR A TEST SYSTEM 审中-公开
标题翻译：测试系统界面
公开(公告)号：WO2014105243A1
公开(公告)日：2014-07-03
申请号：PCT/US2013/062843
申请日：2013-10-01
申请人： TERADYNE, INC.
发明人： CARADONNA, Michael , FERN, Jacob , WILKINSON, Stephen
IPC分类号： G01R1/067 , G01R1/073 , G01R31/28
CPC分类号： G01R1/0408 , G01R31/2889
摘要： An example test system includes: a pin electronics board for exchanging signals with a device under test (DUT), where the pin electronics board includes first electrical contacts; an interposer between the pin electronics board and a paddle board, where the paddle board includes second electrical contacts, and where the interposer includes electrical connectors for use in establishing electrical pathways between the first electrical contacts and the second electrical contacts; and an actuator configured to force the paddle board and the interposer to make contact so as to cause the electrical connectors to contact the second electrical contacts and thereby establish the electrical pathways.
摘要翻译：示例性测试系统包括：用于与被测器件（DUT）交换信号的引脚电子板，其中引脚电子板包括第一电触头; 所述引脚电子板和桨板之间的插入件，其中所述板板包括第二电触点，并且其中所述插入器包括用于建立所述第一电触点和所述第二电触点之间的电通路的电连接器; 以及致动器，其构造成迫使所述桨板和所述插入件接触，以使所述电连接器接触所述第二电接触并从而建立所述电路径。

3. 发明申请

WO2014009980A1 INTERFACE BOARD OF A TESTING HEAD FOR A TEST EQUIPMENT OF ELECTRONIC DEVICES AND CORRESPONDING TESTING HEAD 审中-公开
标题翻译：电子设备测试设备的测试头接口板和相应的测试头
公开(公告)号：WO2014009980A1
公开(公告)日：2014-01-16
申请号：PCT/IT2012000214
申请日：2012-07-11
申请人： TECHNOPROBE SPA , CAMPARDO GIOVANNI , MAGGIONI FLAVIO , LIBERINI RICARDO
发明人： CAMPARDO GIOVANNI , MAGGIONI FLAVIO , LIBERINI RICARDO
IPC分类号： G01R31/319 , G01R1/04 , G01R31/28
CPC分类号： G01R1/0408 , G01R31/2889 , G01R31/31905
摘要： An interface board (50) of a testing head (31) for a test equipment of electronic devices is described, such a testing head (31) comprising a plurality of contact probes (34), each contact probe (34) having at least one contact tip suitable to abut against contact pads of a device to be tested (35), as well as a contact element for the connection with a board (36) of the test equipment. Suitably, the interface board (50) comprises a substrate (51) and at least one redirecting die (40) housed on a first surface of that substrate (51) and a plurality of contact pins (53) projecting from a second surface of that substrate (51) opposed to the first surface, the redirecting die (40) comprising at least one semiconductor substrate (41) whereon at least a first plurality of contact pads (42A) is realized, suitable to contact a contact element of a contact probe (34) of the testing head (31), the contact pins (53) being suitable to contact the board (36).
摘要翻译：描述了用于电子设备的测试设备的测试头（31）的接口板（50），这种测试头（31）包括多个接触探针（34），每个接触探针（34）具有至少一个接触尖端适于抵靠待测试装置（35）的接触垫，以及用于与测试装置的板（36）连接的接触元件。合适地，接口板（50）包括衬底（51）和容纳在该衬底（51）的第一表面上的至少一个改向模（40），以及从该衬底的第二表面突出的多个触针（53）（40）包括至少一个半导体衬底（41），在所述半导体衬底上实现至少第一多个接触垫（42A），所述半导体衬底适于接触接触探针的接触元件（31）的所述接触销（34），所述接触销（53）适于接触所述板（36）。

4. 发明申请

WO2013182317A1 PROBE CARD FOR AN APPARATUS FOR TESTING ELECTRONIC DEVICES 审中-公开
标题翻译：用于测试电子设备的设备的探针卡
公开(公告)号：WO2013182317A1
公开(公告)日：2013-12-12
申请号：PCT/EP2013/001675
申请日：2013-06-07
申请人： TECHNOPROBE S.p.A.
发明人： VETTORI, Riccardo , LIBERINI, Ricardo
IPC分类号： G01R1/073
CPC分类号： G01R1/07364 , G01R1/06733 , G01R1/07314 , G01R1/07378 , G01R31/2889
摘要： Herein described is a probe card for an apparatus for testing electronic devices, of the type comprising at least one probe head (21) which houses a plurality of contact probes (22), each contact probe (22) having at least one contact tip suitable to abut against contact pads of a device to be tested, as well as a supporting plate (23) of such probe head (21) associated with a stiffener (24, 24') via an interface plate (25). Suitably, the probe card (20) comprises a plurality of connecting elements (27) with clearance between the supporting plate (23) and the interface plate (25) housed in a floating manner in a plurality of respective seats (28) made in the supporting plate (23) and a plurality of further connecting elements (27') without clearance between the interface plate (25) and the stiffener (24).
摘要翻译：这里描述了一种用于测试电子设备的装置的探针卡，其类型包括容纳多个接触探针（22）的至少一个探针头（21），每个接触探针（22）具有至少一个接触尖端以抵靠待测试装置的接触垫，以及经由界面板（25）与所述加强件（24,24'）相关联的所述探针头（21）的支撑板（23）。适当地，探针卡（20）包括多个连接元件（27），所述多个连接元件（27）在支撑板（23）和接触板（25）之间具有间隙，所述接合板以浮动的方式容纳在制成在支撑板（23）和在接口板（25）和加强件（24）之间没有间隙的多个另外的连接元件（27'）。

5. 发明申请

WO2013082607A1 SYSTEMS AND METHODS FOR SENSING SIGNALS COMMUNICATED WITH AN INTERFACE OF A PLUG-IN CARD WITHOUT SENSING POINTS 审中-公开
标题翻译：传感信号的系统和方法与没有传感点的插入卡的接口通信
公开(公告)号：WO2013082607A1
公开(公告)日：2013-06-06
申请号：PCT/US2012/067620
申请日：2012-12-03
申请人： SANDISK TECHNOLOGIES INC. , BASSIN, Evgeni
发明人： BASSIN, Evgeni
IPC分类号： G01R29/08
CPC分类号： G01R31/2889
摘要： A circuit system for testing a chip is provided. The circuit system includes a first layer coupled with a plurality of ground communication mediums. Each ground communication medium facilitates communication of a ground signal. The circuit system includes a second layer coupled with a first integrated circuit chip. The second layer is coupled with a plurality of radio frequency (RF) communication mediums. The RF communication mediums facilitate communication of RF signals. The first integrated circuit chip communicates via one of the RF signals and the ground signal with a second integrated circuit chip. The first and second layers are used to probe the RF signals and the ground signal.
摘要翻译：提供了用于测试芯片的电路系统。电路系统包括与多个地面通信介质耦合的第一层。每个地面通信介质促进地面信号的通信。电路系统包括与第一集成电路芯片耦合的第二层。第二层与多个射频（RF）通信介质耦合。 RF通信介质有助于RF信号的通信。第一集成电路芯片通过RF信号和接地信号之一与第二集成电路芯片进行通信。第一层和第二层用于探测RF信号和接地信号。

6. 发明申请

WO2013006768A3 TEST APPARATUS HAVING A PROBE CARD AND CONNECTOR MECHANISM 审中-公开
标题翻译：具有探针卡和连接器机构的测试装置
公开(公告)号：WO2013006768A3
公开(公告)日：2013-03-14
申请号：PCT/US2012045701
申请日：2012-07-06
申请人： CELADON SYSTEMS INC , INTEL CORP , ROOT BRYAN J , FUNK WILLIAM A , PALUMBO MICHAEL
发明人： ROOT BRYAN J , FUNK WILLIAM A , PALUMBO MICHAEL
IPC分类号： G01R31/26
CPC分类号： G01R1/07307 , G01R1/07364 , G01R31/2601 , G01R31/2889
摘要： A test apparatus for testing a semiconductor device includes a circuit board having a contact pattern on one side and an opening therethrough, and a probe card supporting a probe needle array. The probe needle array is insertable into the opening of the circuit board and is configured to probe a device under test. The probe needle array is in electrical contact with the contact pattern of the circuit board, to allow signals through the probe card and circuit board to a test equipment. A holder supports the probe card and other probe cards. The holder has multiple sides, each of which is supportable of a probe card having a probe needle array. The holder is rotatable to manipulate and position the probe needle arrays of the probe cards relative to a device under test. The holder allows disconnection and replacement of the probe needle arrays from the holder.
摘要翻译：用于测试半导体器件的测试装置包括：一侧具有接触图案的电路板和穿过其的开口;以及支撑探针针阵列的探针卡。探针针阵列可插入电路板的开口中，并配置成探测被测器件。探针针阵列与电路板的接触图形电接触，以允许通过探针卡和电路板的信号到测试设备。支架支持探针卡和其他探针卡。保持器具有多个侧面，每个侧面可支撑具有探针针阵列的探针卡。保持器可旋转以相对于被测设备操纵和定位探针卡的探针针阵列。支架允许从保持器断开和更换探针针阵列。

7. 发明申请

WO2013006771A2 TEST SYSTEMS WITH A PROBE APPARATUS AND INDEX MECHANISM 审中-公开
标题翻译：带探针设备和索引机制的测试系统
公开(公告)号：WO2013006771A2
公开(公告)日：2013-01-10
申请号：PCT/US2012045705
申请日：2012-07-06
申请人： CELADON SYSTEMS INC , ROOT BRYAN J , FUNK WILLIAM A , DUNKLEE JOHN L
发明人： ROOT BRYAN J , FUNK WILLIAM A , DUNKLEE JOHN L
CPC分类号： G01R1/07364 , G01R1/0466 , G01R1/073 , G01R31/26 , G01R31/2889
摘要： A probe apparatus has probe wires with a contact pattern on one side. The contact pattern is for contacting a respective contact pattern on another test equipment or component, such as a circuit board. The probe wires have tips that probe a device desired for testing. Signals are transmitted through the probe wires from the probe card, for example, through a circuit board to other diagnostic equipment. The contact of the probe card with the circuit board allows signals to be transferred through the probe wires to the other diagnostic equipment. On another side of the probe card is a connector structure. The connector structure includes a retainer that can allow the probe card to be replaced from a test system, such as allowing it to be connected and disconnected from a holder.
摘要翻译：探针装置具有在一侧具有接触图案的探针导线。接触图案用于接触另一测试设备或组件（例如电路板）上的相应接触图案。探针导线具有探针，用于探测期望进行测试的设备。信号通过探针卡的探针传输，例如通过电路板传输到其他诊断设备。探针卡与电路板的接触允许信号通过探针传输到其他诊断设备。探针卡的另一侧是连接器结构。连接器结构包括保持器，其可以允许探针卡从测试系统更换，例如允许它与保持器连接和断开。

8. 发明申请

WO2012169168A1 三次元集積回路、及びそのテスト方法审中-公开
标题翻译： 3D集成电路及其测试方法
公开(公告)号：WO2012169168A1
公开(公告)日：2012-12-13
申请号：PCT/JP2012/003651
申请日：2012-06-04
申请人：パナソニック株式会社 , 橋本隆 , 森本高志
发明人：橋本　隆 , 森本　高志
IPC分类号： G01R31/28 , H01L21/822 , H01L25/065 , H01L25/07 , H01L25/18 , H01L27/00 , H01L27/04
CPC分类号： G01R31/2887 , G01R31/2801 , G01R31/2853 , G01R31/2889 , G01R31/318513 , H01L22/10 , H01L22/14 , H01L25/0657 , H01L2224/06181 , H01L2224/16145 , H01L2225/06513 , H01L2225/06544 , H01L2225/06596 , H01L2924/0002 , H01L2924/00
摘要：　三次元集積回路を構成する複数のチップはそれぞれ、一対の接続部、テスト信号生成回路、及びテスト結果判定回路を備えている。一対の接続部は、複数のチップの中で隣接するチップに電気的に接続される。テスト信号生成回路は、一対の接続部の一方へテスト信号を送出する。テスト結果判定回路は、一対の接続部の他方から信号を受信し、その信号の状態に基づいてその信号の伝送路の導通状態を検知する。複数のチップを積層する前では、一対の接続部の間を導電体で接続して直列接続を形成し、その直列接続の導通状態から各接続部の導通状態を検知する。一方、複数のチップを積層した後では、１枚のチップのテスト信号生成回路から送出されたテスト信号を別のチップのテスト結果判定回路で受信することによって、チップ間での接続部の導通状態をテストする。
摘要翻译：用于配置3D集成电路的多个芯片中的每一个设置有一对连接部分，测试信号生成电路和测试结果确定电路。该对连接部分电连接到多个芯片中的相邻芯片。测试信号产生电路将测试信号发送到该对中的一个连接部分。测试结果确定电路接收来自该对中的另一个连接部分的信号，并且基于信号的状态来检测信号的传输路径的导通状态。在分层多个芯片之前，一对连接部分之间的间隔经由导电体连接，形成串联连接，并且从串联连接的导通状态检测每个连接部分的导通状态。同时，在分层多个芯片之后，通过接收从另一芯片的测试信号产生电路发送的测试信号的芯片的测试结果确定电路来测试芯片之间的连接部分的导通状态。

9. 发明申请

WO2012033802A3 ELECTRICALLY CONDUCTIVE PINS FOR MICROCIRCUIT TESTER 审中-公开
标题翻译：用于微型测试仪的导电引线
公开(公告)号：WO2012033802A3
公开(公告)日：2012-05-18
申请号：PCT/US2011050634
申请日：2011-09-07
申请人： JOHNSTECH INT CORP , NELSON JOHN E , SHERRY JEFFREY C , ALLADIO PATRICK J , OBERG RUSSELL F , WARWICK BRIAN , MICHALKO GARY W
发明人： NELSON JOHN E , SHERRY JEFFREY C , ALLADIO PATRICK J , OBERG RUSSELL F , WARWICK BRIAN , MICHALKO GARY W
IPC分类号： G01R31/00
CPC分类号： G01R31/2891 , G01R1/0416 , G01R1/06738 , G01R1/06744 , G01R1/0735 , G01R3/00 , G01R31/2887 , G01R31/2889 , Y10T29/49204
摘要： The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface. The sliding is largely longitudinal, with a small and desirable lateral component determined by the inclination of the interface.
摘要翻译：被测器件的端子通过一系列导电引脚对临时电连接到负载板上的相应接触焊盘。销对通过插入器膜保持在适当的位置，该插入器膜包括面向被测器件的顶部接触板，面向负载板的底部接触板以及顶部和底部接触板之间的垂直弹性的非导电部件。每个销对包括顶部和底部销，其分别延伸超过顶部和底部接触板，朝向被测设备和负载板。顶部和底部销在相对于膜表面正常倾斜的界面处彼此接触。当纵向压缩时，销沿着界面滑动朝向彼此平移。滑动主要是纵向的，具有由界面的倾斜度确定的小而理想的横向分量。

10. 发明申请

WO2012006249A2 TESTING TECHNIQUES FOR THROUGH-DEVICE VIAS 审中-公开
标题翻译：通过设备VIAS的测试技术
公开(公告)号：WO2012006249A2
公开(公告)日：2012-01-12
申请号：PCT/US2011042850
申请日：2011-07-01
申请人： FORMFACTOR INC , ELDRIDGE BENJAMIN N
发明人： ELDRIDGE BENJAMIN N
IPC分类号： H01L21/66
CPC分类号： G01R31/2884 , G01R31/2889
摘要： Techniques for testing an electronic device with through-device vias can include using a probe card assembly with probes for contacting connection structures of the electronic device including ends of through-device vias of the electronic device. A pair of the probes can be electrically connected in the probe card assembly and can thus contact and form a direct return loop from one through-device via to another through-device via of a pair of the through-device vias with which the pair of probes is in contact. The electronic device can include test circuitry for driving a test signal onto the one of the through-device vias and a receiver for detecting the test signal on the other of the through-device vias.
摘要翻译：用于测试具有穿通设备通孔的电子设备的技术可以包括使用具有探针的探针卡组件，用于接触包括电子设备的穿通设备通孔的端部的电子设备的连接结构。一对探针可以电连接在探针卡组件中，并且因此可以接触并且形成从一个通过装置通孔到另一个通过装置通孔的直接返回回路，一对通过装置通孔与一对穿通装置通孔探针接触。电子设备可以包括用于将测试信号驱动到通过设备通孔中的一个上的测试电路和用于检测通过设备通孔中的另一个上的测试信号的接收器。

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