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61. 发明申请

WO2016040518A1 HIGH QUALITY FACTOR INDUCTOR AND HIGH QUALITY FACTOR FILTER IN PACKAGE SUBSTRATE OR PRINTED CIRCUIT BOARD (PCB) 审中-公开
标题翻译：包装基板或印刷电路板（PCB）中的高质量因子电感器和高品质因子滤波器
公开(公告)号：WO2016040518A1
公开(公告)日：2016-03-17
申请号：PCT/US2015/049238
申请日：2015-09-09
申请人： QUALCOMM INCORPORATED
发明人： YOON, Jung Ho , ZHANG, Xiaonan , LEE, Jong-Hoon , SONG, Young Kyu , JOW, Uei-Ming
IPC分类号： H01L23/498 , H01F17/00 , H03H7/09 , H05K1/16
CPC分类号： H01L28/40 , H01F17/0006 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/5223 , H01L23/5227 , H01L2224/02381 , H01L2224/0401 , H01L2224/05569 , H01L2224/05572 , H01L2224/16237 , H01L2924/15311 , H05K1/112 , H05K1/116 , H05K1/16 , H05K1/162 , H05K1/165 , H05K3/3436 , H05K3/4007 , H05K3/4688 , H05K2201/094 , H05K2201/096 , H05K2201/09672 , H05K2201/10734
摘要： A package substrate (or printed circuit board) that includes at least one dielectric layer, a first inductor structure is at least partially located in the dielectric layer, a third interconnect, and a second inductor structure. The first inductor structure includes a first interconnect, a first via coupled to the first interconnect, and a second interconnect coupled to the first via. The third interconnect is coupled to the first inductor structure. The third interconnect is configured to provide an electrical path for a ground signal. The second inductor structure is at least partially located in the dielectric layer. The second inductor is coupled to the third interconnect. The second inductor structure includes a fourth interconnect, a second via coupled to the fourth interconnect, and a fifth interconnect coupled to the second via. The first and second inductor structures are configured to operate with a capacitor as a 3 rd harmonic suppression filter.
摘要翻译：包括至少一个介电层的封装基板（或印刷电路板），第一电感结构至少部分地位于介电层，第三互连和第二电感结构中。第一电感器结构包括第一互连，耦合到第一互连的第一通路和耦合到第一通路的第二互连。第三互连件耦合到第一电感器结构。第三互连被配置为提供用于接地信号的电路径。第二电感器结构至少部分地位于电介质层中。第二电感器耦合到第三互连。第二电感器结构包括第四互连，耦合到第四互连的第二通路和耦合到第二通路的第五互连。第一和第二电感器结构被配置为用作为三次谐波抑制滤波器的电容器操作。

62. 发明申请

WO2016032804A1 MULTI-CHIP SILICON SUBSTRATE-LESS CHIP PACKAGING 审中-公开
标题翻译：多芯硅基板 - 不包括芯片包装
公开(公告)号：WO2016032804A1
公开(公告)日：2016-03-03
申请号：PCT/US2015/045752
申请日：2015-08-18
申请人： XILINX, INC.
发明人： KWON, Woon-Seong , RAMALINGAM, Suresh
IPC分类号： H01L25/065 , H01L23/485 , H01L25/00
CPC分类号： H01L23/5383 , H01L21/6835 , H01L23/16 , H01L23/3128 , H01L23/49816 , H01L23/5384 , H01L24/17 , H01L24/81 , H01L25/0652 , H01L25/0657 , H01L25/071 , H01L25/50 , H01L2221/68345 , H01L2224/16225 , H01L2224/17181 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/81005 , H01L2224/83005 , H01L2224/92125 , H01L2225/06517 , H01L2924/07802 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/00012
摘要： Examples generally provide a stacked silicon interconnect product (109) and method of manufacture. The stacked silicon interconnect product (109) includes a silicon substrate-less interposer (102) comprising a plurality of metallization layers (104), wherein at least one metallization layer (104) includes a plurality of metal segments (106) separated by dielectric material (108). The stacked silicon interconnect product (109) also includes a first die (110) coupled to a first side of the silicon substrate-less interposer (102) via a first plurality of microbumps (114). The stacked silicon interconnect product (109) further includes a second die (112) coupled to a second side of the silicon substrate-less interposer (102) via a second plurality of microbumps (114), the second die (112) communicatively coupled to the first die (110) through a metallization layer (104) of the plurality of metallization layers (104).
摘要翻译：实例通常提供堆叠的硅互连产品（109）和制造方法。堆叠的硅互连产品（109）包括包括多个金属化层（104）的无硅衬底中介层（102），其中至少一个金属化层（104）包括由电介质材料分离的多个金属段（106）（108）。堆叠的硅互连产品（109）还包括通过第一多个微胶片（114）耦合到无硅衬底的插入件（102）的第一侧的第一裸片（110）。堆叠的硅互连产品（109）还包括经由第二多个微焦点（114）耦合到无硅衬底的中介层（102）的第二侧的第二裸片（112），所述第二裸片（112）可通信地耦合到所述第一管芯（110）穿过所述多个金属化层（104）的金属化层（104）。

63. 发明申请

WO2016031579A1 半導体装置の製造方法及び封止用シート审中-公开
标题翻译：制造半导体器件的方法和密封片
公开(公告)号：WO2016031579A1
公开(公告)日：2016-03-03
申请号：PCT/JP2015/072851
申请日：2015-08-12
申请人：日東電工株式会社
发明人：志賀　豪士 , 石井　淳 , 飯野　智絵
IPC分类号： H01L21/56 , H01L23/12 , H01L23/29 , H01L23/31
CPC分类号： H01L21/56 , H01L23/12 , H01L23/29 , H01L23/31 , H01L24/97 , H01L2924/15311 , H01L2924/181 , H01L2924/00012
摘要：　樹脂封止時の封止体の反りを抑制し、その後の封止体のハンドリング性や半導体装置の信頼性の低下を防止可能な半導体装置の製造方法及び封止用シートを提供する。チップ実装配線層が基材に固定された支持体を準備する工程Ａ、前記配線層の線膨張係数と熱硬化後の線膨張係数との差の絶対値が１５ｐｐｍ／Ｋ以下である第１の封止層、及び前記基材の線膨張係数と熱硬化後の線膨張係数との差の絶対値が６ｐｐｍ／Ｋ以下である第２の封止層を準備する工程Ｂ、前記第１の封止層と前記第２の封止層とを備え、前記チップが埋め込まれた積層体を前記支持体上に形成する工程Ｃ、並びに前記積層体を熱硬化させる工程Ｄを含む半導体装置の製造方法。
摘要翻译：提供一种制造半导体器件的方法，其可以抑制树脂密封期间密封体的翘曲，并且防止随后的密封体的处理容易性以及半导体器件的可靠性的任何降低。还提供了密封片。一种用于制造半导体器件的方法，包括：步骤A，用于制备其中芯片安装布线层固定到基底的支撑体; 制造第一密封层的步骤B，其中布线层的线膨胀系数与热固化后的线膨胀系数之差的绝对值为15ppm / K以下，第二密封层，其中，基板的线膨胀系数与热固化后的线膨胀系数之差的绝对值为6ppm / K以下; 在所述支撑体上形成嵌入有所述芯片的层叠体的台阶C，所述层叠体设置有所述第一密封层和所述第二密封层; 以及用于对层状体进行热固化的台阶D.

64. 发明申请

WO2015200351A1 SYSTEM AND METHODS FOR PRODUCING MODULAR STACKED INTEGRATED CIRCUITS 审中-公开
标题翻译：用于生产模块化堆叠集成电路的系统和方法
公开(公告)号：WO2015200351A1
公开(公告)日：2015-12-30
申请号：PCT/US2015/037233
申请日：2015-06-23
申请人： ZGLUE, INC.
发明人： NASRULLAH, Jawad , ZHANG, Ming
IPC分类号： H05K7/14 , H05K1/14
CPC分类号： H01L22/34 , G06F17/5077 , H01L22/14 , H01L24/16 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0652 , H01L25/18 , H01L25/50 , H01L2224/16145 , H01L2224/16227 , H01L2224/48091 , H01L2224/48227 , H01L2224/73207 , H01L2224/81136 , H01L2224/81193 , H01L2224/81908 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06593 , H01L2225/06596 , H01L2924/00014 , H01L2924/15153 , H01L2924/1531 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19104 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A system according to some examples herein includes a base chip which may include a plurality of attachment slots for attaching dies thereto. One or more of the attachment slots may be programmable attachment slots. The base chip may further include circuitry for interconnecting the dies attached to the base chip. For example, the base chip may include a plurality of cross bar switches, each of which is associated with respective ones of the plurality of attachment slots. The base chip may further include a configuration block, which is adapted to receive and transmit test signals for determining electrically connected signal lines of one or more attachment slots when one or more dies are attached to the base chip and which is further adapted to receive configuration data for programming signal (including power and ground) channels of the cross bar switches.
摘要翻译：根据这里的一些示例的系统包括可以包括用于将管芯附接到其上的多个附接槽的基座芯片。一个或多个附接槽可以是可编程的附接槽。基本芯片还可以包括用于互连连接到基座芯片的管芯的电路。例如，基座芯片可以包括多个横杆开关，每个交叉开关与多个附接槽中的相应的开关相关联。基本芯片还可以包括配置块，其适于在一个或多个管芯附接到基座芯片时接收和发送用于确定一个或多个连接槽的电连接的信号线的测试信号，并且还适于接收配置交叉开关的编程信号（包括电源和接地）通道的数据。

65. 发明申请

WO2015199394A1 회로기판 및 회로기판 조립체 审中-公开
标题翻译：电路板和电路板组件
公开(公告)号：WO2015199394A1
公开(公告)日：2015-12-30
申请号：PCT/KR2015/006302
申请日：2015-06-22
申请人： 삼성전기 주식회사
发明人： 민태홍 , 강명삼 , 이정한 , 고영관
IPC分类号： H05K3/46 , H05K1/02
CPC分类号： H05K1/0206 , H01L2224/04105 , H01L2224/12105 , H01L2224/2518 , H01L2924/15311 , H05K1/0204 , H05K1/0207 , H05K1/0209 , H05K1/0298 , H05K1/111 , H05K1/181 , H05K1/185 , H05K3/4602 , H05K3/4608 , H05K2201/0195 , H05K2201/0323 , H05K2201/0338 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/10416 , H05K2201/10674 , H05K2201/10727
摘要： 열전도성 물질로 이루어지며, 적어도 일부가 절연부에 삽입되는 제1 열전달용 구조체; 상기 제1 열전달용 구조체에 일면이 접촉되는 제1 비아; 상기 제1 비아의 타면이 접촉되는 제1 금속패턴; 및 상기 제1 금속패턴에 연결되는 제1 결합부재;를 포함하며, 방열성능 향상, 경박단소화, 신뢰성 향상, 노이즈 감소, 제조효율 향상 중 적어도 하나가 가능한 회로기판이 개시된다.
摘要翻译：公开了一种印刷电路板，其能够提高散热性能，实现紧凑性，提高可靠性，降低噪音并提高制造效率中的至少一种，所述印刷电路板包括：第一传热结构，其由导热材料，其至少一部分插入绝缘部件中; 一个表面接触第一结构以进行热传递的第一通孔; 与第一通孔的另一表面接触的第一金属图案; 以及连接到第一金属图案的第一联接构件。

66. 发明申请

WO2015198836A1 半導体装置およびその製造方法审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2015198836A1
公开(公告)日：2015-12-30
申请号：PCT/JP2015/066347
申请日：2015-06-05
申请人：ソニー株式会社
发明人：村井　誠 , 高岡　裕二 , 山田　宏行 , 佐藤　和樹 , 今井　誠
IPC分类号： H01L21/60 , H01L23/12
CPC分类号： H01L23/49838 , H01L21/4853 , H01L21/563 , H01L23/3185 , H01L23/49816 , H01L23/49866 , H01L23/49894 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/11 , H01L2224/13082 , H01L2224/13147 , H01L2224/13155 , H01L2224/13564 , H01L2224/13609 , H01L2224/13611 , H01L2224/13639 , H01L2224/16225 , H01L2224/16238 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/8112 , H01L2224/81815 , H01L2924/014 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
摘要：　半導体チップと、前記半導体チップが配設されるパッケージ基板とを備え、前記半導体チップは、チップ本体と、前記チップ本体の素子形成面に設けられたはんだを含む複数の電極とを有し、前記パッケージ基板は、基板本体と、前記基板本体の表面に設けられた複数の配線およびソルダレジスト層とを有し、前記ソルダレジスト層は、前記基板本体の表面および前記複数の配線の上に連続層として設けられると共に、前記複数の配線の各々の上に開口を有し、前記開口は、前記開口内の前記配線の長手方向に長い平面形状を有し、前記開口の長さは、前記パッケージ基板の熱膨張係数に応じて調整されている半導体装置。
摘要翻译：一种半导体器件，包括：半导体芯片和其上设置有所述半导体芯片的封装衬底。半导体芯片包括主芯片体和设置在所述主芯片体的元件形成表面上的多个含焊料的电极。封装基板包括：主基板主体; 以及设置在所述主基板主体的表面上的多根导线和阻焊层。阻焊层设置为主基板主体和多根电线表面上方的连续层，并且在每个所述电线上方具有开口。每个所述开口具有在该开口内的线的长度方向上延伸的平面形状，并且根据封装基板的热膨胀系数来调节开口的长度。

67. 发明申请

WO2015156940A3 DIE WITH RESISTOR SWITCH HAVING AN ADJUSTABLE RESISTANCE 审中-公开
标题翻译：带有具有可调整电阻的电阻开关
公开(公告)号：WO2015156940A3
公开(公告)日：2015-12-23
申请号：PCT/US2015019526
申请日：2015-03-09
申请人： QUALCOMM INC
发明人： COUTTS RYAN MICHAEL , POPOVICH MIKHAIL
IPC分类号： H01L23/64 , G06F1/32 , H01L23/62
CPC分类号： G05F3/02 , G05F1/00 , G06F1/3287 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/62 , H01L23/647 , H01L24/16 , H01L28/40 , H01L2224/16227 , H01L2924/15311 , Y02B60/1282 , Y02D10/171
摘要： In one embodiment, an apparatus comprises a capacitor and a die. The die comprises a resistor switch coupled between a power line and the capacitor, wherein the resistor switch has an adjustable resistance, and the power line and the capacitor are both external to the die. The die also comprises a circuit configured to receive power from the power line.
摘要翻译：在一个实施例中，装置包括电容器和管芯。管芯包括耦合在电源线和电容器之间的电阻器开关，其中电阻器开关具有可调电阻，并且电源线和电容器都在管芯外部。芯片还包括被配置为从电力线接收电力的电路。

68. 发明申请

WO2015175554A2 CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHODS OF MANUFACTURE 审中-公开
标题翻译：导电连接，具有这种连接的结构以及制造方法
公开(公告)号：WO2015175554A2
公开(公告)日：2015-11-19
申请号：PCT/US2015/030410
申请日：2015-05-12
申请人： INVENSAS CORPORATION
发明人： KATKAR, Rajesh , UZOH, Cyprian, Emeka
IPC分类号： H01L21/60
CPC分类号： H01L24/14 , B23K1/0016 , B23K3/0623 , B23K35/0244 , B23K35/0266 , B23K2201/40 , H01L21/02225 , H01L21/4853 , H01L21/56 , H01L21/563 , H01L21/565 , H01L23/3114 , H01L23/3135 , H01L23/49811 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/73 , H01L24/742 , H01L24/81 , H01L24/83 , H01L24/98 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/03318 , H01L2224/0332 , H01L2224/0333 , H01L2224/0391 , H01L2224/05022 , H01L2224/05073 , H01L2224/0508 , H01L2224/051 , H01L2224/05567 , H01L2224/056 , H01L2224/06102 , H01L2224/10145 , H01L2224/11001 , H01L2224/11005 , H01L2224/11009 , H01L2224/111 , H01L2224/11318 , H01L2224/11334 , H01L2224/1134 , H01L2224/11849 , H01L2224/11901 , H01L2224/1191 , H01L2224/13005 , H01L2224/13017 , H01L2224/13018 , H01L2224/13021 , H01L2224/13022 , H01L2224/13078 , H01L2224/1308 , H01L2224/13082 , H01L2224/13084 , H01L2224/131 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/1319 , H01L2224/13561 , H01L2224/13562 , H01L2224/136 , H01L2224/13609 , H01L2224/13611 , H01L2224/1405 , H01L2224/16058 , H01L2224/16059 , H01L2224/16145 , H01L2224/16147 , H01L2224/16148 , H01L2224/16227 , H01L2224/16238 , H01L2224/1701 , H01L2224/1703 , H01L2224/17181 , H01L2224/17505 , H01L2224/2919 , H01L2224/73104 , H01L2224/73204 , H01L2224/75253 , H01L2224/81138 , H01L2224/81141 , H01L2224/81193 , H01L2224/81203 , H01L2224/8121 , H01L2224/8122 , H01L2224/81224 , H01L2224/81815 , H01L2224/81825 , H01L2224/8385 , H01L2224/9211 , H01L2225/06513 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/15321 , H01L2924/3512 , H01L2924/381 , H01L2924/3841 , H05K1/115 , H05K1/144 , H05K3/341 , H05K2201/09572 , H01L2924/00012 , H01L2924/00014 , H01L2924/014 , H01L2924/07025 , H01L2224/81 , H01L2224/83
摘要： In some embodiments, to increase the height-to-pitch ratio of a solder connection that connects different structures with one or more solder balls, only a portion of a solder ball's surface is melted when the connection is formed on one structure and/or when the connection is being attached to another structure. In some embodiments, non-solder balls are joined by an intermediate solder ball (140i). A solder connection may be surrounded by a solder locking layer (1210) and may be recessed in a hole (1230) in that layer. Other features are also provided.
摘要翻译：在一些实施例中，为了增加将不同结构与一个或多个焊球连接的焊料连接的高度与间距比，当在一个结构上形成连接时，和/或当连接正在附加到另一个结构。在一些实施例中，非焊球通过中间焊球（140i）连接。焊料连接可以被焊料锁定层（1210）包围，并且可以凹入该层中的孔（1230）中。还提供其他功能。

69. 发明申请

WO2015171118A1 MULTI-LAYER PACKAGE WITH INTEGRATED ANTENNA 审中-公开
标题翻译：多层包装与集成天线
公开(公告)号：WO2015171118A1
公开(公告)日：2015-11-12
申请号：PCT/US2014/036949
申请日：2014-05-06
申请人： INTEL CORPORATION , KAMGAING, Telesphor , ELSHERBINI, Adel A. , FRANK, Torrey W.
发明人： KAMGAING, Telesphor , ELSHERBINI, Adel A. , FRANK, Torrey W.
IPC分类号： H01L23/12
CPC分类号： H01L23/49838 , G06F1/1613 , H01L21/288 , H01L21/4857 , H01L21/486 , H01L23/145 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L23/5223 , H01L23/562 , H01L23/66 , H01L2223/6672 , H01L2223/6677 , H01L2224/16227 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2924/10253 , H01L2924/1421 , H01L2924/1433 , H01L2924/1434 , H01L2924/15311 , H01L2924/15321 , H01L2924/3511
摘要： Embodiments of the present disclosure describe a multi-layer package with antenna and associated techniques and configurations. In one embodiment, an integrated circuit (IC) package assembly includes a first layer having a first side and a second side disposed opposite to the first side a second layer coupled with the first side of the first layer, one or more antenna elements coupled with the second layer and a third layer coupled with the second side of the first layer, wherein the first layer is a reinforcement layer having a tensile modulus that is greater than a tensile modulus of the second layer and the third layer. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例描述了具有天线和相关联的技术和配置的多层封装。在一个实施例中，集成电路（IC）封装组件包括具有第一侧的第一层和与第一侧相对设置的第二层，第二层与第一层的第一侧耦合，一个或多个天线元件与所述第二层和与所述第一层的第二侧耦合的第三层，其中所述第一层是具有大于所述第二层和所述第三层的拉伸模量的拉伸模量的增强层。可以描述和/或要求保护其他实施例。

70. 发明申请

WO2015023781A3 CONTACTLESS COMMUNICATION UNIT CONNECTOR ASSEMBLIES 审中-公开
标题翻译：无触点通信单元连接器组件
公开(公告)号：WO2015023781A3
公开(公告)日：2015-11-12
申请号：PCT/US2014050937
申请日：2014-08-13
申请人： KEYSSA INC
发明人： ALMGREN ERIC , FADELL ANTHONY MICHAEL , ISAAC ROGER D , MCCORMACK GARY D , VAN TATENHOVE MARIEL
IPC分类号： H01P3/16 , H01Q13/24 , H01Q15/08
CPC分类号： H01P5/02 , H01L23/49541 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01P3/00 , H01P3/14 , H01Q7/00 , H04B5/0031 , H01L2924/00014 , H01L2924/00012
摘要： Contactless extremely high frequency connector assemblies, passive cable connector assemblies, and active cable connector assemblies are disclosed herein. In one embodiment, a contactless connector assembly can include several (EHF) contactless communication units operable to selectively transmit and receive EHF signals, and several signal directing structures coupled to the EHF CCUs. The signal directing structures can direct the EHF signals along a plurality of EHF signal pathways.
摘要翻译：这里公开了非接触式极高频率连接器组件，无源电缆连接器组件和有源电缆连接器组件。在一个实施例中，非接触式连接器组件可以包括可操作来选择性地发送和接收EHF信号的若干（EHF）非接触式通信单元，以及耦合到EHF CCU的若干信号引导结构。信号引导结构可以沿着多个EHF信号路径引导EHF信号。

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