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1. 发明申请

WO2010064341A1 チップを有する半導体装置审中-公开
标题翻译：具有芯片的半导体器件
公开(公告)号：WO2010064341A1
公开(公告)日：2010-06-10
申请号：PCT/JP2009/003380
申请日：2009-07-17
申请人：パナソニック株式会社 , 永井紀行 , 大隅貴寿
发明人：永井紀行 , 大隅貴寿
IPC分类号： H01L21/60 , G01R31/28 , H01L21/3205 , H01L21/822 , H01L23/52 , H01L27/04
CPC分类号： H01L21/563 , G01R31/2884 , H01L22/32 , H01L24/06 , H01L24/13 , H01L24/14 , H01L2224/0401 , H01L2224/05012 , H01L2224/05014 , H01L2224/05022 , H01L2224/05124 , H01L2224/05572 , H01L2224/05655 , H01L2224/0603 , H01L2224/06051 , H01L2224/06135 , H01L2224/06155 , H01L2224/06177 , H01L2224/06179 , H01L2224/06515 , H01L2224/131 , H01L2224/13144 , H01L2224/1403 , H01L2224/14135 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81801 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/351 , H01L2924/00014 , H01L2924/01014 , H01L2924/00 , H01L2224/05552
摘要：　半導体装置は、チップ（１０）が基板に実装された半導体装置であって、チップ（１０）に配置され、チップ（１０）の内部回路と電気的に接続するパッド群（Ａ）と、チップ（１０）のうちパッド群（Ａ）が配置された領域以外の領域に配置されたテスト用パッドパターン（Ｂ）とを備えている。パッド群（Ａ）は、チップ（１０）の主面に形成された複数のパッド（１２ａ）と、複数のパッド（１２ａ）の各々の上にバリアメタル膜を介して形成され、基板と電気的に接続するバンプ（１６ａ）とを有している。テスト用パッドパターン（Ｂ）は、チップ（１０）の主面に形成された複数のテスト用パッド（１２ｂ）と、複数のテスト用パッド（１２ｂ）の各々の上にテスト用バリアメタル膜を介して形成されたテスト用バンプ（１６ｂ）と、複数のテスト用パッド（１２ｂ）のうち互いに隣り合うテスト用パッド（１２ｂ）間を電気的に接続する配線（１１ｂ）とを有している。
摘要翻译：提供一种其中芯片（10）安装在基板上的半导体器件。半导体器件设置有衬垫组（A），其设置在芯片（10）上并与芯片（10）的内部电路电连接; 和用于测试的焊盘图案（B），其布置在除了垫组（A）布置的区域之外的区域上的芯片（10）上。焊盘组（A）具有形成在芯片（10）的主表面上的多个焊盘（12a）。以及在焊盘（12a）上分别形成有阻挡金属膜并与基板电连接的凸块（16a）。用于测试的焊盘图案（B）具有多个用于测试的焊盘（12b），其形成在芯片（10）的主表面上; 分别在焊盘（12b）上形成有用于在其间测试的阻挡金属膜的用于测试的凸块（16b）以及电连接在焊盘（12b）中的相邻焊盘（12b）之间的布线（11b）。

2. 发明申请

WO00037255A1 DRIVER IC CHIP AND PRINT HEAD 审中-公开
标题翻译：驱动IC芯片和打印头
公开(公告)号：WO00037255A1
公开(公告)日：2000-06-29
申请号：PCT/JP1999/007167
申请日：1999-12-21
IPC分类号： B41J2/345
CPC分类号： B41J2/345 , H01L24/06 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/06179 , H01L2224/48091 , H01L2224/48227 , H01L2924/1305 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： A driver IC chip (A) has a principal surface (10), in one corner area (11a) of which are provided first and second pads (3a, 3b) whose centers (Oa, Ob) are deviated from each other in the x and y directions. Since two wires can be extended from the first and second pads (3a, 3b), respectively, in any directions of x and y without bringing the wires close to each other, the short circuit between the wires is prevented.
摘要翻译：驱动器IC芯片（A）具有主表面（10），在其一个角区域（11a）中设置有第一和第二焊盘（3a，3b），其中心（Oa，Ob）彼此偏离x 和y方向。由于可以分别在x和y的任何方向上从第一和第二焊盘（3a，3b）延伸两根导线，而不会使导线彼此靠近，所以防止了导线之间的短路。

3. 发明申请

WO2013052441A2 STUB MINIMIZATION FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS 审中-公开
标题翻译：无窗口的线束组件的最小化
公开(公告)号：WO2013052441A2
公开(公告)日：2013-04-11
申请号：PCT/US2012/058398
申请日：2012-10-02
申请人： INVENSAS CORPORATION
发明人： CRISP, Richard, Dewitt , ZOHNI, Wael , HABA, Belgacem , LAMBRECHT, Frank
CPC分类号： G11C5/04 , G11C5/02 , G11C5/063 , G11C5/066 , H01L23/13 , H01L23/3128 , H01L23/36 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/50 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/24 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/18 , H01L2224/02375 , H01L2224/02379 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05569 , H01L2224/0557 , H01L2224/06155 , H01L2224/06156 , H01L2224/06165 , H01L2224/06179 , H01L2224/06181 , H01L2224/06515 , H01L2224/12105 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/48471 , H01L2224/49113 , H01L2224/49175 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2225/06506 , H01L2225/06513 , H01L2225/06517 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2225/06558 , H01L2225/06562 , H01L2225/06565 , H01L2225/06568 , H01L2225/06575 , H01L2225/06589 , H01L2924/00014 , H01L2924/01322 , H01L2924/10161 , H01L2924/1434 , H01L2924/1435 , H01L2924/1436 , H01L2924/1438 , H01L2924/15172 , H01L2924/15192 , H01L2924/15311 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/181 , H01L2924/18161 , H01L2924/3011 , H05K1/181 , H05K2201/09227 , H05K2201/10159 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A microelectronic package (100) can include a plurality of vertically stacked semiconductor chips 632, 637, the front face of at least one chip facing away from a first substrate surface (108), one or more columns (138, 143) of contacts (132) extending in a first direction (142) along surface (108). Columns (104A, 107B, 109A, 109B) of terminals (105 107) exposed at a second substrate surface (110) extend in the first direction. First terminals (105) disposed in a central region (112) of surface (110) which has width (152) not more than three and one-half times a minimum pitch (150) of the columns of terminals can be configured to carry address information usable to determine an addressable memory location. An axial plane of the at least one semiconductor chip can intersect the central region.
摘要翻译：微电子封装（100）可以包括多个垂直堆叠的半导体芯片632,637，至少一个芯片的前表面背离第一衬底表面（108），一个或多个接触柱（138,143） 132）沿着第一方向（142）沿着表面（108）延伸。在第二基板表面（110）处露出的端子（1057a）的列（104A，107B，109A，109B）在第一方向上延伸。布置在表面（110）的中心区域（112）中的第一端子（105）可以被配置为承载地址（110）的宽度（152）不大于端子列的最小间距（150）的三分之一倍的距离）用于确定可寻址存储器位置的信息。至少一个半导体芯片的轴向平面可以与中心区域相交。

4. 发明申请

WO2013052347A1 MEMORY MODULE IN A PACKAGE AND ITS PIN CONFIGURATION 审中-公开
标题翻译：封装中的存储器模块及其引脚配置
公开(公告)号：WO2013052347A1
公开(公告)日：2013-04-11
申请号：PCT/US2012/057563
申请日：2012-09-27
申请人： INVENSAS CORPORATION
发明人： CRISP, Richard Dewitt , ZOHNI, Wael , HABA, Belgacem , LAMBRECHT, Frank
IPC分类号： H01L25/065 , H01L23/49 , G11C5/06
CPC分类号： G11C5/063 , G11C5/04 , H01L22/32 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L23/50 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/24 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0655 , H01L25/0657 , H01L25/18 , H01L2224/02379 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05569 , H01L2224/0557 , H01L2224/06155 , H01L2224/06156 , H01L2224/06179 , H01L2224/06181 , H01L2224/06515 , H01L2224/12105 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/32225 , H01L2224/48145 , H01L2224/4824 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73257 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/81805 , H01L2225/06506 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06551 , H01L2225/06562 , H01L2225/06565 , H01L2225/06568 , H01L2225/06575 , H01L2225/06589 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/1434 , H01L2924/1435 , H01L2924/1436 , H01L2924/1438 , H01L2924/15172 , H01L2924/15192 , H01L2924/15311 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/181 , H01L2924/3011 , H01L2924/014 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A microelectronic package (100) can include a substrate (102) and a microelectronic element (130) having a face (134) and one or more columns (138, 140) of contacts (132) exposed thereat which face and are joined to corresponding contacts exposed at a surface (120) of the substrate. An axial plane (140) may intersect the face along a line in a first direction (142) and centered relative to the columns of element contacts (132). Columns (104A, 105B) of package terminals can extend in the first direction. First terminals exposed at a central region (112) of the second surface can be configured to carry address information usable to determine an addressable memory location within the microelectronic element. The central region (112) may have a width (152) not more than three and one-half times a minimum pitch (150) between the columns of package terminals. The axial plane can intersect the central region.
摘要翻译：微电子封装（100）可以包括衬底（102）和微电子元件（130），微电子元件（130）具有暴露在其上的面（134）和一个或多个触点（132）的一个或多个列（138,140）在衬底的表面（120）处暴露的触点。轴向平面（140）可以沿着第一方向（142）上的线与面相交并且相对于元件触点（132）的列居中。封装端子的列（104A，105B）可沿第一方向延伸。在第二表面的中心区域（112）处露出的第一端子可被配置为携带可用于确定微电子元件内的可寻址存储器位置的地址信息。中心区域（112）可以具有不大于封装端子列之间的最小间距（150）的三分之一的宽度（152）。轴向平面可以与中心区域相交。

5. 发明申请

WO2003010824A1 半導体装置审中-公开
标题翻译：半导体器件
公开(公告)号：WO2003010824A1
公开(公告)日：2003-02-06
申请号：PCT/JP2002/006400
申请日：2002-06-26
申请人：新潟精密株式会社 , 宮城弘 , 岡本明
发明人：宮城弘 , 岡本明
IPC分类号： H01L27/07
CPC分类号： H01L24/06 , H01F17/0006 , H01F27/34 , H01L23/5227 , H01L24/48 , H01L24/49 , H01L27/08 , H01L28/10 , H01L2223/6611 , H01L2224/05553 , H01L2224/05554 , H01L2224/05599 , H01L2224/0603 , H01L2224/06179 , H01L2224/48091 , H01L2224/4813 , H01L2224/49 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01029 , H01L2924/01079 , H01L2924/19042 , H01L2924/19104 , H01L2924/30107 , H01Q9/27 , H01L2224/45099
摘要： A semiconductor device for forming a coil with a high inductance and a high Q value on a semiconductor substrate. A semiconductor device (10) comprises a rectangular semiconductor substrate (12), pads formed near four corners of this semiconductor substrate (12), pads (30) formed in the peripheral region along each side other than the corners, and a bonding wire (40) for connecting adjacent pads (20). The circulation of the bonding wire (40) along the periphery of the semiconductor substrate (12) with the pads (20) formed in the corners constitutes a coil.
摘要翻译：一种用于在半导体衬底上形成具有高电感和高Q值的线圈的半导体器件。一种半导体器件（10），包括矩形半导体衬底（12），在该半导体衬底（12）的四角附近形成的焊盘，形成在除角部以外的边缘的周边区域中的焊盘（30） 40），用于连接相邻的垫（20）。沿着半导体基板（12）周边的接合线（40）的循环，形成在角部的焊盘（20）构成线圈。

6. 发明申请

WO99000845A1 ELECTRONIC CONTROL APPARATUS 审中-公开
标题翻译：控制单元
公开(公告)号：WO99000845A1
公开(公告)日：1999-01-07
申请号：PCT/DE1998/000621
申请日：1998-03-04
IPC分类号： H01L25/07 , H01L25/16 , H01L25/18
CPC分类号： H01L25/162 , H01L2224/0603 , H01L2224/06179 , H01L2224/48237 , H01L2224/4943 , H01L2924/01004 , H01L2924/01079 , H01L2924/09701 , H01L2924/1305 , H01L2924/13055 , H01L2924/19041 , Y10S174/34 , H01L2924/00
摘要： The invention relates to an electronic control apparatus comprising a housing, a substrate arranged in said housing and having an electronic control circuit, especially a hybrid substrate, and at least one apparatus plug-in connector fixed to the housing and having contact elements which are connected to the control circuit of the substrate in an electrically conductive manner. The invention provides for a second substrate, which is physically separated from the first substrate, to be positioned in the housing, on which second substrate are arranged at least one power component which is connected to the control circuit on the first substrate in an electrically conductive manner and a power conductor track connected to same power component in an electrically conductive manner, which conductor track is also connected in a conductive manner to a contact element of the apparatus plug-in connector, which contact element conducts power currents. When an apparatus plug-in connector has a large number of contact elements this arrangement makes it easier to electrically connect the contact elements to the substrate. The invention also simplifies the conductor track lay-out and improves both electromagnetic compatibility protection and dissipation of the heat generated by the power component.
摘要翻译：所以建议设置在具有壳体的电子控制单元，在所述壳体中，电子控制电路aufweisendem基板，尤其是混合动力车，以及至少一个固定到接触元件的外壳连接器，其导电地连接到所述基板的所述控制电路，被布置在从所述第一基板，第二基板隔开的外壳，与所述第一基板电连接到所述电源部件和导电地连接到相关联的连接导体轨迹设置在所述至少其导电地连接到一个功率电源组件上的控制电路流电源插头的导电接触元件，通过接触元件到基板的电连接的布置可以在大量的装置连接器的接触元件的来促进。此外，导体轨道布局被简化，在EMC保护的改进和改善的热由功率元件产生的损耗。

7. 发明申请

WO2014032228A1 BRIDGE BALL WIRE BONDING 审中-公开
标题翻译：桥式电线接线
公开(公告)号：WO2014032228A1
公开(公告)日：2014-03-06
申请号：PCT/CN2012/080668
申请日：2012-08-28
申请人： SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD. , WANG, Li , ZHU, Wenqiang , NIAN, Peter , PIADUCHE, Robertito , ARMENTANO, Aj , ZHANG, Jianjian
发明人： WANG, Li , ZHU, Wenqiang , NIAN, Peter , PIADUCHE, Robertito , ARMENTANO, Aj , ZHANG, Jianjian
IPC分类号： H01L23/48 , H01L21/60 , H01L23/488 , H01L23/50
CPC分类号： H01L24/06 , H01L23/50 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/78 , H01L24/85 , H01L2224/04042 , H01L2224/05553 , H01L2224/0603 , H01L2224/06179 , H01L2224/2919 , H01L2224/45144 , H01L2224/48091 , H01L2224/4813 , H01L2224/48227 , H01L2224/48465 , H01L2224/48482 , H01L2224/4903 , H01L2224/49113 , H01L2224/49171 , H01L2224/73265 , H01L2224/78301 , H01L2224/83101 , H01L2224/85048 , H01L2224/85051 , H01L2224/85181 , H01L2224/85207 , H01L2224/92247 , H01L2924/00014 , H01L2924/181 , H01L2224/05599 , H01L2924/00012 , H01L2924/00 , H01L2924/00015
摘要： A semiconductor device and a method of fabricating the semiconductor device are provided by the implementation of the present invention. The semiconductor device comprises: a substrate, a semiconductor die disposed above the substrate, and a bonding member. The substrate further comprises a bonding finger. The semiconductor die further comprises a first and an adjacent second bonding pads. The bonding member further comprises a single bonding wire having a ball disposed on a first end that electrically connects the first bonding pad and the second bonding pad and an opposite second end bonded directly on the bonding finger.
摘要翻译：通过实施本发明提供半导体器件和制造半导体器件的方法。半导体器件包括：衬底，设置在衬底上方的半导体管芯，以及接合构件。基板还包括粘结指状物。半导体管芯还包括第一和第二相邻的第二接合焊盘。接合构件还包括单个接合线，其具有设置在电连接第一接合焊盘和第二接合焊盘的第一端上的球，以及直接接合在接合指状物上的相对的第二端。

8. 发明申请

WO2013052398A3 STUB MINIMIZATION FOR ASSEMBLIES WITHOUT WIREBONDS TO PACKAGE SUBSTRATE 审中-公开
标题翻译：对于没有接线的组件，可以进行集成最小化以封装基板
公开(公告)号：WO2013052398A3
公开(公告)日：2013-08-22
申请号：PCT/US2012058229
申请日：2012-10-01
申请人： INVENSAS CORP
发明人： CRISP RICHARD DEWITT , ZOHNI WAEL , HABA BELGACEM , LAMBRECHT FRANK
IPC分类号： H01L23/498 , G11C5/04 , G11C5/06 , H01L21/66 , H01L23/00 , H01L23/31 , H01L25/065 , H01L25/18
CPC分类号： G11C5/063 , G11C5/04 , H01L22/32 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L23/50 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/24 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0655 , H01L25/0657 , H01L25/18 , H01L2224/02379 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05569 , H01L2224/0557 , H01L2224/06155 , H01L2224/06156 , H01L2224/06179 , H01L2224/06181 , H01L2224/06515 , H01L2224/12105 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/32225 , H01L2224/48145 , H01L2224/4824 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73257 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/81805 , H01L2225/06506 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06551 , H01L2225/06562 , H01L2225/06565 , H01L2225/06568 , H01L2225/06575 , H01L2225/06589 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/1434 , H01L2924/1435 , H01L2924/1436 , H01L2924/1438 , H01L2924/15172 , H01L2924/15192 , H01L2924/15311 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/181 , H01L2924/3011 , H01L2924/014 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A system (1500) or microelectronic assembly (300) can include one or more microelectronic packages (100) each having a substrate (102) and a microelectronic element (130) having a face (134) and one or more columns (138, 140) of contacts (132) exposed thereat which face and are joined to corresponding contacts on a surface (120) of the substrate. An axial plane (140) may intersect the face along a line in the first direction (142) and centered relative to the columns of element contacts. Columns (104A, 104B) of package terminals can extend in the first direction. First terminals exposed at a central region (112) of the second surface can be configured to carry address information usable to determine an addressable memory location within the microelectronic element. The central region (112) may have a width (152) not more than three and one-half times a minimum pitch (150) between the columns of package terminals. The axial plane can intersect the central region.
摘要翻译：系统（1500）或微电子组件（300）可以包括一个或多个微电子封装（100），每个具有衬底（102）和具有面（134）和一个或多个柱（138,140）的微电子元件）的触点（132）暴露在其上，并且与所述基板的表面（120）上的相应触点相连接。轴向平面（140）可以沿着第一方向（142）上的线与面相交并且相对于元件触点的列居中。封装端子的列（104A，104B）可以在第一方向上延伸。在第二表面的中心区域（112）处露出的第一端子可被配置为携带可用于确定微电子元件内的可寻址存储器位置的地址信息。中心区域（112）可以具有不大于封装端子列之间的最小间距（150）的三分之一的宽度（152）。轴向平面可以与中心区域相交。

9. 发明申请

WO2013052398A2 STUB MINIMIZATION FOR ASSEMBLIES WITHOUT WIREBONDS TO PACKAGE SUBSTRATE 审中-公开
标题翻译： STUB最小化无组件而不包含衬底的线
公开(公告)号：WO2013052398A2
公开(公告)日：2013-04-11
申请号：PCT/US2012/058229
申请日：2012-10-01
申请人： INVENSAS CORPORATION
发明人： CRISP, Richard, Dewitt , ZOHNI, Wael , HABA, Belgacem , LAMBRECHT, Frank
CPC分类号： G11C5/063 , G11C5/04 , H01L22/32 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L23/50 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/24 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0655 , H01L25/0657 , H01L25/18 , H01L2224/02379 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05569 , H01L2224/0557 , H01L2224/06155 , H01L2224/06156 , H01L2224/06179 , H01L2224/06181 , H01L2224/06515 , H01L2224/12105 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/32225 , H01L2224/48145 , H01L2224/4824 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73257 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/81805 , H01L2225/06506 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06551 , H01L2225/06562 , H01L2225/06565 , H01L2225/06568 , H01L2225/06575 , H01L2225/06589 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/1434 , H01L2924/1435 , H01L2924/1436 , H01L2924/1438 , H01L2924/15172 , H01L2924/15192 , H01L2924/15311 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/181 , H01L2924/3011 , H01L2924/014 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A system (1500) or microelectronic assembly (300) can include one or more microelectronic packages (100) each having a substrate (102) and a microelectronic element (130) having a face (134) and one or more columns (138, 140) of contacts (132) exposed thereat which face and are joined to corresponding contacts on a surface (120) of the substrate. An axial plane (140) may intersect the face along a line in the first direction (142) and centered relative to the columns of element contacts. Columns (104A, 104B) of package terminals can extend in the first direction. First terminals exposed at a central region (112) of the second surface can be configured to carry address information usable to determine an addressable memory location within the microelectronic element. The central region (112) may have a width (152) not more than three and one-half times a minimum pitch (150) between the columns of package terminals. The axial plane can intersect the central region.
摘要翻译：系统（1500）或微电子组件（300）可以包括一个或多个微电子封装（100），每个微电子封装具有衬底（102）和具有面（134）的微电子元件（130）暴露在那里的一个或多个触点（132）的列（138,140）面向基板的表面（120）上的相应触点并与其相连接。轴向平面（140）可以沿着在第一方向（142）上的直线与面相交并且相对于元件触点的列居中。封装端子的列（104A，104B）可以在第一方向上延伸。暴露在第二表面的中心区域（112）处的第一端子可以被配置为携带可用于确定微电子元件内的可寻址存储器位置的地址信息。中央区域（112）可以具有不超过封装端子列之间的最小间距（150）的三分之一和二分之一倍的宽度（152）。轴平面可以与中心区域相交。

10. 发明申请

WO9900845A8 ELECTRONIC CONTROL APPARATUS 审中-公开
标题翻译：电子控制器
公开(公告)号：WO9900845A8
公开(公告)日：1999-06-10
申请号：PCT/DE9800621
申请日：1998-03-04
申请人： BOSCH GMBH ROBERT , HERZOG ACHIM , SPACHMANN JUERGEN , WAGNER UWE , RAICA THOMAS
发明人： HERZOG ACHIM , SPACHMANN JUERGEN , WAGNER UWE , RAICA THOMAS
IPC分类号： H01L25/07 , H01L25/16 , H01L25/18
CPC分类号： H01L25/162 , H01L2224/0603 , H01L2224/06179 , H01L2224/48237 , H01L2224/4943 , H01L2924/01004 , H01L2924/01079 , H01L2924/09701 , H01L2924/1305 , H01L2924/13055 , H01L2924/19041 , Y10S174/34 , H01L2924/00
摘要： The invention relates to an electronic control apparatus comprising a housing, a substrate arranged in said housing and having an electronic control circuit, especially a hybrid substrate, and at least one apparatus plug-in connector fixed to the housing and having contact elements which are connected to the control circuit of the substrate in an electrically conductive manner. The invention provides for a second substrate, which is physically separated from the first substrate, to be positioned in the housing, on which second substrate are arranged at least one power component which is connected to the control circuit on the first substrate in an electrically conductive manner and a power conductor track connected to same power component in an electrically conductive manner, which conductor track is also connected in a conductive manner to a contact element of the apparatus plug-in connector, which contact element conducts power currents. When an apparatus plug-in connector has a large number of contact elements this arrangement makes it easier to electrically connect the contact elements to the substrate. The invention also simplifies the conductor track lay-out and improves both electromagnetic compatibility protection and dissipation of the heat generated by the power component.
摘要翻译：所以建议设置在具有壳体的电子控制单元，在所述壳体中，电子控制电路aufweisendem基板，尤其是混合动力车，以及至少一个固定到接触元件的外壳连接器，其导电地连接到所述基板的所述控制电路，被布置在从所述第一基板，第二基板隔开的外壳，与所述第一基板电连接到所述电源部件和导电地连接到相关联的连接导体轨迹设置在所述至少其导电地连接到一个功率电源组件上的控制电路流电源插头的导电接触元件，由于这种布置，在器件插头的大量接触元件的情况下，可以促进接触元件与衬底的电连接。此外，布线布局被简化，实现了EMC保护的改进，并且功率器件产生的热量的消散得到改善。

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