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    • 2. 发明申请
    • TECHNIQUE TO DEPOSIT SIDEWALL PASSIVATION FOR HIGH ASPECT RATIO CYLINDER ETCH
    • 用于沉积高纵横比柱塞的侧壁钝化技术
    • WO2018026867A1
    • 2018-02-08
    • PCT/US2017/044986
    • 2017-08-01
    • LAM RESEARCH CORPORATION
    • HUDSON, Eric A.
    • H01L21/311H01L21/3213H01L21/02H01L21/67H01J37/32H01L27/108
    • H01L21/67748H01J37/32091H01J37/32568H01J37/32715H01L21/31116H01L21/67167H01L21/6719H01L21/67201H01L21/67207H01L21/67259H01L27/10861
    • Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reactants having low sticking coefficients in some embodiments. The protective coating may also be deposited using particular reaction mechanisms that result in substantially complete sidewall coating. In some cases the protective coating is deposited using plasma assisted atomic layer deposition or plasma assisted chemical vapor deposition.
    • 这里的各种实施例涉及用于在半导体衬底上的电介质材料中形成凹陷结构的方法,设备和系统。 以循环方式采用分开的蚀刻和沉积操作。 每个蚀刻操作部分蚀刻该特征。 每个沉积操作在特征的侧壁上形成保护涂层以防止在蚀刻操作期间电介质材料的横向蚀刻。 可以使用导致沿着侧壁的大致整个长度形成保护涂层的方法来沉积保护涂层。 在一些实施例中,可以使用具有低粘着系数的特定反应物来沉积保护涂层。 保护涂层也可以使用导致基本上完全侧壁涂覆的特定反应机理来沉积。 在某些情况下,使用等离子体辅助原子层沉积或等离子体辅助化学气相沉积来沉积保护涂层。