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1. 发明申请

WO2012018918A2 GENERATING A NON-REVERSIBLE STATE AT A BITCELL HAVING A FIRST MAGNETIC TUNNEL JUNCTION AND A SECOND MAGNETIC TUNNEL JUNCTION 审中-公开
标题翻译：在具有第一磁性隧道接头和第二磁性隧道接头的位置处产生不可逆状态
公开(公告)号：WO2012018918A2
公开(公告)日：2012-02-09
申请号：PCT/US2011/046429
申请日：2011-08-03
申请人： QUALCOMM INCORPORATED , RAO, Hari, M. , KIM, Jung, Pill , KANG, Seung, H. , ZHU, Xiaochun , KIM, Tae, Hyun , LEE, Kangho , LI, Xia , HSU, Wah, Nam , HAO, Wuyang , SUH, Jungwon , YU, Nicholas, K. , NOWAK, Matthew, Michael , MILLENDORF, Steven, M. , ASHKENAZI, Asaf
发明人： RAO, Hari, M. , KIM, Jung, Pill , KANG, Seung, H. , ZHU, Xiaochun , KIM, Tae, Hyun , LEE, Kangho , LI, Xia , HSU, Wah, Nam , HAO, Wuyang , SUH, Jungwon , YU, Nicholas, K. , NOWAK, Matthew, Michael , MILLENDORF, Steven, M. , ASHKENAZI, Asaf
IPC分类号： G11C17/16
CPC分类号： G11C11/16 , G11C11/14 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C17/02 , G11C17/16 , G11C29/027
摘要： A method of generating a non-reversible state at a bitcell having a first magnetic tunnel junction (MTJ) and a second MTJ includes applying a program voltage to the first MTJ of the bitcell without applying the program voltage to the second MTJ of the bitcell. A memory device includes a bitcell having a first MTJ and a second MTJ and programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell.
摘要翻译：在具有第一磁性隧道结（MTJ）和第二MTJ的位单元处产生不可逆状态的方法包括将编程电压施加到位单元的第一MTJ，而不将编程电压施加到位单元的第二MTJ。存储器件包括具有第一MTJ和第二MTJ的位单元以及被配置为通过将程序信号施加到位单元的第一MTJ和第二MTJ中的所选择的一个而在位单元处产生不可逆状态的编程电路。

2. 发明申请

WO2012044640A1 RESISTANCE-BASED MEMORY HAVING TWO-DIODE ACCESS DEVICE 审中-公开
标题翻译：具有两个二极管访问器件的基于电阻的存储器
公开(公告)号：WO2012044640A1
公开(公告)日：2012-04-05
申请号：PCT/US2011/053569
申请日：2011-09-28
申请人： QUALCOMM INCORPORATED , HAO, Wuyang , SUH, Jungwon , LEE, Kangho , KIM, Tae Hyun , KIM, Jung Pill , KANG, Seung H.
发明人： HAO, Wuyang , SUH, Jungwon , LEE, Kangho , KIM, Tae Hyun , KIM, Jung Pill , KANG, Seung H.
IPC分类号： G11C11/16 , G11C13/00
CPC分类号： G11C13/0069 , G11C11/16 , G11C11/1653 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C13/0002 , G11C13/003 , G11C2213/72 , G11C2213/74
摘要： A resistance -based memory has a two-diode access device. In a particular embodiment, a method includes biasing a bit line (114) and a sense line (112) to generate a current through a resistance -based memory element (110) via a first diode (116) or a second diode (118). A cathode of the first diode is coupled to the bit line and an anode of the second diode is coupled to the sense line.
摘要翻译：基于电阻的存储器具有二极管接入装置。在特定实施例中，一种方法包括偏置位线（114）和感测线（112），以经由第一二极管（116）或第二二极管（118）产生通过基于电阻的存储元件（110）的电流，。第一二极管的阴极耦合到位线，并且第二二极管的阳极耦合到感测线。

3. 发明申请

WO2012116375A1 MAGNETIC RANDOM ACCESS MEMORY (MRAM) READ WITH REDUCED DISTURB FAILURE 审中-公开
标题翻译：磁性随机存取存储器（MRAM）读取与减少的干扰故障
公开(公告)号：WO2012116375A1
公开(公告)日：2012-08-30
申请号：PCT/US2012/026831
申请日：2012-02-27
申请人： QUALCOMM INCORPORATED , KIM, Jung Pill , KIM, Tae Hyun , LEE, Kangho
发明人： KIM, Jung Pill , KIM, Tae Hyun , LEE, Kangho
IPC分类号： G11C11/16
CPC分类号： G11C11/1673 , G11C11/1693
摘要： Magnetic tunnel junctions (MTJs) in magnetic random access memory (MRAM) are subject to read disturb events when the current passing through the MTJ causes a spontaneous switching of the MTJ due to spin transfer torque (STT) from a parallel state to an anti-parallel state or from an anti-parallel state to a parallel state. Because the state of the MTJ corresponds to stored data, a read disturb event may cause data loss in MRAM devices. Read disturb events may be reduced by controlling the direction of current flow through the MTJ. For example, the current direction through a reference MTJ may be selected based on the state of the reference MTJ. In another example, the current direction through a data or reference MTJ may be alternated such that the MTJ is only subject to read disturb events during approximately half the read operations on the MTJ.
摘要翻译：磁流体随机存取存储器（MRAM）中的磁隧道结（MTJ）在经过MTJ的电流导致由于自旋转移转矩（STT）从平行状态到抗反射的MTJ自发切换时，受到读取干扰事件，平行状态或从反平行状态到并行状态。因为MTJ的状态对应于存储的数据，读取干扰事件可能导致MRAM设备中的数据丢失。通过控制通过MTJ的电流的方向可以减少读取干扰事件。例如，可以基于参考MTJ的状态来选择通过参考MTJ的当前方向。在另一示例中，可以交替通过数据或参考MTJ的当前方向，使得MTJ仅在MTJ上的大约一半的读取操作期间经受读取干扰事件。

4. 发明申请

WO2012048326A1 MAGNETIC RANDOM ACCESS MEMORY (MRAM) LAYOUT WITH UNIFORM PATTERN 审中-公开
标题翻译：具有均匀图案的磁性随机存取存储器（MRAM）布局
公开(公告)号：WO2012048326A1
公开(公告)日：2012-04-12
申请号：PCT/US2011/055634
申请日：2011-10-10
申请人： QUALCOMM INCORPORATED , LEE, Kangho , KIM, Tae Hyun , LI, Xia , KIM, Jung Pill , KANG, Seung H.
发明人： LEE, Kangho , KIM, Tae Hyun , LI, Xia , KIM, Jung Pill , KANG, Seung H.
IPC分类号： G11C5/02 , H01L27/02
CPC分类号： G11C5/025 , G11C5/08 , G11C11/165 , H01L27/0207 , Y10T29/49117
摘要： A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects.
摘要翻译：大规模存储器阵列包括统一大小的虚拟位单元和有源位单元的均匀图案。大规模存储器阵列中的子阵列由虚拟位单元分隔开。信号分配电路形成为具有对应于虚拟位单元的宽度或高度的宽度或高度，使得信号分配电路占据与虚拟位单元相同的覆盖区，而不会破坏整个大规模阵列上的均匀图案。类似大小或大于标准尺寸位单元的边缘虚拟单元可以放置在大规模阵列的边缘周围，以进一步减少图案负载影响。

5. 发明申请

WO2011088378A1 SYSTEM AND METHOD TO CONTROL A DIRECTION OF A CURRENT APPLIED TO A MAGNETIC TUNNEL JUNCTION 审中-公开
标题翻译：用于控制应用于磁性隧道结的电流的方向的系统和方法
公开(公告)号：WO2011088378A1
公开(公告)日：2011-07-21
申请号：PCT/US2011/021380
申请日：2011-01-14
申请人： QUALCOMM Incorporated , KIM, Jung, Pill , RAO, Hari, M. , LEE, Kangho
发明人： KIM, Jung, Pill , RAO, Hari, M. , LEE, Kangho
IPC分类号： G11C11/16 , H01L43/08
CPC分类号： G11C11/1673 , H01L43/08
摘要： A system and method to control a direction of a current applied to a magnetic tunnel junction (139) is disclosed. In a particular embodiment, an apparatus comprises a magnetic tunnel junction (MTJ) storage element and a sense amplifier (102). The sense amplifier is coupled to a first path (114) and to a second path (116). The first path includes a first current direction selecting transistor (118) and the second path includes a second current direction selecting transistor (120). The first path is coupled to a bit line (140) of the MTJ storage element and the second path is coupled to a source line (142) of the MTJ storage element.
摘要翻译：公开了一种控制施加到磁性隧道结（139）的电流的方向的系统和方法。在特定实施例中，一种装置包括磁性隧道结（MTJ）存储元件和读出放大器（102）。读出放大器耦合到第一路径（114）和第二路径（116）。第一路径包括第一电流方向选择晶体管（118），并且第二路径包括第二电流方向选择晶体管（120）。第一路径耦合到MTJ存储元件的位线（140），并且第二路径耦合到MTJ存储元件的源极线（142）。

6. 发明申请

WO2012009589A1 PROGRAMMABLE WRITE DRIVER FOR STT-MRAM 审中-公开
标题翻译：适用于STT-MRAM的可编程驱动程序
公开(公告)号：WO2012009589A1
公开(公告)日：2012-01-19
申请号：PCT/US2011/044094
申请日：2011-07-15
申请人： QUALCOMM INCORPORATED , RAO, Hari M. , KIM, Jung Pill , LEE, Kangho
发明人： RAO, Hari M. , KIM, Jung Pill , LEE, Kangho
IPC分类号： G11C11/16
CPC分类号： G11C11/1675 , G11C2029/5006 , H01L27/228
摘要： A non-volatile memory structure comprises programmable write drivers for controlling drive strengths of write operations to storage elements. The memory structure comprises a storage element coupled to a bit line, a switching element coupled to the storage element, a source line and a word line, wherein the switching element is configured to change a logic state of the storage element. A first and a second write driver with programmable drive strengths are coupled to the bit line and source line respectively to enable control of drive strengths of write operations to the storage element.
摘要翻译：非易失性存储器结构包括用于控制对存储元件的写入操作的驱动强度的可编程写入驱动器。存储器结构包括耦合到位线的存储元件，耦合到存储元件的开关元件，源极线和字线，其中开关元件被配置为改变存储元件的逻辑状态。具有可编程驱动强度的第一和第二写入驱动器分别耦合到位线和源极线，以便能够控制对存储元件的写入操作的驱动强度。

7. 发明申请

WO2011143099A1 WRITE ENERGY CONSERVATION IN MEMORY 审中-公开
标题翻译：内存中的写入能量保存
公开(公告)号：WO2011143099A1
公开(公告)日：2011-11-17
申请号：PCT/US2011/035725
申请日：2011-05-09
申请人： QUALCOMM INCORPORATED , RAO, Hari M. , KIM, Jung Pill , KIM, Taehyun , ZHU, Xiaochun , LEE, Kangho , HAO, Wuyang
发明人： RAO, Hari M. , KIM, Jung Pill , KIM, Taehyun , ZHU, Xiaochun , LEE, Kangho , HAO, Wuyang
IPC分类号： G11C11/16
CPC分类号： G11C11/1675 , G11C11/1693
摘要： A method writes data to a resistive memory, such as spin torque transfer magnetic random access memory (STT-MRAM). The method writes received bits of data to a memory cell array, in response to a first write signal. The method also reads stored data from the memory cell array, after the first write signal is generated, and then compares the stored data with the received bits of data to determine whether each of the received bits of data was written to the memory. In response to a second write signal, received bits of data determined not to have been written during the first write signal, are written.
摘要翻译：一种方法将数据写入电阻性存储器，如自旋扭矩传递磁随机存取存储器（STT-MRAM）。该方法响应于第一写入信号将接收到的数据位写入存储单元阵列。该方法还在生成第一写信号之后从存储单元阵列中读取存储的数据，然后将所存储的数据与接收的数据位进行比较，以确定每个接收的数据位是否被写入存储器。响应于第二写入信号，写入在第一写入信号期间被确定为不被写入的数据的接收位。

8. 发明申请

WO2013040069A1 SYMMETRICALLY SWITCHABLE SPIN-TRANSFER-TORQUE MAGNETORESISTIVE DEVICE 审中-公开
标题翻译：对称可转换转子 - 转矩磁阻器件
公开(公告)号：WO2013040069A1
公开(公告)日：2013-03-21
申请号：PCT/US2012/054911
申请日：2012-09-12
申请人： QUALCOMM Incorporated , CHEN, Wei-Chuan , LEE, Kangho , ZHU, Xiaochun , KANG, Seung H.
发明人： CHEN, Wei-Chuan , LEE, Kangho , ZHU, Xiaochun , KANG, Seung H.
IPC分类号： G11C11/16
CPC分类号： G11C11/161
摘要： A spin transfer torque magnetic random access memory (STT-MRAM) device includes magnetic tunnel junctions (MTJs) with reduced switching current asymmetry At least one switching asymmetry balance layer (SABL, 112) near the free layer (108) of the MTJ reduces a first switching current lc(p-ap) causing the value of the first switching current to be nearly equal to the value of a second switching current lc(ap-p) without increasing the average switching current of the device. The SABL (112) may be a non-magnetic switching asymmetry balance layer (NM-SABL, 110) and/or a magnetic switching asymmetry balance layer (M-SABL, 112).
摘要翻译：自旋传递转矩磁随机存取存储器（STT-MRAM）装置包括具有降低的开关电流不对称性的磁隧道结（MTJ）。在MTJ的自由层（108）附近的至少一个开关不对称平衡层（SABL，112）减少了第一开关电流lc（p-ap）使得第一开关电流的值几乎等于第二开关电流lc（ap-p）的值，而不增加器件的平均开关电流。 SABL（112）可以是非磁性开关不对称平衡层（NM-SABL，110）和/或磁性开关不对称平衡层（M-SABL，112）。

9. 发明申请

WO2010138860A1 SPIN TRANSFER TORQUE - MAGNETIC TUNNEL JUNCTION DEVICE AND METHOD OF OPERATION 审中-公开
标题翻译：旋转传动扭矩 - 磁性隧道连接装置及其操作方法
公开(公告)号：WO2010138860A1
公开(公告)日：2010-12-02
申请号：PCT/US2010/036645
申请日：2010-05-28
申请人： QUALCOMM Incorporated , LI, Xia , LEE, Kangho , ZHU, Xiaochun , KANG, Seung H.
发明人： LI, Xia , LEE, Kangho , ZHU, Xiaochun , KANG, Seung H.
IPC分类号： G11C11/16
CPC分类号： G11C11/1675 , G11C11/161 , G11C11/1659
摘要： A method is disclosed that includes controlling current flow direction for current sent over a source line or a bit line of a magnetic memory device. A current generated magnetic field assists switching of a direction of a magnetic field of a free layer of a magnetic element within a spin transfer torque magnetic tunnel junction (STT-MTJ) device.
摘要翻译：公开了一种方法，其包括控制通过磁存储器件的源极线或位线发送的电流的电流流动方向。电流产生的磁场有助于在自旋转移转矩磁隧道结（STT-MTJ）装置内的磁性元件自由层的磁场方向的切换。

10. 发明申请

WO2010101860A2 REDUCING SOURCE LOADING EFFECT IN SPIN TORQUE TRANSFER MAGNETORESITIVE RANDOM ACCESS MEMORY (STT-MRAM) 审中-公开
标题翻译：减小自旋转矩磁阻随机存取存储器（STT-MRAM）中的源负载效应
公开(公告)号：WO2010101860A2
公开(公告)日：2010-09-10
申请号：PCT/US2010/025834
申请日：2010-03-02
申请人： QUALCOMM INCORPORATED , LEE, Kangho , KANG, Seung, H. , ZHU, Xiaochun
发明人： LEE, Kangho , KANG, Seung, H. , ZHU, Xiaochun
IPC分类号： G11C11/16
CPC分类号： H01L43/08 , G06F17/5068 , G11C11/16 , G11C11/161 , G11C11/1675 , H01L43/02 , H01L43/12
摘要： Systems and methods to reduce source loading effects in STT-MRAM are disclosed. In a particular embodiment, a method includes determining a switching current ratio of a magnetic tunnel junction (MTJ) structure that enables stable operation of a memory cell. The memory cell includes the MTJ structure serially coupled to an access transistor. The method also includes modifying an offset magnetic field that is incident to a free layer of the MTJ structure. The modified offset magnetic field causes the MTJ structure to exhibit the switching current ratio.
摘要翻译：公开了用于减少STT-MRAM中的源加载效应的系统和方法。在特定实施例中，一种方法包括确定使得能够稳定操作存储器单元的磁隧道结（MTJ）结构的切换电流比。存储器单元包括串联耦合到存取晶体管的MTJ结构。该方法还包括修改入射到MTJ结构的自由层的偏移磁场。改进的偏移磁场使MTJ结构呈现开关电流比。

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