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31. 发明申请

WO2010065249A3 METHODS OF FABRICATING SUBSTRATES 审中-公开
标题翻译：制造基材的方法
公开(公告)号：WO2010065249A3
公开(公告)日：2010-07-22
申请号：PCT/US2009063978
申请日：2009-11-11
申请人： MICRON TECHNOLOGY INC , SILLS SCOTT , SANDHU GURTEJ S , DEVILLIERS ANTON
发明人： SILLS SCOTT , SANDHU GURTEJ S , DEVILLIERS ANTON
IPC分类号： H01L21/027
CPC分类号： H01L21/31138 , G03F7/0035 , H01L21/0273 , H01L21/0337 , H01L21/0338
摘要： A method of fabricating a substrate includes forming spaced first features and spaced second features over a substrate. The first and second features alternate with one another and are spaced relative one another. Width of the spaced second features is laterally trimmed to a greater degree than any lateral trimming of width of the spaced first features while laterally trimming width of the spaced second features. After laterally trimming of the second features, spacers are formed on sidewalls of the spaced first features and on sidewalls of the spaced second features. The spacers are of some different composition from that of the spaced first features and from that of the spaced second features. After forming the spacers, the spaced first features and the spaced second features are removed from the substrate. The substrate is processed through a mask pattern comprising the spacers. Other embodiments are disclosed.
摘要翻译：制造衬底的方法包括在衬底上形成间隔开的第一特征和间隔开的第二特征。第一和第二特征彼此交替并且相对于彼此间隔开。间隔开的第二特征的宽度横向修剪到比间隔开的第一特征的宽度的任何横向修整更大的程度，而横向修剪间隔开的第二特征的宽度。在横向修整第二特征之后，在间隔开的第一特征的侧壁上和间隔开的第二特征的侧壁上形成间隔物。间隔物具有与间隔开的第一特征和间隔开的第二特征不同的组成。在形成间隔物之后，将间隔开的第一部件和间隔开的第二部件从基板上移除。衬底通过包括间隔物的掩模图案进行处理。公开了其他实施例。

32. 发明申请

WO2009154935A2 DIODES, AND METHODS OF FORMING DIODES 审中-公开
标题翻译：二极体和形成二极体的方法
公开(公告)号：WO2009154935A2
公开(公告)日：2009-12-23
申请号：PCT/US2009044801
申请日：2009-05-21
申请人： MICRON TECHNOLOGY INC , SANDHU GURTEJ S , MOULI CHANDRA
发明人： SANDHU GURTEJ S , MOULI CHANDRA
IPC分类号： H01L29/861
CPC分类号： H01L29/66151 , B82Y10/00 , H01L21/28 , H01L21/283 , H01L28/90 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/08 , H01L29/417 , H01L29/66143 , H01L29/872 , H01L29/88 , H01L45/00
摘要： Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
摘要翻译：一些实施例包括形成二极管的方法，其中第一电极形成为具有从基部向上延伸的基座。沿着延伸穿过基座和基底的波状形貌沉积至少一层，并且在最少一层上形成第二电极。第一电极，至少一层和第二电极一起形成当一个极性的电压施加到结构时在第一和第二电极之间传导电流的结构，并且当电压具有与所述一个极性相反的极性被施加到该结构。一些实施例包括具有第一电极的二极管，该第一电极包含从基底向上延伸的两个或更多个突起，在第一电极上具有至少一个层，并且在该至少一个层上具有第二电极。

33. 发明申请

WO2007127496A3 TOPOGRAPHY DIRECTED PATTERNING 审中-公开
标题翻译：地形指导图案
公开(公告)号：WO2007127496A3
公开(公告)日：2008-01-17
申请号：PCT/US2007011524
申请日：2007-05-14
申请人： MICRON TECHNOLOGY INC , SANDHU GURTEJ S
发明人： SANDHU GURTEJ S
IPC分类号： B82B3/00 , H01L21/033 , H01L21/308
CPC分类号： H01L21/3081 , G03F7/0002 , H01L21/0332 , H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , Y10T428/24058 , Y10T428/2995
摘要： A pattern having exceptionally small features is formed on a partially fabricated integrated circuit (102) during integrated circuit fabrication. The pattern comprises features (162), (164) formed by self-organizing material, such as diblock copolymers. The organization of the copolymers is directed by spacers (152) which have been formed by a pitch multiplication process in which the spacers (152) are formed at the sides of sacrificial mandrels (142), which are later removed to leave the spaced-apart, free-standing spacers (152). Diblock copolymers, composed of two immiscible block species, are deposited over and in the space between the spacers (152). The copolymers are made to self-organize, with each block species aggregating with other block species of the same type.
摘要翻译：在集成电路制造期间，在部分制造的集成电路（102）上形成具有特别小特征的图案。图案包括由自组织材料形成的特征（162），（164），例如二嵌段共聚物。共聚物的组织由间隔物（152）引导，间隔物（152）已经通过间距倍增过程形成，其中间隔物（152）形成在牺牲心轴（142）的侧面，后者被移除以离开间隔开，独立式间隔件（152）。由两个不混溶的嵌段物质组成的二嵌段共聚物沉积在间隔物（152）之上和之间的空间中。使共聚物自组织，每个嵌段物质与相同类型的其它嵌段物种聚集。

34. 发明申请

WO2013028685A3 SEMICONDUCTOR DEVICE STRUCTURES INCLUDING VERTICAL TRANSISTOR DEVICES, ARRAYS OF VERTICAL TRANSISTOR DEVICES, AND METHODS OF FABRICATION 审中-公开
标题翻译：包括垂直晶体管器件的半导体器件结构，垂直晶体管器件阵列以及制造方法
公开(公告)号：WO2013028685A3
公开(公告)日：2013-05-16
申请号：PCT/US2012051711
申请日：2012-08-21
申请人： MICRON TECHNOLOGY INC , SANDHU GURTEJ S
发明人： SANDHU GURTEJ S
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/4908 , B82Y10/00 , H01L21/823437 , H01L21/823487 , H01L27/105 , H01L27/1052 , H01L27/1225 , H01L29/24 , H01L29/401 , H01L29/42372 , H01L29/42392 , H01L29/49 , H01L29/66666 , H01L29/66795 , H01L29/66969 , H01L29/7827 , H01L29/785 , H01L29/7855 , H01L29/78642 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要： A semiconductor device structure is disclosed. The semiconductor device structure includes a mesa extending above a substrate. The mesa has a channel region between a first side and second side of the mesa. A first gate is on a first side of the mesa, the first gate comprising a first gate insulator and a first gate conductor comprising graphene overlying the first gate insulator. The gate conductor may comprise graphene in one or more monolayers. Also disclosed are a method for fabricating the semiconductor device structure; an array of vertical transistor devices, including semiconductor devices having the structure disclosed; and a method for fabricating the array of vertical transistor devices.
摘要翻译：公开了一种半导体器件结构。该半导体器件结构包括在衬底上方延伸的台面。台面在台面的第一侧和第二侧之间具有沟道区。第一栅极位于台面的第一侧上，第一栅极包括第一栅极绝缘体和覆盖第一栅极绝缘体的包括石墨烯的第一栅极导体。栅极导体可以包含一个或多个单层中的石墨烯。还公开了用于制造半导体器件结构的方法; 包括具有所公开结构的半导体器件的垂直晶体管器件阵列; 以及用于制造垂直晶体管器件阵列的方法。

35. 发明申请

WO2013015934A3 MEMORY CELLS AND METHODS OF STORING INFORMATION 审中-公开
标题翻译：记忆细胞和存储信息的方法
公开(公告)号：WO2013015934A3
公开(公告)日：2013-04-18
申请号：PCT/US2012044483
申请日：2012-06-27
申请人： MICRON TECHNOLOGY INC , SANDHU GURTEJ S , RAMASWAMY D V NIRMAL
发明人： SANDHU GURTEJ S , RAMASWAMY D V NIRMAL
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： H01L29/792 , G11C16/0416 , G11C16/3418 , H01L21/28273 , H01L29/788
摘要： Some embodiments include memory cells which have channel-supporting material, dielectric material over the channel-supporting material, carrier-trapping material over the dielectric material and an electrically conductive electrode material over and directly against the carrier-trapping material; where the carrier-trapping material includes gallium, indium, zinc and oxygen. Some embodiments include methods of storing information. A memory cell to is provided which has a channel-supporting material, a dielectric material over the channel-supporting material, a carrier-trapping material over the dielectric material, and an electrically conductive electrode material over and directly against the carrier-trapping material; where the carrier-trapping material includes gallium, indium, zinc and oxygen. It is determined if carriers are trapped in the carrier-trapping material to thereby ascertain a memory state of the memory cell.
摘要翻译：一些实施例包括具有通道支撑材料，在通道支撑材料上的电介质材料，介电材料上方的载流子捕获材料以及超过并直接抵靠载体捕获材料的导电电极材料的存储单元; 其中载流子捕获材料包括镓，铟，锌和氧。一些实施例包括存储信息的方法。提供一种存储单元，其具有通道支撑材料，在通道支撑材料上方的介电材料，介电材料上的载流子捕获材料，以及在载体捕获材料上方并直接抵靠载体捕获材料的导电电极材料; 其中载流子捕获材料包括镓，铟，锌和氧。确定载体是否被捕获在载流子捕获材料中，从而确定存储单元的存储状态。

36. 发明申请

WO2012036733A3 SPIN TORQUE TRANSFER MEMORY CELL STRUCTURES AND METHODS 审中-公开
标题翻译：旋转转矩记忆细胞结构和方法
公开(公告)号：WO2012036733A3
公开(公告)日：2012-06-07
申请号：PCT/US2011001584
申请日：2011-09-13
申请人： MICRON TECHNOLOGY INC , KRAMER STEPHEN J , SANDHU GURTEJ S
发明人： KRAMER STEPHEN J , SANDHU GURTEJ S
IPC分类号： G11C11/16
CPC分类号： H01L27/228 , G11C11/161 , G11C11/1675 , G11C11/5607 , H01L43/08
摘要： Spin Torque Transfer (STT) memory cell structures and methods are described herein. One or more STT memory cell structures comprise a STT stack including: a pinned ferromagnetic material in contact with an antiferromagnetic material; a tunneling barrier material positioned between a ferromagnetic storage material and the pinned ferromagnetic material; a multiferroic material in contact with the ferromagnetic storage material; and a first electrode and a second electrode, wherein the antiferromagnetic material, the pinned ferromagnetic material, and the ferromagnetic storage material are located between the first electrode and the second electrode. The STT memory cell structure can include a third electrode and a fourth electrode, wherein at least a first portion of the multiferroic material is located between the third and the fourth electrode.
摘要翻译：本文描述了旋转转矩传递（STT）存储单元结构和方法。一个或多个STT存储器单元结构包括STT堆叠，其包括：与反铁磁材料接触的钉扎铁磁材料; 位于铁磁存储材料和被钉扎的铁磁材料之间的隧道阻挡材料; 与铁磁存储材料接触的多铁性材料; 以及第一电极和第二电极，其中所述反铁磁材料，所述钉扎铁磁材料和所述铁磁存储材料位于所述第一电极和所述第二电极之间。 STT存储单元结构可以包括第三电极和第四电极，其中多铁性材料的至少第一部分位于第三和第四电极之间。

37. 发明申请

WO2011152858A3 OXIDE BASED MEMORY 审中-公开
标题翻译：基于氧化物的存储器
公开(公告)号：WO2011152858A3
公开(公告)日：2012-04-05
申请号：PCT/US2011000971
申请日：2011-05-27
申请人： MICRON TECHNOLOGY INC , RAMASWAMY D V NIRMAL , SANDHU GURTEJ S
发明人： RAMASWAMY D V NIRMAL , SANDHU GURTEJ S
IPC分类号： H01L21/8247 , H01L27/115
CPC分类号： G11C13/0007 , G11C2213/55 , G11C2213/56 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1616
摘要： Methods, devices, and systems associated with oxide based memory are described herein. In one or more embodiments, a method of forming an oxide based memory cell includes forming a first electrode, forming a tunnel barrier, wherein a first portion of the tunnel barrier includes a first material and a second portion of the tunnel barrier includes a second material, forming an oxygen source, and forming a second electrode.
摘要翻译：本文描述了与基于氧化物的存储器相关联的方法，设备和系统。在一个或多个实施例中，形成基于氧化物的存储单元的方法包括形成第一电极，形成隧道势垒，其中隧道势垒的第一部分包括第一材料，隧道势垒的第二部分包括第二材料，形成氧源，形成第二电极。

38. 发明申请

WO2012005851A2 ELECTRICALLY CONDUCTIVE LAMINATE STRUCTURES, ELECTRICAL INTERCONNECTS, AND METHOD OF FORMING ELECTRICAL INTERCONNECTS 审中-公开
标题翻译：导电层压结构，电互连和形成电互连的方法
公开(公告)号：WO2012005851A2
公开(公告)日：2012-01-12
申请号：PCT/US2011039465
申请日：2011-06-07
申请人： MICRON TECHNOLOGY INC , SANDHU GURTEJ S
发明人： SANDHU GURTEJ S
IPC分类号： H01L21/28
CPC分类号： H01L23/53276 , H01L21/76805 , H01L21/76843 , H01L21/76847 , H01L21/76865 , H01L21/76877 , H01L23/53209 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Some embodiments include electrical interconnects. The interconnects may contain laminate structures having a graphene region sandwiched between non-graphene regions. In some embodiments the graphene and non-graphene regions may be nested within one another. In some embodiments an electrically insulative material may be over an upper surface of the laminate structure, and an opening may extend through the insulative material to a portion of the laminate structure. Electrically conductive material may be within the opening and in electrical contact with at least one of the non-graphene regions of the laminate structure. Some embodiments include methods of forming electrical interconnects in which non-graphene material and graphene are alternately formed within a trench to form nested non-graphene and graphene regions.
摘要翻译：一些实施例包括电互连。互连可以包含具有夹在非石墨烯区域之间的石墨烯区域的层压结构。在一些实施例中，石墨烯区域和非石墨烯区域可以彼此嵌套。在一些实施例中，电绝缘材料可以位于层压结构的上表面之上，并且开口可以穿过绝缘材料延伸至层压结构的一部分。导电材料可以位于开口内并且与层压结构的至少一个非石墨烯区域电接触。一些实施例包括形成电互连的方法，其中非石墨烯材料和石墨烯交替地形成在沟槽内以形成嵌套的非石墨烯和石墨烯区域。

39. 发明申请

WO2011100108A3 MEMCAPACITOR DEVICES, FIELD EFFECT TRANSISTOR DEVICES, NON-VOLATILE MEMORY ARRAYS, AND METHODS OF PROGRAMMING 审中-公开
标题翻译： MEMACAPACITOR器件，场效应晶体管器件，非易失性存储器阵列和编程方法
公开(公告)号：WO2011100108A3
公开(公告)日：2011-11-24
申请号：PCT/US2011022390
申请日：2011-01-25
申请人： MICRON TECHNOLOGY INC , MEADE ROY E , SANDHU GURTEJ S
发明人： MEADE ROY E , SANDHU GURTEJ S
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： H01L29/7841 , G11C11/565 , G11C13/0002 , G11C13/0007 , G11C13/0069 , G11C2213/51 , G11C2213/53 , G11C2213/77 , H01L21/28273 , H01L21/28282 , H01L27/0629 , H01L28/40 , H01L29/792
摘要： A memcapacitor device includes a pair of opposing conductive electrodes. A semiconductive material including mobile dopants within a dielectric and a mobile dopant barrier dielectric material are received between the pair of opposing conductive electrodes. The semiconductive material and the barrier dielectric material are of different composition relative one another which is at least characterized by at least one different atomic element. One of the semiconductive material and the barrier dielectric material is closer to one of the pair of electrodes than is the other of the semiconductive material and the barrier dielectric material. The other of the semiconductive material and the barrier dielectric material is closer to the other of the pair of electrodes than is the one of the semiconductive material and the barrier dielectric material. Other implementations are disclosed, including field effect transistors, memory arrays, and methods.
摘要翻译：忆阻器装置包括一对相对的导电电极。包括电介质内的移动掺杂剂和移动掺杂剂阻挡电介质材料的半导体材料被接收在所述一对相对的导电电极之间。半导体材料和势垒电介质材料彼此具有不同的组成，其至少由至少一种不同的原子元素表征。半导体材料和势垒电介质材料中的一个比半导电材料和势垒电介质材料中的另一个更靠近电极对中的一个。另一个半导体材料和势垒电介质材料比半导体材料和势垒电介质材料中的另一个更靠近该对电极中的另一个。公开了其他实现方式，包括场效应晶体管，存储器阵列和方法。

40. 发明申请

WO2011037703A3 METHODS OF READING AND USING MEMORY CELLS 审中-公开
标题翻译：阅读和使用记忆细胞的方法
公开(公告)号：WO2011037703A3
公开(公告)日：2011-06-09
申请号：PCT/US2010045856
申请日：2010-08-18
申请人： MICRON TECHNOLOGY INC , SRINIVASAN BHASKAR , SANDHU GURTEJ S
发明人： SRINIVASAN BHASKAR , SANDHU GURTEJ S
IPC分类号： G11C16/26 , G11C16/10 , G11C16/32
CPC分类号： G11C13/004 , G11C13/0002 , G11C13/0007 , G11C13/0061 , G11C2013/0052 , G11C2213/72
摘要： Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is applied for a sufficient duration of time; and the reading is conducted with a pulse that is of too short of a time duration to be sufficient for the write operation. In some embodiments, the pulse utilized for the reading may have an absolute value of voltage that is greater than or equal to the voltage utilized for the write operation. In some embodiments, the memory cells may comprise non-ohmic devices; such as memristors and diodes.
摘要翻译：一些实施例包括读取存储器单元的方法。存储器单元具有写入操作，该写入操作仅在施加足够绝对值的电压持续足够的持续时间时发生; 并且读取过程的持续时间太短而不足以进行写入操作。在一些实施例中，用于读取的脉冲可具有大于或等于用于写入操作的电压的绝对值。在一些实施例中，存储器单元可以包括非欧姆器件; 如忆阻器和二极管。

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