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1. 发明申请

WO2006081286A8 MULTI-LAYER POLISHING PAD FOR LOW-PRESSURE POLISHING 审中-公开
标题翻译：用于低压抛光的多层抛光垫
公开(公告)号：WO2006081286A8
公开(公告)日：2007-08-30
申请号：PCT/US2006002599
申请日：2006-01-24
申请人： APPLIED MATERIALS INC , DUBOUST ALAIN , CHANG SHOU-SUNG , LU WEI , NEO SIEW , WANG YAN , MANENS ANTOINE , MOON YONGSIK
发明人： DUBOUST ALAIN , CHANG SHOU-SUNG , LU WEI , NEO SIEW , WANG YAN , MANENS ANTOINE , MOON YONGSIK
IPC分类号： B24B7/00 , B24B1/00 , B24B7/04 , B24B7/22 , B24B37/013 , B24B37/04 , B24B37/20 , B24B37/22 , B24B37/26 , B24D11/02 , B24D99/00
CPC分类号： B24B37/013 , B24B37/046 , B24B37/205 , B24B37/22 , B24B37/26 , B24D11/02
摘要： A polishing pad has a polishing layer and a backing layer secured to the polishing layer. The polishing layer has a polishing surface, a first thickness, a first compressibility, and a hardness between about 40 to 80 Shore D. The backing layer has a second thickness equal to or less than the first thickness and has a second compressibility greater than the first compressibility. The first thickness, first compressibility, second thickness and second compressibility are such that the polishing surface deflects more than the thickness non-uniformity of the polishing layer under an applied pressure of 1.5 psi or less.
摘要翻译：抛光垫具有固定到抛光层的抛光层和背衬层。抛光层具有抛光表面，第一厚度，第一可压缩性和约40至80肖氏硬度之间的硬度。背衬层具有等于或小于第一厚度的第二厚度，并且具有大于第二厚度的第二压缩率第一压缩性。第一厚度，第一可压缩性，第二厚度和第二可压缩性使得抛光表面在1.5psi或更小的施加压力下偏转超过抛光层的厚度不均匀性。

2. 发明申请

WO2006081286A3 MULTI-LAYER POLISHING PAD FOR LOW-PRESSURE POLISHING 审中-公开
标题翻译：多层抛光垫用于低压抛光
公开(公告)号：WO2006081286A3
公开(公告)日：2006-12-14
申请号：PCT/US2006002599
申请日：2006-01-24
申请人： APPLIED MATERIALS INC , MANENS ANTOINE , DUBOUST ALAIN , CHANG SHOU-SUNG , LU WEI , NEO SIWE , WANG YAN , MOON YOUNGSIK
发明人： DUBOUST ALAIN , CHANG SHOU-SUNG , LU WEI , NEO SIWE , WANG YAN , MOON YOUNGSIK
IPC分类号： B24B7/00 , B24B1/00 , B24B7/04 , B24B7/22 , B24B37/013 , B24B37/04 , B24B37/20 , B24B37/22 , B24B37/26 , B24D11/02 , B24D99/00
CPC分类号： B24B37/013 , B24B37/046 , B24B37/205 , B24B37/22 , B24B37/26 , B24D11/02
摘要： A polishing pad has a polishing layer and a backing layer secured to the polishing layer. The polishing layer has a polishing surface, a first thickness, a first compressibility, and a hardness between about 40 to 80 Shore D. The backing layer has a second thickness equal to or less than the first thickness and has a second compressibility greater than the first compressibility. The first thickness, first compressibility, second thickness and second compressibility are such that the polishing surface deflects more than the thickness non-uniformity of the polishing layer under an applied pressure of 1.5 psi or less.
摘要翻译：抛光垫具有抛光层和固定在抛光层上的背衬层。抛光层具有抛光表面，第一厚度，第一可压缩性以及约40至80肖氏D硬度。背衬层具有等于或小于第一厚度的第二厚度并具有大于第一厚度的第二可压缩性第一可压缩性。第一厚度，第一可压缩性，第二厚度和第二可压缩性使得抛光表面在1.5psi或更小的施加压力下偏转大于抛光层的厚度不均匀性。

3. 发明申请

WO2008021265A3 SEMICONDUCTOR SUBSTRATE CLEANING APPARATUS 审中-公开
标题翻译：半导体基板清洗装置
公开(公告)号：WO2008021265A3
公开(公告)日：2008-10-23
申请号：PCT/US2007017837
申请日：2007-08-10
申请人： APPLIED MATERIALS INC , TANG JIANSHE , LU WEI , XIE BO , LI FRED , KO ALEX
发明人： TANG JIANSHE , LU WEI , XIE BO , LI FRED , KO ALEX
IPC分类号： B08B3/02
CPC分类号： B08B3/04 , B08B3/02 , H01L21/67028
摘要： A semiconductor substrate (78) processing apparatus and a method for processing semiconductor substrates (78) are provided. The semiconductor substrate (78) processing apparatus may include a liquid container (62) where a semiconductor substrate (78) may be immersed in a semiconductor processing liquid (64). The semiconductor substrate may then be removed from the semiconductor processing liquid while vapor (76) is directed at a surface of the semiconductor substrate (78)where the semiconductor substrate contacts a surface of the processing liquid (64).
摘要翻译：提供半导体基板（78）处理装置和半导体基板（78）的处理方法。半导体基板（78）处理装置可以包括其中可以将半导体基板（78）浸入半导体处理液体（64）中的液体容器（62）。然后可以从半导体处理液体中去除半导体衬底，同时蒸汽（76）指向半导体衬底（78）的半导体衬底与处理液体（64）的表面接触的表面。

4. 发明申请

WO2007111976A3 METHODS AND APPARATUS FOR CLEANING A SUBSTRATE 审中-公开
标题翻译：清洗基板的方法和装置
公开(公告)号：WO2007111976A3
公开(公告)日：2008-10-02
申请号：PCT/US2007007199
申请日：2007-03-23
申请人： APPLIED MATERIALS INC
发明人： LU WEI , TANG JIANSHE , KO ALEXANDER SOU-KANG , YEE NELSON A , XIE BO , LEE JOHN TSENG-CHUNG , ENDO RICK R
IPC分类号： B08B3/00
CPC分类号： H01L21/67051 , B08B3/024 , H01L21/6704
摘要： The present invention provides methods, apparatus, and systems for cleaning a substrate that include a controller and a nozzle coupled to the controller. The controller is adapted to direct the nozzle to dispense a uniform fluid spray pattern onto a substrate . The controller is adapted create the uniform fluid spray pattern by adjusting at least one operational parameter of the nozzle to cause a predefined percentage of droplets to be within a predetermined size range. Numerous other aspects are disclosed.
摘要翻译：本发明提供了用于清洁衬底的方法，装置和系统，其包括控制器和连接到控制器的喷嘴。控制器适于引导喷嘴将均匀的流体喷雾图案分配到基底上。通过调整喷嘴的至少一个操作参数来使控制器适应于产生均匀的流体喷射图案，以使预定百分比的液滴在预定的尺寸范围内。公开了许多其他方面。

5. 发明申请

WO2012166935A3 SWITCHING DEVICE HAVING A NON-LINEAR ELEMENT 审中-公开
标题翻译：具有非线性元件的开关器件
公开(公告)号：WO2012166935A3
公开(公告)日：2013-04-25
申请号：PCT/US2012040232
申请日：2012-05-31
申请人： CROSSBAR INC , LU WEI , JO SUNG HYUN
发明人： LU WEI , JO SUNG HYUN
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： H01L27/2409 , H01L27/101 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/148
摘要： A switching device includes a substrate; a first electrode formed over the substrate; a second electrode formed over the first electrode; a switching medium disposed between the first and second electrode; and a nonlinear element disposed between the first and second electrodes and electrically coupled in series to the first electrode and the switching medium. The nonlinear element is configured to change from a first resistance state to a second resistance state on application of a voltage greater than a threshold.
摘要翻译：开关装置包括：基板; 形成在所述基板上的第一电极; 形成在所述第一电极上的第二电极; 布置在第一和第二电极之间的开关介质; 以及设置在第一和第二电极之间并且与第一电极和开关介质串联电耦合的非线性元件。非线性元件被配置为在施加大于阈值的电压时从第一电阻状态改变到第二电阻状态。

6. 发明申请

WO2011157132A3 SERVICE INFORMATION TRANSMISSION METHOD, DEVICE AND SYSTEM 审中-公开
标题翻译：服务信息传输方法，设备和系统
公开(公告)号：WO2011157132A3
公开(公告)日：2012-05-03
申请号：PCT/CN2011075005
申请日：2011-05-31
申请人： HUAWEI TECH CO LTD , LU WEI , YIN YU
发明人： LU WEI , YIN YU
IPC分类号： H04W4/06
CPC分类号： H04W4/00 , H04W4/001
摘要： Embodiments of the present invention provide a service information transmission method. The method includes: receiving a service notification message from a service platform; if a terminal is in an idle state, then, after the terminal is switched to a connection state, notifying said terminal to obtain service information or notifying said service platform to transmit the service information to said terminal. The Embodiments of the present invention also provide a service information transmission device and system, which avoid the transmitted service notification message from always triggering the procedure of paging the terminal, and reduce the signaling load in communication networks.
摘要翻译：本发明的实施例提供一种服务信息传输方法。该方法包括：从服务平台接收服务通知消息; 如果终端处于空闲状态，则在终端切换到连接状态之后，通知所述终端获取服务信息，或者通知所述服务平台向所述终端发送所述服务信息。本发明的实施例还提供了一种服务信息传输设备和系统，其避免所传输的服务通知消息始终触发终端寻呼的过程，并减少通信网络中的信令负载。

7. 发明申请

WO2008049853A3 METHODS, APPARATUSES AND COMPUTER PROGRAM FOR IMPROVING SIP PARSE PERFORMANCE 审中-公开
标题翻译：方法，设备和计算机程序，用于改进SIP PARSE性能
公开(公告)号：WO2008049853A3
公开(公告)日：2008-06-12
申请号：PCT/EP2007061403
申请日：2007-10-24
申请人： IBM , IBM UK , LIANG ZHI YONG , LU WEI , SABHIKHI RAVINDER KUMAR , SHAO LING , YANG BO , ZHAO YI XIN
发明人： LIANG ZHI YONG , LU WEI , SABHIKHI RAVINDER KUMAR , SHAO LING , YANG BO , ZHAO YI XIN
IPC分类号： H04L29/06
CPC分类号： H04L29/06027 , H04L65/1006 , H04L67/1002 , H04L67/1008 , H04L67/1029 , H04L69/12 , H04L69/22
摘要： The present invention discloses a method and an apparatus for improving SIP parse performance. The method comprising the steps of: receiving a text-based SIP message to be sent to a SIP server; according to a SIP message filter table, determining whether the text- based SIP message needs to be transformed to a token-based message; and in the case that the text-based SIP message needs to be transformed to a token-based message, performing the transformation and sending the transformed token-based message to said SIP server, otherwise directly sending the text-based SIP message to said SIP server. According to the present invention, larger SIP message throughput in a SIP server and better utilization of resources of a front end device can be achieved.
摘要翻译：本发明公开了一种改进SIP解析性能的方法和装置。该方法包括以下步骤：接收要发送到SIP服务器的基于文本的SIP消息; 根据SIP消息过滤表，确定基于文本的SIP消息是否需要被转换为基于令牌的消息; 并且在基于文本的SIP消息需要被转换为基于令牌的消息的情况下，执行变换并将所变换的基于令牌的消息发送到所述SIP服务器，否则直接将基于文本的SIP消息发送到所述SIP 服务器。根据本发明，可以实现SIP服务器中更大的SIP消息吞吐量以及更好地利用前端设备的资源。

8. 发明申请

WO2009134291A3 NANOSCALE WIRE-BASED MEMORY DEVICES 审中-公开
标题翻译：基于纳米电路的存储器件
公开(公告)号：WO2009134291A3
公开(公告)日：2010-09-10
申请号：PCT/US2009000337
申请日：2009-01-21
申请人： HARVARD COLLEGE , LIEBER CHARLES M , DONG YAJIE , LU WEI , YU GUIHUA , MCALPINE MICHAEL
发明人： LIEBER CHARLES M , DONG YAJIE , LU WEI , YU GUIHUA , MCALPINE MICHAEL
IPC分类号： H01L27/10 , H01L29/06 , H01L29/16
CPC分类号： H01L29/0665 , B82Y10/00 , G11C13/0002 , G11C13/0069 , G11C2213/77 , G11C2213/81 , H01L27/10 , H01L27/101 , H01L29/0673 , H01L29/16 , H01L29/1602 , H01L29/1604 , H01L2924/0002 , H01L2924/00
摘要： The present invention generally relates to nanotechnology and sub- microelectronic devices that can be used in circuitry and, in particular, to nanoscale wires and other nanostructures able to encode data. One aspect of the present invention is directed to a device comprising an electrical crossbar array comprising at least two crossed wires at a cross point. In some cases, at least one of the crossed wires is a nanoscale wire, and in certain instances, at least one of the crossed wires is a nanoscale wire comprising a core and at least one shell surrounding the core. For instance, the core may comprise a crystal (e.g., crystalline silicon) and the shell may be at least partially amorphous (e.g., amorphous silicon). In certain embodiments, the cross point may exhibit intrinsic current rectification, or other electrical behaviors, and the cross point can be used as a memory device. For example, in one embodiment, the cross point may exhibit a first conductance at a positive voltage, and the cross point may exhibit a second conductance at a negative voltage. Accordingly, by applying suitable voltages to the cross point, data may be stored at the cross point. Other aspects of the present invention are directed to systems and methods for making or using such devices, kits involving such devices, or the like.
摘要翻译：本发明一般涉及可用于电路中的纳米技术和亚微电子器件，特别涉及能够对数据进行编码的纳米线和其他纳米结构。本发明的一个方面涉及一种装置，其包括在交叉点处包括至少两根交叉线的电横排阵列。在一些情况下，交叉导线中的至少一个是纳米线，并且在某些情况下，交叉导线中的至少一个是纳米线，其包括芯和围绕芯的至少一个壳。例如，芯可以包括晶体（例如，晶体硅），并且壳可以是至少部分无定形的（例如非晶硅）。在某些实施例中，交叉点可以表现出固有的电流整流或其他电气行为，并且交叉点可以用作存储器件。例如，在一个实施例中，交叉点可以在正电压下呈现第一电导，并且交叉点可以在负电压下显示第二电导。因此，通过向交叉点施加合适的电压，可以在交叉点存储数据。本发明的其他方面涉及用于制造或使用这种装置的系统和方法，涉及这种装置的套件等。

9. 发明申请

WO2010048127A2 A SILICON BASED NANOSCALE CROSSBAR MEMORY 审中-公开
标题翻译：一种基于硅的纳米级间隙存储器
公开(公告)号：WO2010048127A2
公开(公告)日：2010-04-29
申请号：PCT/US2009061249
申请日：2009-10-20
申请人： UNIV MICHIGAN , LU WEI , JO SUNG HYUN , KIM KUK-HWAN
发明人： LU WEI , JO SUNG HYUN , KIM KUK-HWAN
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： H01L45/1253 , B82Y10/00 , B82Y30/00 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2013/005 , G11C2013/0071 , G11C2213/11 , G11C2213/33 , G11C2213/77 , G11C2213/81 , H01L27/2409 , H01L27/2463 , H01L27/2472 , H01L45/085 , H01L45/122 , H01L45/1233 , H01L45/1266 , H01L45/148 , H01L45/1608 , H01L45/1675
摘要： The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials.
摘要翻译：本申请描述了一种交叉存储器阵列。存储器阵列包括第一材料的第一平行纳米线阵列和第二材料的第二平行纳米线阵列。第一和第二阵列彼此成一定角度取向。该阵列进一步包括在两个阵列的每个相交处设置在第一材料的纳米线与第二材料的纳米线之间的多个非晶硅纳米结构。纳米结构与第一和第二材料的纳米线一起形成电阻性存储单元。

10. 发明申请

WO2006132659A3 NANOWIRE HETEROSTRUCTURES 审中-公开
公开(公告)号：WO2006132659A3
公开(公告)日：2007-07-05
申请号：PCT/US2005034345
申请日：2005-09-21
申请人： HARVARD COLLEGE , LU WEI , XIANG JIE , TIMKO BRIAN P , WU YUE , YAN HAO , LIEBER CHARLES M
发明人： LU WEI , XIANG JIE , TIMKO BRIAN P , WU YUE , YAN HAO , LIEBER CHARLES M
IPC分类号： H01L29/06
CPC分类号： B82Y10/00 , G11C2213/17 , G11C2213/18 , H01L29/0665 , H01L29/0673 , H01L29/068 , H01L29/1606 , H01L29/165
摘要： The present invention generally relates to nanoscale heterostructures and, in some cases, to nanowire heterostructures exhibiting ballistic transport, and/or to metal-semiconductor junctions that that exhibit no or reduced Schottky barriers. One aspect of the invention provides a solid nanowire having a core and a shell, both of which are essentially undoped. For example, in one embodiment, the core may consist essentially of undoped germanium and the shell may consist essentially of undoped silicon. Carriers are injected into the nanowire, which can be ballistically transported through the nanowire. In other embodiments, however, the invention is not limited to solid nanowires, and other configurations, involving other nanoscale wires, are also contemplated within the scope of the present invention. Yet another aspect of the invention provides a junction between a metal and a nanoscale wire that exhibit no or reduced Schottky barriers. As a non-limiting example, a nanoscale wire having a core and a shell may be in physical contact with a metal electrode, such that the Schottky barrier to the core is reduced or eliminated. Still other aspects of the invention are directed to electronic devices exhibiting such properties, and techniques for methods of making or using such devices.
摘要翻译：本发明一般涉及纳米尺度异质结构，在某些情况下涉及显示弹道输运的纳米线异质结构，和/或涉及没有或减少的肖特基势垒的金属 - 半导体结。本发明的一个方面提供了具有核和壳的固体纳米线，两者都基本上是未掺杂的。例如，在一个实施例中，芯可以基本上由未掺杂的锗组成，并且壳可以基本上由未掺杂的硅组成。载体被注入纳米线，可以通过纳米线进行弹道传输。然而，在其它实施方案中，本发明不限于固体纳米线，并且涉及其它纳米级线的其它构型也在本发明的范围内。本发明的另一方面提供了金属和纳米尺寸线之间的连接处，其不显示或减小肖特基势垒。作为非限制性实例，具有芯和壳的纳米线可以与金属电极物理接触，使得芯的肖特基势垒被减少或消除。本发明的其它方面涉及具有这种性质的电子设备，以及制造或使用这些设备的方法的技术。

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