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1. 发明授权

US4448487A Photon energy conversion 失效
标题翻译：光子能量转换
公开(公告)号：US4448487A
公开(公告)日：1984-05-15
申请号：US43398
申请日：1979-05-29
申请人： Jerome J. Cuomo , Thomas H. DiStefano , Jerry M. Woodall
发明人： Jerome J. Cuomo , Thomas H. DiStefano , Jerry M. Woodall
IPC分类号： F24J2/48 , G02B1/10
CPC分类号： F24J2/487 , Y02E10/40 , Y10S126/908
摘要： Photon energy can be efficiently absorbed by a material having a reflectivity control surface region wherein the index of refraction, the thickness, and the contour of the external surface of the reflecting control surface region operate to curtail all reradiation components.
摘要翻译：可以通过具有反射控制表面区域的材料有效地吸收光子能量，其中反射控制表面区域的外表面的折射率，厚度和轮廓操作以限制所有再辐射分量。

2. 发明授权

US4132571A Growth of polycrystalline semiconductor film with intermetallic nucleating layer 失效
标题翻译：具有金属间成核层的多晶半导体膜的生长
公开(公告)号：US4132571A
公开(公告)日：1979-01-02
申请号：US765497
申请日：1977-02-03
申请人： Jerome J. Cuomo , Thomas H. DiStefano , Robert Rosenberg
发明人： Jerome J. Cuomo , Thomas H. DiStefano , Robert Rosenberg
IPC分类号： C23C14/02 , C23C16/00 , C30B11/12 , C30B23/02 , C30B25/02 , C30B25/18 , B01J17/26
CPC分类号： C30B29/06 , C23C14/02 , C23C16/003 , C30B11/12 , C30B23/02 , C30B25/18 , Y10S148/061 , Y10S148/154
摘要： A method is disclosed for fabricating a thin elemental semiconductor, e.g., Si or Ge, film with columnar grains in a filamentary structure, by the use of an intermetallic compound incorporating the elemental semiconductor to form a nucleating layer for the growth of the semiconducting film. The semiconductor is grown from vapor phase by the technique of either vacuum evaporation or chemical vapor deposition, e.g., by decomposition of SiH.sub.4. The semiconductor e.g., Si, is initially deposited onto a thin film of a specific metal, e.g., Pt or Ni, on any inert substrate, e.g., SiO.sub.2 or Al.sub.2 O.sub.3, which is held at a temperature, e.g., 900.degree. C, above the eutectic point, i.e., 830.degree. C, of an intermetallic compound and the metallic film, and below the eutectic point, i.e., 979.degree. C, of another intermetallic compound and the semiconductor.Deposition of the semiconductor onto the metallic film produces a layer of liquid comprising the semiconductor and metal, which increases in thickness until the metallic layer is completely consumed. Additional deposition of the semiconductor produces a supersaturated liquid from which large crystallites of the intermetallic precipitate. With increasing deposition of semiconductor, the crystallites of intermetallic material continue to grow until they consume all of the metal in the liquid, at which point no liquid remains. Continuing deposition of semiconductor material results in the growth of filamentary crystallites of the semiconductor out of the intermetallic surface. The result is a columnar film of the semiconductor with a filamentary structure originating from the crystallites of intermetallic nucleating material.
摘要翻译：公开了通过使用掺入元素半导体的金属间化合物形成用于半导体膜的生长的成核层来制造薄元素半导体的方法，例如具有丝状结构的柱状晶粒的Si或Ge薄膜。通过真空蒸发或化学气相沉积的技术，例如通过SiH 4的分解，从气相生长半导体。半导体例如Si最初沉积在特定金属（例如Pt或Ni）的薄膜上，任何惰性基底上，例如SiO 2或Al 2 O 3，其保持在例如900℃以上的温度共晶点，即830℃的金属间化合物和金属膜，低于另一种金属间化合物和半导体的共晶点，即979℃。

3. 发明授权

US4155785A Process of making a radiation responsive device 失效
标题翻译：制造辐射响应装置的过程
公开(公告)号：US4155785A
公开(公告)日：1979-05-22
申请号：US856941
申请日：1977-12-02
申请人： Jerome J. Cuomo , Thomas H. DiStefano , Robert Rosenberg
发明人： Jerome J. Cuomo , Thomas H. DiStefano , Robert Rosenberg
IPC分类号： H01L31/04 , H01L31/0368 , H01L31/068 , H01L31/07 , H01L21/22
CPC分类号： H01L31/0368 , H01L31/03682 , H01L31/068 , H01L31/07 , Y02E10/546 , Y02E10/547 , Y10S148/128 , Y10S438/922
摘要： The practice of this disclosure obtains a relatively high efficiency operation for a crystalline semiconductor solar cell containing various defects of the linear and planar types. Linear defects include screw dislocations as well as full and partial dislocations. Planar defects include twins, stacking faults, grain boundaries and surfaces. Such defects normally contain recombination centers at which electrons and holes generated in the semiconductor region recombine with loss to the external current of the charge carried thereby. Through application of the principles of this invention, especial dopant concentrations and conductivity regions are established in a finite region around the linear and planar defects so that electrons and holes which are generated in the semiconductor region by incident radiation are substantially collected for external current as consequence thereof.
摘要翻译：本公开的实践获得了包含线性和平面类型的各种缺陷的晶体半导体太阳能电池的相对高效率的操作。线性缺陷包括螺旋位错以及全部和部分位错。平面缺陷包括双胞胎，堆垛层错，晶界和表面。这样的缺陷通常包含复合中心，在半导体区域中产生的电子和空穴与由此携带的电荷的外部电流的损耗重新组合。通过应用本发明的原理，在围绕线性和平面缺陷的有限区域内建立了特殊的掺杂剂浓度和导电性区域，使得通过入射辐射在半导体区域中产生的电子和空穴基本上被收集用于外部电流其中。

4. 发明授权

US07271481B2 Microelectronic component and assembly having leads with offset portions 失效
标题翻译：具有偏移部分的引线的微电子部件和组件
公开(公告)号：US07271481B2
公开(公告)日：2007-09-18
申请号：US11441976
申请日：2006-05-26
申请人： Igor Y. Khandros , Thomas H. DiStefano
发明人： Igor Y. Khandros , Thomas H. DiStefano
IPC分类号： H01L23/48 , H01L23/04
CPC分类号： H01L22/32 , H01L21/6836 , H01L21/822 , H01L23/13 , H01L23/3107 , H01L23/3164 , H01L23/485 , H01L23/49805 , H01L23/49827 , H01L23/49838 , H01L23/4985 , H01L23/49861 , H01L24/27 , H01L24/48 , H01L24/81 , H01L25/16 , H01L25/50 , H01L2221/68327 , H01L2224/05599 , H01L2224/16145 , H01L2224/274 , H01L2224/45099 , H01L2224/48091 , H01L2224/81801 , H01L2224/8547 , H01L2225/0651 , H01L2225/06517 , H01L2225/0652 , H01L2225/06579 , H01L2225/06596 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/351 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A microelectronic component comprising a dielectric layer having an opening and leads extending across the opening is disclosed. The leads have an offset portion. A method of making a microelectronic assembly comprises connecting each of the leads to a contact on a microelectronic element. A semiconductor chip assembly has a microelectronic component with an opening and leads extending across the opening. The leads are connected to contacts on a semiconductor chip and have at least one twisted portion.
摘要翻译：公开了一种微电子部件，其包括具有开口的介电层和延伸穿过开口的引线。导线具有偏移部分。制造微电子组件的方法包括将每个引线连接到微电子元件上的触点。半导体芯片组件具有具有开口的微电子部件，并且穿过开口延伸引线。引线连接到半导体芯片上的触点，并具有至少一个扭绞部分。

5. 发明授权

US07152311B2 Enhancements in framed sheet processing 失效
公开(公告)号：US07152311B2
公开(公告)日：2006-12-26
申请号：US10032886
申请日：2001-12-26
申请人： Masud Beroz , Thomas H. DiStefano , Matthew T. Hendrickson , David Light , John W. Smith
发明人： Masud Beroz , Thomas H. DiStefano , Matthew T. Hendrickson , David Light , John W. Smith
IPC分类号： B23P19/04
CPC分类号： H01L24/86 , B29C2043/5825 , H01L21/67144 , H01L2224/7965 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12042 , H01L2924/30105 , Y10S269/909 , Y10T29/53265 , Y10T29/53435 , Y10T428/23 , Y10T428/239 , H01L2924/00
摘要： A flexible sheet used in manufacture of microelectronic components is held on a frame formed from a rigid material so that the frame maintains the sheet under tension during processing and thereby stabilizes the dimensions of the sheet. The frame may be formed from a rigid, light-transmissive material such as a glass, and the bond between the frame and sheet may be made or released by light transmitted through the frame. Preferred features of the framed sheet minimize entrapment of processing liquids such as etch solutions, thereby minimizing carryover of processing solutions between steps. The frame may have contact openings which permit engagement of a metallic layer on the sheet by an electrode carrying electroplating or etching current without disturbing the main portion of the sheet where features are to be formed or treated.

6. 发明授权

US06978538B2 Method for making a microelectronic interposer 失效
标题翻译：制造微电子插入器的方法
公开(公告)号：US06978538B2
公开(公告)日：2005-12-27
申请号：US10658941
申请日：2003-09-10
申请人： Thomas H. DiStefano , Joseph Fjelstad
发明人： Thomas H. DiStefano , Joseph Fjelstad
IPC分类号： H01L23/498 , H01L23/538 , H01R12/51 , H05K1/03 , H05K1/11 , H05K3/46 , H05K3/36
CPC分类号： H05K3/462 , H01L23/49827 , H01L23/5385 , H01L2924/0002 , H01R12/523 , H01R12/714 , H01R13/2414 , H01R43/0256 , H05K1/0272 , H05K1/036 , H05K1/056 , H05K1/116 , H05K3/0032 , H05K3/326 , H05K3/4623 , H05K3/4641 , H05K2201/0195 , H05K2201/0382 , H05K2201/0397 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/09827 , H05K2201/10378 , H05K2203/0554 , H05K2203/0582 , H05K2203/135 , H05K2203/308 , Y10T29/49126 , Y10T29/49133 , Y10T29/49137 , Y10T29/49139 , Y10T29/49155 , Y10T29/49165 , Y10T156/1744 , H01L2924/00
摘要： A microelectronic interposer is made by providing a sacrificial layer over the surface of a planar body. Apertures are formed passing through the body and the sacrificial layer. A layer of an electrically conductive structural material is deposited in each of the apertures and over the sacrificial layer, proximate to each aperture to thereby form contacts. The sacrificial layer is removed leaving the contacts with outwardly flaring peripheral portions spaced vertically above the surface of the planar body.
摘要翻译：通过在平面体的表面上设置牺牲层来制造微电子插入器。形成穿过身体和牺牲层的孔。一层导电结构材料沉积在每个孔中并在牺牲层上方，靠近每个孔，从而形成接触。去除牺牲层，留下接触件，其外部扩张的外围部分在平面体的表面上方垂直地间隔开。

7. 发明授权

US06897090B2 Method of making a compliant integrated circuit package 失效
标题翻译：制造兼容集成电路封装的方法
公开(公告)号：US06897090B2
公开(公告)日：2005-05-24
申请号：US10430986
申请日：2003-05-07
申请人： Thomas H. DiStefano , Konstantine Karavakis , Craig Mitchell , John W. Smith
发明人： Thomas H. DiStefano , Konstantine Karavakis , Craig Mitchell , John W. Smith
IPC分类号： H01L21/56 , H01L23/31 , H01L21/44
CPC分类号： H01L24/50 , H01L21/565 , H01L23/3121 , H01L2224/50 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01061 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , Y10T29/49146 , H01L2924/00 , H01L2924/00012
摘要： A component incorporating a dielectric element such as a polymeric film with leads and terminals thereon is assembled with a semiconductor chip and bond regions of the leads are connected to contacts of the chip. At least one lead incorporates a plural set of connecting regions connecting the bond region of that lead to a plurality of terminals. One or more of the connecting regions in each such plural set are severed so as to leave less than all of the terminals associated with each such plural set connected to the contacts of the chip.
摘要翻译：将包含诸如其上具有引线和端子的聚合物膜的电介质元件的部件与半导体芯片组装，并且引线的接合区域连接到芯片的触点。至少一个引线包括将该引线的键合区域连接到多个端子的多组连接区域。每个这样的多个组中的一个或多个连接区域被切断，以便留下少于与连接到芯片的触点的每个这样的多个组相关联的所有终端。

8. 发明授权

US06888229B2 Connection components with frangible leads and bus 失效
标题翻译：连接组件采用易碎导线和总线
公开(公告)号：US06888229B2
公开(公告)日：2005-05-03
申请号：US10872105
申请日：2004-06-18
申请人： Thomas H. DiStefano , Gary W. Grube , Igor Y. Khandros , Gaetan Mathieu , Jason Sweis , Laurie Union , David Gibson
发明人： Thomas H. DiStefano , Gary W. Grube , Igor Y. Khandros , Gaetan Mathieu , Jason Sweis , Laurie Union , David Gibson
IPC分类号： H01L21/60 , H01L23/31 , H01L23/495 , H01L23/498 , H05K3/36 , H05K3/40
CPC分类号： H01L24/86 , H01L23/3107 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/49861 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H05K3/361 , H05K3/4084 , H01L2924/00
摘要： A semiconductor chip mounting component includes a support structure adapted to engage a semiconductor chip. The support structure has a top surface, a bottom surface, and a gap extending through the support structure for defining first and second portions of the support structure on opposite sides of the gap. The support structure includes at least one elongated bus disposed alongside the gap, on the second portion of the support structure. The support structure includes a plurality of electrically conductive leads, each lead having a connection section extending across the gap, the connection section having a first end disposed on the first portion of the support structure, and a second end secured to the bus. Each lead includes a frangible section disposed between the first and second ends of the connection section, the frangible section having a cross-sectional area that is smaller than a cross-sectional area of the connection section. The gap is open at the bottom surface of the support structure. A semiconductor chip is disposed beneath the bottom surface of the support structure. The leads are adapted to be bonded to contacts on the semiconductor chip by breaking the frangible sections of the leads so as to disconnect the second ends of the leads from the bus and engage the leads with the contacts of the semiconductor chip.
摘要翻译：半导体芯片安装部件包括适于接合半导体芯片的支撑结构。支撑结构具有顶表面，底表面和延伸穿过支撑结构的间隙，用于限定支撑结构在间隙的相对侧上的第一和第二部分。支撑结构包括在支撑结构的第二部分上沿着间隙布置的至少一个细长总线。支撑结构包括多个导电引线，每个引线具有跨越间隙延伸的连接部分，连接部分具有设置在支撑结构的第一部分上的第一端和固定到总线的第二端。每个引线包括设置在连接部分的第一和第二端之间的易碎部分，该易碎部分的横截面积小于连接部分的横截面面积。间隙在支撑结构的底部表面开口。半导体芯片设置在支撑结构的底表面下方。引线适于通过断开引线的易碎部分而与半导体芯片上的触点接合，从而将引线的第二端与母线断开，并与半导体芯片的触点接合引线。

9. 发明授权

US06460245B1 Method of fabricating semiconductor chip assemblies 失效
公开(公告)号：US06460245B1
公开(公告)日：2002-10-08
申请号：US08987720
申请日：1997-12-09
申请人： Thomas H. DiStefano
发明人： Thomas H. DiStefano
IPC分类号： H05K334
CPC分类号： H01L21/568 , H01L21/565 , H01L21/6835 , H01L23/16 , H01L23/3107 , H01L23/3114 , H01L23/3121 , H01L23/3157 , H01L23/495 , H01L23/49572 , H01L23/4985 , H01L24/32 , H01L24/50 , H01L24/83 , H01L24/86 , H01L24/97 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/83191 , H01L2224/83855 , H01L2224/97 , H01L2924/00014 , H01L2924/01009 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01059 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , Y10T29/49004 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , Y10T29/49169 , Y10T29/49174 , Y10T29/49179 , Y10T29/49821 , H01L2224/83 , H01L2224/05599
摘要： A method of making a microelectronic package includes providing a first microelectronic element having electrically conductive parts and including first and second surfaces and providing a compliant element including a releasable adhesive over the first surface of the first microelectronic element. A second microelectronic element having electrically conductive parts is abutted against the releasable adhesive so that the second microelectronic element is releasably assembled to the first microelectronic element and the electrically conductive parts of the first and second microelectronic elements are connected to one another. The releasably assembled package is tested to determine whether the package has been properly assembled. A curable liquid is then introduced between the first and second microelectronic elements of a properly assembled package and the curable liquid is cured to permanently assemble the first and second microelectronic elements together.

10. 发明授权

US06370032B1 Compliant microelectronic mounting device 有权
标题翻译：符合微电子安装装置
公开(公告)号：US06370032B1
公开(公告)日：2002-04-09
申请号：US09399209
申请日：1999-09-17
申请人： Thomas H. DiStefano , John W. Smith , Zlata Kovac , Konstantine Karavakis
发明人： Thomas H. DiStefano , John W. Smith , Zlata Kovac , Konstantine Karavakis
IPC分类号： H05K118
CPC分类号： H01L24/81 , H01L21/4839 , H01L21/563 , H01L23/22 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/4985 , H01L23/642 , H01L24/72 , H01L2224/73203 , H01L2224/81801 , H01L2224/83136 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15174 , H01L2924/3025 , H05K1/118 , H05K3/361 , H05K3/4084 , H05K2201/0133 , H05K2201/0394 , H05K2201/0397 , H05K2201/09081 , H05K2201/091 , H05K2203/063 , Y10T29/49124 , Y10T29/49144 , Y10T29/49149
摘要： The present invention provides an interconnection scheme having complaint contacts arranged in an array to connect conductive surfaces on a microelectronic device and a supporting substrate, such as a printed circuit board. This invention accommodates for the difference in thermal coefficients of expansion between the device and the supporting substrate. Typically, an area array of conductive contact pads are connected into rows by conductive leads on a flexible, intermediate substrate. Each of the conductive leads bridges a bonding hole in the intermediate substrate which is situated between successive contact pads. Each of the conductive leads further has a frangible portion within or near each bonding hole. A stand-off between the intermediate substrate and the device is create by compliant dielectric pads, typically composed of an elastomer material, positioned under each contact pad. The frangible portions allow the leads to be cleanly broken, bent and secured into electrical contact with chip contacts on the device. Each of these connections may be supported by a compliant layer, typically an uncured elastomer which fills the area around the compliant dielectric pads and is then cured.
摘要翻译：本发明提供了一种具有布置成阵列中的投诉触点的互连方案，以连接微电子装置上的导电表面和诸如印刷电路板的支撑基板。本发明适用于器件和支撑衬底之间的热膨胀系数的差异。通常，导电接触焊盘的区域阵列通过柔性中间衬底上的导电引线连接成行。每个导电引线桥接位于连续接触焊盘之间的中间衬底中的结合孔。每个导电引线还在每个结合孔内或附近还具有易碎部分。中间基板和器件之间的间隔是通过位于每个接触垫下方的通常由弹性体材料组成的柔性介电垫产生的。易碎部分允许引线被干净地折断，弯曲并固定成与设备上的芯片触点电接触。这些连接中的每一个可以由柔性层（通常为填充柔性介电垫周围区域的未固化的弹性体）支撑，然后固化。

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