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1. 发明授权

US06888229B2 Connection components with frangible leads and bus 失效
标题翻译：连接组件采用易碎导线和总线
公开(公告)号：US06888229B2
公开(公告)日：2005-05-03
申请号：US10872105
申请日：2004-06-18
申请人： Thomas H. DiStefano , Gary W. Grube , Igor Y. Khandros , Gaetan Mathieu , Jason Sweis , Laurie Union , David Gibson
发明人： Thomas H. DiStefano , Gary W. Grube , Igor Y. Khandros , Gaetan Mathieu , Jason Sweis , Laurie Union , David Gibson
IPC分类号： H01L21/60 , H01L23/31 , H01L23/495 , H01L23/498 , H05K3/36 , H05K3/40
CPC分类号： H01L24/86 , H01L23/3107 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/49861 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H05K3/361 , H05K3/4084 , H01L2924/00
摘要： A semiconductor chip mounting component includes a support structure adapted to engage a semiconductor chip. The support structure has a top surface, a bottom surface, and a gap extending through the support structure for defining first and second portions of the support structure on opposite sides of the gap. The support structure includes at least one elongated bus disposed alongside the gap, on the second portion of the support structure. The support structure includes a plurality of electrically conductive leads, each lead having a connection section extending across the gap, the connection section having a first end disposed on the first portion of the support structure, and a second end secured to the bus. Each lead includes a frangible section disposed between the first and second ends of the connection section, the frangible section having a cross-sectional area that is smaller than a cross-sectional area of the connection section. The gap is open at the bottom surface of the support structure. A semiconductor chip is disposed beneath the bottom surface of the support structure. The leads are adapted to be bonded to contacts on the semiconductor chip by breaking the frangible sections of the leads so as to disconnect the second ends of the leads from the bus and engage the leads with the contacts of the semiconductor chip.
摘要翻译：半导体芯片安装部件包括适于接合半导体芯片的支撑结构。支撑结构具有顶表面，底表面和延伸穿过支撑结构的间隙，用于限定支撑结构在间隙的相对侧上的第一和第二部分。支撑结构包括在支撑结构的第二部分上沿着间隙布置的至少一个细长总线。支撑结构包括多个导电引线，每个引线具有跨越间隙延伸的连接部分，连接部分具有设置在支撑结构的第一部分上的第一端和固定到总线的第二端。每个引线包括设置在连接部分的第一和第二端之间的易碎部分，该易碎部分的横截面积小于连接部分的横截面面积。间隙在支撑结构的底部表面开口。半导体芯片设置在支撑结构的底表面下方。引线适于通过断开引线的易碎部分而与半导体芯片上的触点接合，从而将引线的第二端与母线断开，并与半导体芯片的触点接合引线。

2. 发明授权

US5915752A Method of making connections to a semiconductor chip assembly 失效
标题翻译：连接到半导体芯片组件的方法
公开(公告)号：US5915752A
公开(公告)日：1999-06-29
申请号：US374559
申请日：1995-05-08
申请人： Thomas H. DiStefano , Gary W. Grube , Igor Y. Khandros , Gaetan Mathieu , Jason Sweis , Laurie Union , David Gibson
发明人： Thomas H. DiStefano , Gary W. Grube , Igor Y. Khandros , Gaetan Mathieu , Jason Sweis , Laurie Union , David Gibson
IPC分类号： H01L21/60 , H01L23/31 , H01L23/495 , H01L23/498 , H01L23/50 , H05K1/18 , H05K3/36 , H05K3/40 , H01R43/00
CPC分类号： H01L23/49572 , H01L23/3107 , H01L23/49838 , H01L23/4985 , H01L23/49861 , H01L24/01 , H01L2924/01082 , H01L2924/12042 , H05K3/361 , H05K3/4084 , Y10T29/49121 , Y10T29/4913 , Y10T29/49135 , Y10T29/49218 , Y10T29/49222
摘要： A connection component for electrically connecting a semiconductor chip to support substrate incorporates a preferably dielectric supporting structure (70) defining gaps (40). Leads extend across these gaps so that the leads are supported both sides of the gap (66, 70). The leads therefore can be positioned approximately in registration to contacts on the chip by aligning the connection component with the chip. Each lead is arranged so that one end can be displaced relative to the supporting structure when a downward force is applied to the lead. This allows the leads to be connected to the contacts on the chip by engaging each lead with a tool and forcing the lead downwardly against the contact. Preferably, each lead incorporates a frangible section (72) adjacent one side of the gap and the frangible section is broken when the lead is engaged with the contact. Final alignment of the leads with the contacts on the chip is provided by the bonding tool which has features adapted to control the position of the lead.
摘要翻译： PCT No.PCT / US93 / 06930 Sec。 371日期1995年5月8日 102（e）日期1995年5月8日PCT提交1993年7月23日PCT公布。出版物WO94 / 03036 日期1994年2月3日用于将半导体芯片电连接到支撑衬底的连接部件包含限定间隙（40）的优选电介质支撑结构（70）。引线延伸穿过这些间隙，使得引线被支撑在间隙（66,70）的两侧。因此，引线可以通过将连接部件与芯片对准而大致对准芯片上的触点。每个引线被布置成使得当向引线施加向下的力时，一端可相对于支撑结构移位。这允许引线通过使每个引线与工具接合并将引线向下抵靠接触件而连接到芯片上的触点。优选地，每个引线包括与间隙的一侧相邻的易碎部分（72），并且当引线与触点接合时，易碎部分断裂。引线与芯片上的触点的最终对准由具有适于控制引线位置的特征的焊接工具提供。

3. 发明授权

US6054756A Connection components with frangible leads and bus 有权
标题翻译：连接组件采用易碎导线和总线
公开(公告)号：US6054756A
公开(公告)日：2000-04-25
申请号：US268289
申请日：1999-03-15
申请人： Thomas H. DiStefano , Gary W. Grube , Igor Y. Khandros , Gaetan Mathieu , Jason Sweis , Laurie Union , David Gibson
发明人： Thomas H. DiStefano , Gary W. Grube , Igor Y. Khandros , Gaetan Mathieu , Jason Sweis , Laurie Union , David Gibson
IPC分类号： H01L21/60 , H01L23/31 , H01L23/495 , H01L23/498 , H05K3/36 , H05K3/40 , H01L23/48 , H01L23/52
CPC分类号： H01L24/86 , H01L23/3107 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/49861 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H05K3/361 , H05K3/4084
摘要： A connection component for electrically connecting a semiconductor chip to a support substrate incorporates a preferably dielectric supporting structure defining gaps. Leads extend across these gaps so that the leads are supported on both sides of the gap. The leads therefore can be positioned approximately in registration to contacts on the chip by aligning the connection component with the chip. Each lead is arranged so that one end can be displaced relative to the supporting structure when a downward force is applied to the lead. This allows the leads to be connected to the contacts on the chip by engaging each lead with a tool and forcing the lead downwardly against the contact. Preferably, each lead incorporates a frangible section adjacent one side of the gap connecting one end of the lead connection section to a bus extending alongside the gap. The frangible section is broken when the lead is engaged with the contact.
摘要翻译：用于将半导体芯片电连接到支撑衬底的连接部件包含限定间隙的优选介电支撑结构。引线延伸穿过这些间隙，使得引线支撑在间隙的两侧。因此，引线可以通过将连接部件与芯片对准而大致对准芯片上的触点。每个引线被布置成使得当向引线施加向下的力时，一端可相对于支撑结构移位。这允许引线通过使每个引线与工具接合并将引线向下抵靠接触件而连接到芯片上的触点。优选地，每个引线包括邻近连接引线连接部分的一端与沿着间隙延伸的总线的间隙的一侧相邻的易碎部分。当领导与联系人接触时，易碎部分断裂。

4. 发明授权

US5390844A Semiconductor inner lead bonding tool 失效
标题翻译：半导体内引线焊接工具
公开(公告)号：US5390844A
公开(公告)日：1995-02-21
申请号：US96700
申请日：1993-07-23
申请人： Thomas H. Distefano , Igor Y. Khandros , Gaetan Mathiew , Jason Sweis , John Grange , Gary W. Grube
发明人： Thomas H. Distefano , Igor Y. Khandros , Gaetan Mathiew , Jason Sweis , John Grange , Gary W. Grube
IPC分类号： H01L21/60 , B23K20/02 , B23K20/10 , H01L21/00 , H01L21/603 , H05K3/32
CPC分类号： H01L21/67138 , B23K20/025 , B23K20/106 , H01L24/80 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01033 , H01L2924/01045 , H01L2924/01074 , H01L2924/01076 , H01L2924/01082
摘要： A bonding tool for bonding inner leads to semiconductor chips is arranged to capture and align elongated lead sections extending in any one of plural directions, and preferably, in any one of two mutually orthogonal directions. Thus, the tool can be applied to align and bond all of the leads to a chip without turning the tool or the chip even where the leads extend in multiple directions.
摘要翻译：用于将内部引线键合到半导体芯片的接合工具被布置成捕获和对准沿多个方向中的任一个延伸的细长引线部分，优选地在两个相互正交的方向中的任一个方向上对准。因此，即使在多个方向上引线延伸的情况下，该工具也可以应用于将所有引线对齐并将其结合到芯片上而不转动工具或芯片。

5. 发明授权

US5398863A Shaped lead structure and method 失效
标题翻译：形铅笔结构及方法
公开(公告)号：US5398863A
公开(公告)日：1995-03-21
申请号：US96693
申请日：1993-07-23
申请人： Gary W. Grube , Gaetan Mathieu , Jason Sweis , John A. Grange
发明人： Gary W. Grube , Gaetan Mathieu , Jason Sweis , John A. Grange
IPC分类号： H01L23/12 , B23K20/10 , H01L21/60 , H05K3/34 , B23K31/02
CPC分类号： H01L24/50 , B23K20/10 , B23K2201/40 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01033 , H01L2924/01039 , H01L2924/01079 , H01L2924/01082
摘要： In a semiconductor inner lead bonding process, a connection component having leads is disposed on the chip surface so that the leads lie above the contacts. A bond region of each lead is forced downwardly by a tool into engagement with a contact on the chip while a first or proximal end of the lead remains attached to a dielectric support structure. The lead is deformed into an S-shaped configuration by moving the bonding tool horizontally towards the proximal or first end of the lead, thereby forcing the bonding region towards the first end and bending or buckling the lead. Alternatively, the lead is bent downwardly by a tool and the tool may then be disengaged from the lead, shifted away from the proximal end of the lead and again advanced downwardly to secure the lead to the chip contact.
摘要翻译：在半导体内引线接合工艺中，具有引线的连接部件设置在芯片表面上，使得引线位于触点上方。每个引线的接合区域被工具向下压迫与芯片上的接触件接合，而引线的第一或近端保持附接到电介质支撑结构。通过将接合工具水平地朝向引线的近端或第一端移动，从而将引线变形为S形构造，从而迫使接合区朝向第一端并弯曲或弯曲引线。或者，引线通过工具向下弯曲，然后工具可以从引线脱离，从引线的近端移开，并再次向前推进以将引线固定到芯片接触。

6. 发明授权

US08429572B2 Method and system for implementing controlled breaks between features using sub-resolution assist features 有权
公开(公告)号：US08429572B2
公开(公告)日：2013-04-23
申请号：US13335196
申请日：2011-12-22
申请人： Jason Sweis
发明人： Jason Sweis
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , G03F1/70
摘要： Disclosed is a method, system, and computer program product for implementing controlled breaks using sub-resolution assist features. Sub-resolution bridging features are added to implement controlled breaks between features on the layout. The bridging features may also be used to facilitate or optimize multiple mask/exposure techniques that split a layout or features on a layout to address pitch problems.

7. 发明申请

US20120096414A1 METHOD AND SYSTEM FOR IMPLEMENTING CONTROLLED BREAKS BETWEEN FEATURES USING SUB-RESOLUTION ASSIST FEATURES 有权
标题翻译：使用分解辅助功能实现特征之间的控制断裂的方法和系统
公开(公告)号：US20120096414A1
公开(公告)日：2012-04-19
申请号：US13335785
申请日：2011-12-22
申请人： Jason Sweis
发明人： Jason Sweis
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , G03F1/70
摘要： Disclosed is a method, system, and computer program product for implementing controlled breaks using sub-resolution assist features. Sub-resolution bridging features are added to implement controlled breaks between features on the layout. The bridging features may also be used to facilitate or optimize multiple mask/exposure techniques that split a layout or features on a layout to address pitch problems.
摘要翻译：公开了一种使用子分辨率辅助特征来实现受控断点的方法，系统和计算机程序产品。添加子分辨率桥接功能以实现布局上的功能之间的受控中断。桥接特征还可以用于促进或优化在布局上分割布局或特征以解决间距问题的多个掩模/曝光技术。

8. 发明授权

US08997026B1 System and method for self alignment of pad mask 有权
标题翻译：垫面罩自身对准的系统和方法
公开(公告)号：US08997026B1
公开(公告)日：2015-03-31
申请号：US13470080
申请日：2012-05-11
申请人： Jason Sweis
发明人： Jason Sweis
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G03F1/70
摘要： A system and method provide semiconductor fabrication mask creation techniques that align the device features patterned with a first core mask with one or more pad features patterned with a subsequent pad mask. Shapes representing the pad features may be included in the core mask by reducing on all sides, the shape of the pad feature in the core mask by the width of the spacer material. A pad mask then may be created to include a shape of the pad feature that may overlap a portion of the spacer material pattern created by the shape of the pad feature in the core mask. Data sets may be generated from a circuit design to create the masks that may be fabricated with the described techniques.
摘要翻译：系统和方法提供半导体制造掩模创建技术，其将图案化的设备特征与第一核心掩模对准，其中一个或多个衬垫特征与随后的衬垫掩模图案化。代表焊盘特征的形状可以通过减少所有侧面，将芯掩模中的焊盘特征的形状减小到间隔物材料的宽度来包括在芯掩模中。然后可以创建焊盘掩模以包括可以与由芯掩模中的焊盘特征的形状产生的间隔材料图案的一部分重叠的焊盘特征的形状。可以从电路设计产生数据集以创建可以用所述技术制造的掩模。

9. 发明申请

US20150230988A1 ELECTRONIC EYEWEAR THERAPY 审中-公开
标题翻译：电子眼镜治疗
公开(公告)号：US20150230988A1
公开(公告)日：2015-08-20
申请号：US14703875
申请日：2015-05-04
申请人： David Chao , Zhiyang Guo , Jason Sweis , Vivian Liane Rice , Grace C. Sheen , Eric S. Hussey
发明人： David Chao , Zhiyang Guo , Jason Sweis , Vivian Liane Rice , Grace C. Sheen , Eric S. Hussey
IPC分类号： A61F9/04 , G02F1/13 , G02F1/133 , G02C7/16
CPC分类号： A61F9/045 , A61H5/005 , A61H2201/165 , A61H2201/501 , A61H2201/5015 , A61H2201/5028 , A61H2201/5035 , A61H2201/5038 , A61H2201/5043 , A61H2201/5058 , A61H2201/5066 , A61H2201/5082 , A61H2201/5097 , G02C5/2227 , G02C7/101 , G02C7/104 , G02C7/16 , G02C11/10 , G02C2200/22 , G02C2200/26 , G02C2200/28 , G02F1/1313 , G02F1/13306 , G06F19/3481
摘要： Embodiments for systems, methods and apparatuses of eyewear are disclosed. One method includes treating a patient with shutter glasses therapy for a relatively short period of time, such as at least a 6 week period; wherein the shutter glasses therapy includes blanking a first lens of shutter glasses being worn by the patient for a first blocking time, blanking a second lens of the shutter glasses being worn by the patient for a second blocking time, and controllably setting at least one of the first blocking time and the second blocking time.
摘要翻译：公开了眼镜的系统，方法和装置的实施例。一种方法包括用相对较短的时间段（例如至少6周）治疗具有快门眼镜治疗的患者; 其中所述快门眼镜治疗包括对由患者佩戴的快门眼镜的第一透镜进行消隐以阻止第一阻挡时间，消除由患者佩戴的快门眼镜的第二透镜以达到第二阻塞时间，并且可控地设置以下步骤中的至少一个：第一个阻塞时间和第二个阻塞时间。

10. 发明申请

US20140132913A1 SHUTTER EYEWEAR 有权
标题翻译：快门眼镜
公开(公告)号：US20140132913A1
公开(公告)日：2014-05-15
申请号：US14072784
申请日：2013-11-05
申请人： Jason Sweis , Vivian Liane Rice , David Chao , Zhiyang Guo
发明人： Jason Sweis , Vivian Liane Rice , David Chao , Zhiyang Guo
IPC分类号： G02C7/16 , G02C11/00
CPC分类号： A61H5/00 , A61H2205/024 , G02C7/08 , G02C7/101 , G02C11/10
摘要： Apparatuses and methods of shuttering glasses are disclosed. One apparatus includes a first lens operable to blank for a first blocking time, a second lens operable to blank for a second blocking time, and a controller for controllably setting at least one of the first blocking time and the second blocking time.
摘要翻译：公开了一种用于制作眼镜的装置和方法。一种装置包括可操作以消除第一阻塞时间的第一透镜，可操作以空白第二阻断时间的第二透镜，以及用于可控地设置第一阻塞时间和第二阻塞时间中的至少一个的控制器。

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