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1. 发明授权

US06346742B1 Chip-scale packaged pressure sensor 失效
标题翻译：芯片级封装压力传感器
公开(公告)号：US06346742B1
公开(公告)日：2002-02-12
申请号：US09190500
申请日：1998-11-12
申请人： Janusz Bryzek , David W. Burns , Sean S. Cahill , Steven S. Nasiri
发明人： Janusz Bryzek , David W. Burns , Sean S. Cahill , Steven S. Nasiri
IPC分类号： H01L2312
CPC分类号： G01L19/147 , G01L19/0038 , G01P2015/0828 , H01L2224/48091 , H01L2924/01322 , H01L2924/10253 , H01L2924/00014 , H01L2924/00
摘要： A chip-scale sensor package is described. In one embodiment, the chip-scale sensor package includes a semiconductor substrate having a sensor region, and a semiconductor cap having a recess. The semiconductor cap is bonded to the semiconductor substrate with a thermocompression bond to form a cavity therebetween. The semiconductor substrate is bonded to the semiconductor cap using different types of materials. The semiconductor substrate and/or the semiconductor cap may optionally include a semiconductor device such as an electronically trimmable integrated circuit fabricated thereon. In addition, the semiconductor substrate may optionally include an integral stress isolation flexible region for isolation of the sensor region.
摘要翻译：描述了芯片级传感器封装。在一个实施例中，芯片级传感器封装包括具有传感器区域的半导体衬底和具有凹部的半导体盖。半导体盖通过热压接合到半导体衬底上以在其间形成空腔。使用不同类型的材料将半导体衬底接合到半导体帽。半导体衬底和/或半导体帽可以可选地包括诸如其上制造的电子可调整体集成电路的半导体器件。此外，半导体衬底可以可选地包括用于隔离传感器区域的整体应力隔离柔性区域。

2. 发明授权

US6006607A Piezoresistive pressure sensor with sculpted diaphragm 失效
标题翻译：压电式压力传感器，带雕刻膜片
公开(公告)号：US6006607A
公开(公告)日：1999-12-28
申请号：US144118
申请日：1998-08-31
申请人： Janusz Bryzek , David W. Burns , Sean S. Cahill , Steven S. Nasiri , James B. Starr
发明人： Janusz Bryzek , David W. Burns , Sean S. Cahill , Steven S. Nasiri , James B. Starr
IPC分类号： G01L9/00 , G01L9/06
CPC分类号： G01L9/0042 , G01L9/0054
摘要： The present invention is a semiconductor pressure sensor. In one embodiment, the semiconductor pressure sensor includes a diaphragm having a first thickness and at least cone raised boss that is coupled to a first side of the diaphragm. The at least one raised boss increases the diaphragm thickness in the region occupied by the at least one raised boss to a second thickness. A plurality of piezoresistors are disposed on a second side of the diaphragm in regions of the first thickness. In another embodiment, a semiconductor pressure sensor diaphragm includes at least one raised boss disposed along a central axis on a first side of the diaphragm. At least two raised bridge regions are disposed along the central axis, interconnecting the at least one raised boss and a diaphragm edge. Each raised bridge region is narrower than the raised boss. A plurality of piezoresistors are disposed on the raised bridge regions of the diaphragm along the central axis.
摘要翻译：本发明是半导体压力传感器。在一个实施例中，半导体压力传感器包括具有第一厚度和至少锥形凸起的隔膜，该凸起联接到隔膜的第一侧。所述至少一个凸起凸台将所述至少一个凸起凸起所占据的区域中的隔膜厚度增加到第二厚度。多个压电电阻器设置在第一厚度的区域中的隔膜的第二侧上。在另一个实施例中，半导体压力传感器膜片包括至少一个凸起的凸起部分，其沿着中心轴线设置在隔膜的第一侧上。至少两个凸起的桥接区域沿着中心轴线布置，将至少一个凸起的凸起和隔膜边缘互连。每个凸起的桥梁区域比凸起的凸起更窄。多个压电电阻器沿着中心轴设置在隔膜的凸起的桥接区域上。

3. 发明授权

US06229190B1 Compensated semiconductor pressure sensor 有权
标题翻译：补偿半导体压力传感器
公开(公告)号：US06229190B1
公开(公告)日：2001-05-08
申请号：US09216073
申请日：1998-12-18
申请人： Janusz Bryzek , David W. Burns , Steven S. Nasiri , Sean S. Cahill
发明人： Janusz Bryzek , David W. Burns , Steven S. Nasiri , Sean S. Cahill
IPC分类号： H01L2982
CPC分类号： G01L19/147 , G01L9/0042 , G01L9/0054 , G01L19/0038 , G01L19/143 , G01P2015/084 , H01L2224/48091 , H01L2224/48247 , H01L2924/16151 , H01L2924/16195 , H01L2924/00014
摘要： A semiconductor pressure sensor compatible with fluid and gaseous media applications is described. The semiconductor pressure sensor includes a sensor capsule having a semiconductor die and a silicon cap that is bonded to the semiconductor die. The semiconductor die includes a diaphragm that incorporates piezoresistive sensors thereon, and a stress isolation mechanism for isolating the diaphragm from packaging and mounting stresses. The silicon cap includes a cavity for allowing the diaphragm to deflect. The semiconductor pressure sensor further includes a pressure port that is hermetically attached to the semiconductor die. The sensor capsule and pressure port may be incorporated into a plastic housing. In one embodiment, the silicon cap is bonded to the semiconductor die to form an integral pressure reference. In an alternative embodiment, a second pressure port is provided for allowing gage or differential pressure measurements. A technique for incorporating the piezoresistive sensors is also described. An ASIC may be optionally attached to the silicon cap, and/or active electronic circuitry may be fabricated on the semiconductor die or silicon cap. Additional coatings may be optionally applied to the pressure port and semiconductor die for enhancing chemical resistance.
摘要翻译：描述了与流体和气体介质应用相兼容的半导体压力传感器。半导体压力传感器包括具有半导体管芯和粘合到半导体管芯上的硅帽的传感器封装。半导体管芯包括在其上结合有压阻传感器的隔膜以及用于将隔膜与封装和安装应力隔离的应力隔离机构。硅帽包括用于允许隔膜偏转的空腔。半导体压力传感器还包括气密地附接到半导体管芯的压力端口。传感器胶囊和压力端口可以结合到塑料外壳中。在一个实施例中，硅帽结合到半导体管芯以形成整体的压力参考。在替代实施例中，提供了用于允许量规或差压测量的第二压力端口。还描述了一种用于结合压阻传感器的技术。 ASIC可以可选地附接到硅帽，和/或有源电子电路可以制造在半导体管芯或硅帽上。另外的涂层可以任选地施加到压力端口和半导体管芯上以提高耐化学性。

4. 发明授权

US06351996B1 Hermetic packaging for semiconductor pressure sensors 有权
标题翻译：半导体压力传感器的气密封装
公开(公告)号：US06351996B1
公开(公告)日：2002-03-05
申请号：US09191718
申请日：1998-11-12
申请人： Steven S. Nasiri , David W. Burns , Janusz Bryzek , Sean S. Cahill
发明人： Steven S. Nasiri , David W. Burns , Janusz Bryzek , Sean S. Cahill
IPC分类号： G01L904
CPC分类号： G01L19/147 , G01L19/0038 , G01L19/0084
摘要： A hermetic media interface for a sensor package is disclosed. Preferably, the hermetic media interface is incorporated into a pressure sensor package for interfacing directly to fluid and/or gaseous media. In one embodiment, the pressure sensor package includes a semiconductor die and a pressure port that are housed in a pre-molded plastic package. A eutectic solder is coupled between the semiconductor die and the pressure port to solder the same to the semiconductor die. The semiconductor die may be metallized to enhance solderability. In an alternative embodiment, the pressure port is made from one or more plastic materials and the pressure port is attached to the semiconductor die with an adhesive. An integral stress-isolation region may optionally be incorporated on the semiconductor die.
摘要翻译：公开了一种用于传感器封装的密封介质接口。优选地，密封介质界面结合到压力传感器封装中，用于直接与流体和/或气体介质接合。在一个实施例中，压力传感器封装包括容纳在预模制塑料封装中的半导体管芯和压力端口。共晶焊料耦合在半导体管芯和压力端口之间以将其焊接到半导体管芯。半导体管芯可以被金属化以增强可焊性。在替代实施例中，压力端口由一种或多种塑料材料制成，并且压力端口用粘合剂附接到半导体管芯。整体应力隔离区可任选地并入半导体管芯上。

5. 发明申请

US20120066894A1 LOW COST HIGH FREQUENCY DEVICE PACKAGE AND METHODS 有权
公开(公告)号：US20120066894A1
公开(公告)日：2012-03-22
申请号：US13308351
申请日：2011-11-30
申请人： Eric A. Sanjuan , Sean S. Cahill
发明人： Eric A. Sanjuan , Sean S. Cahill
IPC分类号： H01P11/00
CPC分类号： H01L23/66 , H01L23/047 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L2223/6627 , H01L2224/05599 , H01L2224/32245 , H01L2224/45014 , H01L2224/45015 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48471 , H01L2224/4903 , H01L2224/73265 , H01L2224/8592 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1423 , H01L2924/181 , H01L2924/1903 , H01L2924/19032 , H01L2924/19033 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/3025 , H05K1/0243 , Y10T29/49002 , Y10T29/49018 , Y10T29/49121 , Y10T29/49126 , Y10T29/49144 , H01L2224/83 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/48227 , H01L2224/45099 , H01L2924/20752
摘要： A low-cost high-frequency electronic device package and associated fabrication method are described wherein waveguide structures are formed from the high frequency device to the package lead transition. The package lead transition is optimized to take advantage of waveguide interconnect structure.

6. 发明授权

US09960468B2 Metalized molded plastic components for millimeter wave electronics and method for manufacture 有权
公开(公告)号：US09960468B2
公开(公告)日：2018-05-01
申请号：US13607539
申请日：2012-09-07
申请人： Sean S. Cahill , Eric A. Sanjuan
发明人： Sean S. Cahill , Eric A. Sanjuan
IPC分类号： H01P1/208 , H01P1/213 , H01P5/12 , H01P1/207 , H01P11/00
CPC分类号： H01P1/208 , H01P1/207 , H01P1/213 , H01P1/2138 , H01P5/12 , H01P11/002 , Y10T29/49016
摘要： Waveguide components that have a high degree of performance accuracy over the temperature range of interest are provided. The components require no post-formation trimming steps, are light-weight, and dimensionally stable. In addition, a method for the manufacture of these millimeter wave components is provided.

7. 发明授权

US08839508B2 Method of making a high frequency device package 有权
标题翻译：制造高频器件封装的方法
公开(公告)号：US08839508B2
公开(公告)日：2014-09-23
申请号：US13308351
申请日：2011-11-30
申请人： Eric A. Sanjuan , Sean S. Cahill
发明人： Eric A. Sanjuan , Sean S. Cahill
IPC分类号： H01R43/00 , H01L23/66 , H01L23/00 , H01L23/047 , H05K1/02
CPC分类号： H01L23/66 , H01L23/047 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L2223/6627 , H01L2224/05599 , H01L2224/32245 , H01L2224/45014 , H01L2224/45015 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48471 , H01L2224/4903 , H01L2224/73265 , H01L2224/8592 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1423 , H01L2924/181 , H01L2924/1903 , H01L2924/19032 , H01L2924/19033 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/3025 , H05K1/0243 , Y10T29/49002 , Y10T29/49018 , Y10T29/49121 , Y10T29/49126 , Y10T29/49144 , H01L2224/83 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/48227 , H01L2224/45099 , H01L2924/20752
摘要： A fabrication method for a low-cost high-frequency electronic device package having waveguide structures formed from the high frequency device to the package lead transition. The package lead transition is optimized to take advantage of waveguide interconnect structure.
摘要翻译：一种低成本高频电子器件封装的制造方法，其具有由高频器件到封装引线转变形成的波导结构。封装引线转换优化，以利用波导互连结构。

8. 发明申请

US20100010531A1 Tissue Expansion Devices 审中-公开
标题翻译：组织扩张装置
公开(公告)号：US20100010531A1
公开(公告)日：2010-01-14
申请号：US12560160
申请日：2009-09-15
申请人： Tadmor Shalon , Daniel Jacobs , Sean S. Cahill , Scott Wetenkamp
发明人： Tadmor Shalon , Daniel Jacobs , Sean S. Cahill , Scott Wetenkamp
IPC分类号： A61M29/00
CPC分类号： A61F2/12 , A61B90/02 , A61F2250/0002 , A61F2250/0003
摘要： A tissue expansion device is provided. The device includes an expandable compartment adapted for implanting in a body of a subject; and a gas source adapted for implanting in a body of a subject and operably connected to the expandable compartment for inflation thereof by transfer of a gas thereto.
摘要翻译：提供了一种组织膨胀装置。该装置包括适于植入受试者体内的可膨胀隔室; 以及气体源，其适于植入受试者的身体并且可操作地连接到可膨胀隔室，以通过将气体转移到其上而使其膨胀。

9. 发明授权

US5484745A Method for forming a semiconductor sensor 失效
标题翻译：半导体传感器的形成方法
公开(公告)号：US5484745A
公开(公告)日：1996-01-16
申请号：US141055
申请日：1993-10-26
申请人： Sean S. Cahill
发明人： Sean S. Cahill
IPC分类号： G01L9/12 , G01L9/00 , H01L29/84 , H01L27/20
CPC分类号： G01L9/0042 , Y10S148/012 , Y10S148/159 , Y10S438/928 , Y10S438/977
摘要： A method for forming at least one corrugation member in a semiconductor material, contains the step of: forming a semiconductor material layer onto a substrate, masking a first surface of the semiconductor material, etching the first surface to form first cavity thereon, removing a mask from the semiconductor material, masking the first surface and second surface of the semiconductor material, etching the second surface to form second cavity thereon, the second cavity being defined into the first cavity, removing the mask from the semiconductor material, depositing a specified masking material selected in accordance with a characteristic of the substrate onto the semiconductor material, etching an unmasked portion of the semiconductor material and depositing the same material as the abovementioned specified masking material selected in accordance with a characteristic of the substrate onto the semiconductor material and the specified masking material which has been deposited onto the semiconductor to form the corrugation member.
摘要翻译：一种用于在半导体材料中形成至少一个波纹构件的方法，包括以下步骤：在衬底上形成半导体材料层，掩蔽半导体材料的第一表面，蚀刻第一表面以在其上形成第一腔，去除掩模从所述半导体材料掩蔽所述半导体材料的第一表面和第二表面，蚀刻所述第二表面以在其上形成第二腔，所述第二腔被限定到所述第一腔中，从所述半导体材料移除所述掩模，沉积特定的掩蔽材料根据衬底的特性被选择到半导体材料上，蚀刻半导体材料的未掩模部分并将与根据衬底的特性选择的上述指定掩模材料相同的材料沉积到半导体材料上并且将特定掩模已经沉积在s上的材料以形成波纹构件。

10. 发明授权

US08581113B2 Low cost high frequency device package and methods 有权
标题翻译：低成本的高频器件封装和方法
公开(公告)号：US08581113B2
公开(公告)日：2013-11-12
申请号：US11960681
申请日：2007-12-19
申请人： Eric A. Sanjuan , Sean S. Cahill
发明人： Eric A. Sanjuan , Sean S. Cahill
IPC分类号： H05K1/11
CPC分类号： H01L23/66 , H01L23/047 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L2223/6627 , H01L2224/05599 , H01L2224/32245 , H01L2224/45014 , H01L2224/45015 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48471 , H01L2224/4903 , H01L2224/73265 , H01L2224/8592 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1423 , H01L2924/181 , H01L2924/1903 , H01L2924/19032 , H01L2924/19033 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/3025 , H05K1/0243 , Y10T29/49002 , Y10T29/49018 , Y10T29/49121 , Y10T29/49126 , Y10T29/49144 , H01L2224/83 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/48227 , H01L2224/45099 , H01L2924/20752
摘要： A low-cost high-frequency electronic device package and associated fabrication method are described wherein waveguide structures are formed from the high frequency device to the package lead transition. The package lead transition is optimized to take advantage of waveguide interconnect structure.
摘要翻译：描述了一种低成本高频电子器件封装和相关的制造方法，其中波导结构从高频器件形成为封装引线转变。封装引线转换优化，以利用波导互连结构。

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