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1. 发明专利

JP2014032724A Semiconductor storage device 审中-公开
标题翻译：半导体存储设备
公开(公告)号：JP2014032724A
公开(公告)日：2014-02-20
申请号：JP2012173091
申请日：2012-08-03
申请人： Sharp Corp , シャープ株式会社 , Elpida Memory Inc , エルピーダメモリ株式会社
发明人： ISHIHARA KAZUYA , TAMAI YUKIO , NAKANO TAKASHI , SEKO AKIYOSHI
IPC分类号： G11C13/00
CPC分类号： G11C13/0021 , G11C13/0007 , G11C13/0069 , G11C2213/79
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor storage device capable of performing efficient rewriting with low voltage and low current operation by including a variable resistive element.SOLUTION: The semiconductor storage device has a memory cell array configured by arranging a plurality of memory cells obtained by connecting variable resistive element and a selection transistor in series in the shape of a matrix. A set operation (low resistance operation of variable resistive element) of a memory cell is performed by applying a set voltage pulse, taking a time longer than in a reset operation (high resistance operation of variable resistive element) while the selection transistor limits current flowing during the set operation to predetermined low current, and is performed by simultaneously applying the set voltage pulse to the plurality of memory cells.
摘要翻译：要解决的问题：提供一种能够通过包括可变电阻元件来进行低电压和低电流操作的高效重写的半导体存储装置。解决方案：半导体存储装置具有存储单元阵列，该存储单元阵列通过布置获得的多个存储单元通过将可变电阻元件和选择晶体管串联连接成矩阵形状。存储单元的设定操作（可变电阻元件的低电阻操作）通过施加设定电压脉冲来执行，该设定电压脉冲比复位操作时间长（可变电阻元件的高电阻操作），而选择晶体管限制电流流动在设定操作期间到预定的低电流，并且通过同时向多个存储单元施加设定电压脉冲来执行。

2. 发明专利

JP2013084324A Semiconductor memory device and semiconductor device 有权
标题翻译：半导体存储器件和半导体器件
公开(公告)号：JP2013084324A
公开(公告)日：2013-05-09
申请号：JP2011223087
申请日：2011-10-07
申请人： Sharp Corp , シャープ株式会社 , Elpida Memory Inc , エルピーダメモリ株式会社
发明人： NAGURA MITSURU , AWAYA NOBUYOSHI , ISHIHARA KAZUYA , SEKO AKIYOSHI
IPC分类号： G11C13/00 , H01L27/10 , H01L27/105
CPC分类号： G11C13/0028 , G11C13/0002 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2013/0078 , G11C2213/79
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of performing each verify operation after two kinds of write operations having different voltage application polarities to a variable resistance element at low power consumption and high speed.SOLUTION: The semiconductor memory device comprises: a write circuit 22; and a read circuit 21. The write circuit 22 is configured to perform: a set operation of reducing electric resistance of the variable resistance element by causing current to flow from one end side of a memory cell to the other end side of the memory cell via the variable resistance element; and a reset operation of increasing the electric resistance of the variable resistance element by causing current to flow from the other end side of the memory cell to the one end side of the memory cell via the variable resistance element. The read circuit 21 is configured to perform: a first read operation of reading a resistance state of the variable resistance element by causing current to flow from one end side of the memory cell to the other end side of the memory cell via the variable resistance element; and a second read operation of reading a resistance state of the variable resistance element by causing current to flow from the other end side of the memory cell to the one end side of the memory cell via the variable resistance element.
摘要翻译：要解决的问题：提供一种能够以低功耗和高速度对具有不同电压施加极性的两种写入操作对可变电阻元件执行每个验证操作的半导体存储器件。解决方案：半导体存储器件包括：写入电路22; 写电路22构成为：通过使电流从存储单元的一端侧流向存储单元的另一端侧而使电流降低的可变电阻元件的电阻的设定动作可变电阻元件; 以及通过使电流从存储单元的另一端侧经由可变电阻元件流向存储单元的一端侧而增加可变电阻元件的电阻的复位动作。读取电路21被配置为执行：通过使电流从存储单元的一端侧经由可变电阻元件流过存储单元的另一端而读取可变电阻元件的电阻状态的第一读取操作 ; 以及第二读取操作，其通过使电流从存储单元的另一端侧经由可变电阻元件流向存储单元的一端侧来读取可变电阻元件的电阻状态。版权所有（C）2013，JPO＆INPIT

3. 发明专利

JP2017092054A 光電変換素子およびそれを用いた光電変換装置审中-公开
公开(公告)号：JP2017092054A
公开(公告)日：2017-05-25
申请号：JP2014055385
申请日：2014-03-18
申请人：シャープ株式会社 , Sharp Corp
发明人： TAKIMOTO TAKAHIRO , KASHU KAZUHIRO , UCHIDA MASAYO , UCHIHASHI MASAAKI , AWAYA NOBUYOSHI , ISHIHARA KAZUYA , NAKANO TAKASHI , NAGURA MITSURU
IPC分类号： H01L31/10 , G01J1/02
CPC分类号： G01J1/429 , G01J1/02 , G01J1/0459 , H01L31/02161 , H01L31/103
摘要：【課題】シリコンを含む基板の使用を可能としつつも紫外線領域、特に200nm〜400nmの波長領域において高い光感度を有する光電変換素子およびそれを用いた紫外線センサ等の光電変換装置を提供する。【解決手段】光電変換素子10は、P型またはN型の半導体基板11と、半導体基板11内に形成され、半導体基板11とPN接合を形成するN型またはP型の半導体層12と、半導体層12の上に形成された反射防止膜とを備える。反射防止膜は、200nm〜400nmの波長領域の光の反射を抑制すべく、この波長領域に対する反射率が他の波長領域に対する反射率よりも低い。また、反射防止膜は、200nm〜400nmの波長領域の光吸収を抑制すべく、この波長領域に対する消衰係数が0.01以下である第1の絶縁膜14を含んでいる。【選択図】図1

4. 发明专利

JP2015049228A カラーセンサ有权
标题翻译：颜色传感器
公开(公告)号：JP2015049228A
公开(公告)日：2015-03-16
申请号：JP2013183296
申请日：2013-09-04
申请人：シャープ株式会社 , Sharp Corp
发明人： AWAYA NOBUYOSHI , ISHIHARA KAZUYA , NAKANO TAKASHI , KASHU KAZUHIRO , TAKIMOTO TAKAHIRO , UCHIDA MASAYO
IPC分类号： G01J3/02 , G01J3/36 , G01J3/51 , G02B5/20
摘要：【課題】表面プラズモン共鳴を利用する赤色光フィルタの透過率を確保しつつ、赤色光の強度に誤差が生じにくいカラーセンサを提供する。【解決手段】カラーセンサ(10)は、赤色光フィルタ(12R)と、赤色光受光素子(14R)と、赤外光フィルタ(12IR)と、赤外光受光素子(14IR)と、補正部(16A)とを備える。赤色光フィルタは、赤色光を透過する。赤色光受光素子は、赤色光フィルタが透過した赤色光を受光する。赤外光フィルタは、赤外光を透過する。赤外光受光素子は、赤外光フィルタが透過した赤外光を受光する。赤色光フィルタ及び赤外光フィルタは、それぞれ、表面プラズモン共鳴を利用するフィルタである。補正部は、赤色光フィルタ及び赤外光フィルタの透過特性を参照し、且つ、赤外光受光素子の出力を基にして、赤色光受光素子の出力を補正する。【選択図】図1
摘要翻译：要解决的问题：提供一种在确保使用表面等离子体共振的红光滤光片的透射率的同时难以引起红光强度误差的颜色传感器。解决方案：彩色传感器（10）包括：红光滤光器 12R）; 红光接收元件（14R）; 红外光滤光器（12IR）; 红外光接收元件（14IR）; 和校正部（16A）。红光通过红光滤光片传输。红光接收元件接收通过红光滤光器透射的红光。红外光透过红外光滤光片。红外光接收元件接收通过红外光滤光器透射的红外光。红光滤光器和红外光滤光器分别被配置为使用表面等离子体共振的滤光器。参照红光滤光器和红外光滤光器的透射特性，校正部根据红外光接收元件的输出校正红光接收元件的输出。

5. 发明专利

JP2012079930A Variable resistive element and nonvolatile semiconductor memory device 有权
标题翻译：可变电阻元件和非易失性半导体存储器件
公开(公告)号：JP2012079930A
公开(公告)日：2012-04-19
申请号：JP2010223949
申请日：2010-10-01
申请人： Sharp Corp , シャープ株式会社
发明人： TAMAI YUKIO , ISHIHARA KAZUYA , AWAYA NOBUYOSHI
IPC分类号： H01L27/105 , H01L45/00 , H01L49/00
摘要： PROBLEM TO BE SOLVED: To provide a variable resistive element capable of relaxing a restriction on an electrode material and easily being produced, and a nonvolatile semiconductor memory device having the variable resistive element.SOLUTION: A variable resistive element 2 is configured such that a resistance change layer 13 and a low resistance layer 14 contacting with a second electrode are held between a first electrode 12a and the second electrode 14. The low resistance layer 14 is an oxide film of a metal element same as a metal oxide film forming the resistance change layer 13, and is resistance-lowering processed such that its resistive value becomes lower than that of the resistance change layer. The low resistive layer 14, for example, is formed by doping impurities into the metal oxide film and by increasing a carrier concentration. Alternatively in the case where the low resistive layer 14 is an n-type metal oxide, the low resistive layer 14 is formed by increasing an oxygen deficiency concentration in the metal oxide film than that of the resistance change layer 13.
摘要翻译：要解决的问题：提供一种能够缓和对电极材料的限制并易于制造的可变电阻元件，以及具有可变电阻元件的非易失性半导体存储器件。解决方案：可变电阻元件2被配置为使得与第二电极接触的电阻变化层13和低电阻层14保持在第一电极12a和第二电极14之间。低电阻层14是与形成电阻变化层13的金属氧化物膜相同的金属元素的氧化膜，进行电阻降低处理，使其电阻值变得比电阻变化层的电阻值低。例如，低电阻层14通过将杂质掺杂到金属氧化物膜中并通过增加载流子浓度而形成。或者，在低电阻层14是n型金属氧化物的情况下，通过增加金属氧化物膜中的缺氧浓度比电阻变化层13的氧缺乏浓度形成低电阻层14.版权所有：（C）2012，JPO＆INPIT

6. 发明专利

JP2012069220A Semiconductor memory 有权
标题翻译：半导体存储器
公开(公告)号：JP2012069220A
公开(公告)日：2012-04-05
申请号：JP2010213984
申请日：2010-09-24
申请人： Sharp Corp , シャープ株式会社
发明人： NAGURA MITSURU , ISHIHARA KAZUYA , YAMAZAKI NOBUO , KAWABATA MASARU
IPC分类号： G11C13/00
CPC分类号： G11C13/0007 , G11C13/0064 , G11C13/0069 , G11C2213/32 , G11C2213/79
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory including variable resistive elements which can stably and highly controllably perform writing under an intended electric resistance state in a writing operation by a random access.SOLUTION: Despite a resistive state of a variable resistive element of a memory cell to be rewritten (an erasing and writing operation), an erasing voltage pulse for making the resistive state of the variable resistive element a lowest erasure state is applied thereto. Later, a writing voltage pulse for making the resistive state of the variable resistive element an intended writing state is applied to a variable resistive element of the memory cell to be written. The writing voltage pulse is thus applied constantly after the application of the erasing voltage pulse, so as to avoid the continuous application of a plurality of writing voltage pulses.
摘要翻译：要解决的问题：提供一种包括可变电阻元件的半导体存储器，其可以通过随机存取在写入操作中在期望的电阻状态下稳定且高度可控地执行写入。解决方案：尽管要重写的存储器单元的可变电阻元件的电阻状态（擦除和写入操作），但是为了使可变电阻元件的电阻状态为最低擦除状态的擦除电压脉冲被施加到其上。之后，将用于使可变电阻元件的电阻状态成为预定写入状态的写入电压脉冲施加到要写入的存储单元的可变电阻元件。在施加擦除电压脉冲之后，写入电压脉冲被不断地施加，以避免连续施加多个写入电压脉冲。版权所有（C）2012，JPO＆INPIT

7. 发明专利

JP2009282782A Product arithmetic unit including resistance change type variable resistor element, product sum arithmetic unit, neural network providing each neuron element with these arithmetic units, and product arithmetic method 有权
标题翻译：产品算术单元，包括电阻变化型变量电阻元件，产品单位算术单元，提供每个具有这些算术单位的神经元元素的神经网络和产品算术方法
公开(公告)号：JP2009282782A
公开(公告)日：2009-12-03
申请号：JP2008134682
申请日：2008-05-22
申请人： Takashi Morie , Sharp Corp , シャープ株式会社 , 隆森江
发明人： ONISHI SHIGEO , ISHIHARA KAZUYA , MORIE TAKASHI
IPC分类号： G06N3/063
摘要： PROBLEM TO BE SOLVED: To simplify configurations of a product arithmetic unit and a product sum arithmetic unit and to reduce occupied areas of the product arithmetic unit and the product sum arithmetic unit in the area of the whole circuit including these units. SOLUTION: When a single voltage pulse of pulse width Ti corresponding to a multiplicand is input to a terminal A of the resistance change type variable resistor element 1 having terminals A, B and a voltage pulse string of a pulse frequency Fi corresponding to a multiplier is input to the terminal B, a PWM (pulse width modulation) signal according to the Fi, Ti corresponding to a product operation result between the multiplicand and the multiplier is output. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了简化产品运算单元和乘积和运算单元的配置，并且在包括这些单元的整个电路的区域中减少乘积运算单元和乘积和运算单元的占用面积。解决方案：当对应于被乘数的脉冲宽度Ti的单个电压脉冲被输入到具有端子A，B的电阻变化型可变电阻器元件1的端子A和与之相对应的脉冲频率Fi的电压脉冲串时向终端B输入乘法器，输出与乘法器和乘法器之间的乘积运算结果对应的根据Fi，Ti的PWM（脉宽调制）信号。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2008177249A Bonding pad for semiconductor integrated circuit, manufacturing method for the bonding pad, semiconductor integrated circuit, and electronic equipment 审中-公开
标题翻译：用于半导体集成电路的接合焊盘，用于接合焊盘，半导体集成电路和电子设备的制造方法
公开(公告)号：JP2008177249A
公开(公告)日：2008-07-31
申请号：JP2007007492
申请日：2007-01-16
申请人： Sharp Corp , シャープ株式会社
发明人： ISHIHARA KAZUYA , AWAYA NOBUYOSHI
IPC分类号： H01L21/3205 , H01L21/60 , H01L23/52
CPC分类号： H01L24/05 , H01L24/03 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05006 , H01L2224/05093 , H01L2224/05095 , H01L2224/05096 , H01L2224/05558 , H01L2224/05567 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/451 , H01L2924/00014 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/05042 , H01L2924/14 , H01L2224/48 , H01L2224/05552
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable bonding pad for a semiconductor integrated circuit which ensures the flatness of the surface of the pad, allows conduction of a sufficient amount of current, and shows less conduction failure on an opening path interconnecting metal wiring layers.
SOLUTION: The bonding pad 10 for the semiconductor integrated circuit includes the opening path P interconnecting the metal wiring layers. The opening path P is composed of a latticed pattern of opening portions having at least two different opening widths consisting of one opening width necessary for filling the opening path and another opening width larger than one opening width.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种高可靠性的用于半导体集成电路的焊盘，其确保焊盘表面的平坦度，允许传导足够量的电流，并且在互连的开口路径上显示较少的导通故障金属布线层。解决方案：用于半导体集成电路的焊盘10包括互连金属布线层的开口路径P. 开口路径P由具有至少两个不同开口宽度的开口部分的网格图案组成，该开口宽度由填充开口路径所需的一个开口宽度和大于一个开口宽度的另一开口宽度组成。版权所有（C）2008，JPO＆INPIT

9. 发明专利

JP2007180202A Variable resistance element and its manufacturing method, and semiconductor memory device provided therewith 有权
标题翻译：可变电阻元件及其制造方法及其提供的半导体存储器件
公开(公告)号：JP2007180202A
公开(公告)日：2007-07-12
申请号：JP2005375852
申请日：2005-12-27
申请人： Sharp Corp , シャープ株式会社
发明人： ISHIHARA KAZUYA , HOSOI YASUNARI , KOBAYASHI SHINJI
IPC分类号： H01L27/10 , G11C13/00
CPC分类号： H01L27/101 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/1625 , H01L45/1633 , Y10T29/49082
摘要： PROBLEM TO BE SOLVED: To provide a variable resistance element having good resistance value maintenance behavior as well as capable of stable resistance switching operation. SOLUTION: The variable resistance element comprises a variable resistor 2 in a region sandwiched by an upper electrode 1 and a lower electrode 3. The variable resistor 2 consists of titanium oxide or acid titanium oxynitride of 30 nm or less of diameter of a crystal grain. When depositing the variable resistor 2 particularly, an anatase type crystal of 30 nm or less of diameter of a crystal grain is formed by maintaining the condition of substrate temperature in the range of 150-500°C. In a resistive element such as the variable resistor 2 with this composition, when applying a voltage pulse, the resistance value varies according to the change of the crystal state of the variable resistor. Therefore, a forming process is unnecessary so that the resistance switching operation can be stabilized, and also there is little resistance change even if the switching operations are repeated a many times. Furthermore, it has an excellent effect that the resistance value change is small even if it is kept under high temperature for a long period of time. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供具有良好的电阻值维护行为以及能够稳定的电阻切换操作的可变电阻元件。解决方案：可变电阻元件包括由上电极1和下电极3夹在的区域中的可变电阻器2.可变电阻器2由直径为30nm或更小的氧化钛或氮氧化钛组成晶粒。当特别地沉积可变电阻器2时，通过将衬底温度的条件保持在150-500℃的范围内，形成晶粒直径为30nm以下的锐钛矿型晶体。在具有该组成的诸如可变电阻器2的电阻元件中，当施加电压脉冲时，电阻值根据可变电阻器的晶体状态的变化而变化。因此，不需要形成处理，使得电阻切换操作能够稳定，并且即使重复多次开关操作，电阻变化也很小。此外，即使长期保持在高温下，电阻值的变化也很小。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2015031856A 光学フィルター有权
标题翻译：光学过滤器
公开(公告)号：JP2015031856A
公开(公告)日：2015-02-16
申请号：JP2013162111
申请日：2013-08-05
申请人：シャープ株式会社 , Sharp Corp
发明人： NAKANO TAKASHI , NAGURA MITSURU , ISHIHARA KAZUYA , AWAYA NOBUYOSHI , KASHU KAZUHIRO , TAKIMOTO TAKAHIRO , UCHIDA MASAYO
IPC分类号： G02B5/20
CPC分类号： G02B5/203 , G02B5/008 , G02B5/204
摘要：【課題】実用可能な程度にまで波長選択性を向上させた光学フィルターを提供することである。【解決手段】光学フィルター10は、所定波長の光を透過する光学フィルター10であって、基板11と、基板11上に形成された第1導電材料薄膜12と、第1導電材料薄膜12を貫通し、所定波長未満の周期で配置された開口部16と、少なくとも一部が開口部16に間隔を有して対向する第2導電材料薄膜14と、を備えた構成とする。【選択図】図2
摘要翻译：要解决的问题：提供一种滤波器，其中波长选择性提高到可行的程度。解决方案：滤光器10透射预定波长的光，并且被配置为包括基板11，形成的第一导电材料薄膜12 在基板11上，穿过第一导电材料薄膜12并且布置在小于预定波长的周期内的开口16以及在给定距离处至少部分地与开口16相对的第二导电材料薄膜14 。

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