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1. 发明公开

EP3409639A1 METHOD FOR RECESS ETCHING IN MICROMECHANICAL DEVICES 有权
公开(公告)号：EP3409639A1
公开(公告)日：2018-12-05
申请号：EP18174480.6
申请日：2018-05-28
申请人： Murata Manufacturing Co., Ltd.
发明人： FUJII, Hidetoshi
IPC分类号： B81C1/00
CPC分类号： B81C1/00619 , B81B2201/0235 , B81B2201/0242 , B81C1/00587 , B81C2201/0112 , B81C2201/0132 , B81C2201/0133 , B81C2201/0142 , B81C2201/0198 , B81C2201/053
摘要： The disclosure relates to a method for manufacturing recessed micromechanical structures in a MEMS device wafer. First vertical trenches in the device wafer define the horizontal dimensions of both level and recessed structures. The horizontal face of the device wafer and the vertical sidewalls of the first vertical trenches are then covered with a self-supporting etching mask which is made of a self-supporting mask material, which is sufficiently rigid to remain standing vertically in the location where it was deposited even as the sidewall upon which it was deposited is etched away. Recess trenches are then etched under the protection of the self-supporting mask. The method allows a spike-preventing aggressive etch to be used for forming the recess trenches, without harming the sidewalls in the first vertical trenches.

2. 发明公开

EP1800334A4 METHOD OF REMOVING POLYMER COATING FROM AN ETCHED TRENCH 审中-公开
标题翻译：方法用于去除聚合物涂层从蚀刻DIG
公开(公告)号：EP1800334A4
公开(公告)日：2012-07-04
申请号：EP05789502
申请日：2005-10-04
申请人： SILVERBROOK RES PTY LTD
发明人： MCREYNOLDS DARRELL LARUE , SILVERBROOK KIA
IPC分类号： H01L21/3065 , B41J2/14 , B41J2/16 , B81C1/00 , H01L21/02 , H01L21/308
CPC分类号： H01L21/02057 , B41J2/1412 , B41J2/1601 , B41J2/1623 , B41J2/1628 , B41J2/1631 , B41J2/164 , B81B2201/052 , B81B2203/033 , B81C1/00849 , B81C2201/0112 , B81C2201/0132

3. 发明公开

EP0943155A1 VERFAHREN ZUM ANISOTROPEN ÄTZEN VON SILIZIUM 有权
标题翻译：方法各向异性腐蚀硅的
公开(公告)号：EP0943155A1
公开(公告)日：1999-09-22
申请号：EP98948810.0
申请日：1998-08-19
申请人： ROBERT BOSCH GMBH
发明人： LÄRMER, Franz , SCHILP, Andrea
IPC分类号： H01L21 , B81C1
CPC分类号： B81C1/00619 , B81C2201/0112 , H01L21/30655
摘要： The invention relates to a method for anisotropic etching of microstructures and nanostructures in silicon substrates by means of alternating consecutive independently controlled etching stages and stages in which polymer is deposited, whereby the amount of polymer deposited is reduced in the course of the deposit stages, thereby avoiding undercutting of the microstructures and nanostructures.

4. 发明公开

EP3356288A1 MEMS GRID FOR MANIPULATING STRUCTURAL PARAMETERS OF MEMS DEVICES 有权
公开(公告)号：EP3356288A1
公开(公告)日：2018-08-08
申请号：EP16852584.8
申请日：2016-09-29
申请人： Mems Drive Inc.
发明人： GUTIERREZ, Roman , TANG, Tony , LIU, Xiaolei , WANG, Guiqin , NG, Matthew
IPC分类号： B81B7/04 , B81B5/00 , B81B3/00
CPC分类号： H01L21/76816 , B81B3/0045 , B81B7/0029 , B81B2203/0353 , B81C1/00674 , B81C1/00682 , B81C2201/0112 , B81C2201/0135 , H01L21/768 , H01L21/76898 , H01L23/485 , H01L2924/00 , H01L2924/00014 , H01L2924/0002 , H01L2924/1461 , H01L2924/181
摘要： A system and method for manipulating the structural characteristics of a MEMS device include etching a plurality of holes into the surface of a MEMS device, wherein the plurality of holes comprise one or more geometric shapes determined to provide specific structural characteristics desired in the MEMS device.

5. 发明公开

EP2924000A4 SUBSTRATE ETCHING METHOD 有权转让
标题翻译： SUBSTRATÄTZVERFAHREN
公开(公告)号：EP2924000A4
公开(公告)日：2016-07-06
申请号：EP13857651
申请日：2013-11-01
申请人： BEIJING NMC CO LTD
发明人： JIANG ZHONGWEI
IPC分类号： B81C1/00
CPC分类号： H01L21/32137 , B81C1/00531 , B81C2201/0112 , B81C2201/0132 , H01L21/30655

6. 发明公开

EP2334589A1 ROBUST HIGH ASPECT RATIO SEMICONDUCTOR DEVICE 有权
标题翻译：稳健半导体元件宽高比HIGH
公开(公告)号：EP2334589A1
公开(公告)日：2011-06-22
申请号：EP09787279.0
申请日：2009-09-24
申请人： NXP B.V.
发明人： ROOZEBOOM, Freddy , GOOSSENS, Martijn , BESLING, Willem Frederik Adrianus , VERHAEGH, Nynke
IPC分类号： B81B1/00 , B81C99/00 , H01L29/41 , H01L31/0224
CPC分类号： H01L29/41 , B81B3/007 , B81B2201/06 , B81C1/00619 , B81C2201/0112 , B81C2201/0132 , H01L28/91
摘要： The invention relates to an semiconductor device comprising a first surface and neighboring first and second electric elements arranged on the first surface, in which each of the first and second elements extends from the first surface in a first direction, the first element having a cross section substantially perpendicular to the first direction and a sidewall surface extending at least partially in the first direction, wherein the sidewall surface comprises a first section and a second section adjoining the first section along a line extending substantially parallel to the first direction, wherein the first and second sections are placed at an angle with respect to each other for providing an inner corner wherein the sidewall surface at the inner corner is, at least partially, arranged at a constant distance R from a facing part of the second element for providing a mechanical reinforcement structure at the inner corner.

7. 发明授权

EP1099244B1 METHOD FOR ANISOTROPIC ETCHING 有权
标题翻译：程序对各向异性刻蚀
公开(公告)号：EP1099244B1
公开(公告)日：2007-01-24
申请号：EP99934921.0
申请日：1999-07-23
申请人： SURFACE TECHNOLOGY SYSTEMS PLC
发明人： BHARDWAJ, Jyoti, Kiron
IPC分类号： H01L21/306 , H01L21/311 , H01L21/3213
CPC分类号： B81C1/00619 , B01J12/007 , B01J19/2445 , B01J2219/00038 , B01J2219/0004 , B01J2219/00058 , B01J2219/00162 , B01J2219/0809 , B01J2219/0841 , B01J2219/0869 , B01J2219/0871 , B01J2219/0894 , B81C2201/0112 , C01B7/24 , C07C17/00 , H01L21/30621 , H01L21/30655 , H01L21/31116 , H01L21/31138 , H01L21/32135 , H01L21/32136
摘要： There is disclosed a method of treating a substrate material or a film present on the material surface comprising cyclically performing the following steps: (a) etching the material or film; (b) depositing or forming a passivation layer on the surfaces of an etched feature; and (c) selectively removing the passivation layer from the etched feature in order that the etching proceeds in a direction substantially perpendicular to the material or film surface. At least one of the steps (a) or (b) is performed in the absence of a plasma. Also disclosed is an apparatus for performing the method.

8. 发明授权

EP0683921B1 MICROSTRUCTURES AND SINGLE MASK, SINGLE-CRYSTAL PROCESS FOR FABRICATION THEREOF 失效
标题翻译：微结构和EINZELMASK，单晶制造方法
公开(公告)号：EP0683921B1
公开(公告)日：2004-06-16
申请号：EP94903348.4
申请日：1993-12-03
申请人： CORNELL RESEARCH FOUNDATION, INC.
发明人： SHAW, Kevin, A. , ZHANG, Z., Lisa , MACDONALD, Noel, C.
IPC分类号： H01L21/44 , H01L21/449 , H01L21/302 , H01L23/48 , H01L29/06 , H01L29/86 , H01L29/84 , H01L29/96
CPC分类号： B81C1/00619 , B81C1/00142 , B81C1/0015 , B81C1/00626 , B81C2201/0112 , B81C2201/0132 , B81C2201/053 , G01P15/0802 , G01P15/125 , G01P2015/0814 , G01P2015/0817 , G01P2015/0828 , Y10S73/01 , Y10S148/05
摘要： The invention provides a single mask, low temperature reactive ion etching process for fabricating high aspect ratio, released single crystal microelectromechanical structures independent of crystal orientation. A dielectric mask (12) on a single-crystal substrate (154) is patterned to define isolating trenches. A protective conformal layer (28) is applied to the resultant structure. The conformal layer (28) on the floor of the trenches is removed and a second etch deepens the trench to expose the mesa walls which are removed during the release step by isotropic etching. A metal layer (44) is formed on the resultant structure providing opposed plates (156) and (158) of a capacitor. The cantilever beam (52) with the supporting end wall (152) extends the grid-like structure (150) into the protection of the deepened isolation trenches (54). A membrane can be added to the released structures to increase their weight for use in accelerometers, and polished for use as movable mirrors.

9. 发明公开

EP3294664A1 A MULTI-LEVEL MICROMECHANICAL STRUCTURE 审中-实审
公开(公告)号：EP3294664A1
公开(公告)日：2018-03-21
申请号：EP16725234
申请日：2016-05-09
申请人： MURATA MANUFACTURING CO
发明人： IIHOLA ANTTI , TORKKELI ALTTI , RYTKOENEN VILLE PEKKA , LIUKKU MATTI
IPC分类号： B81B3/00
CPC分类号： B81B3/0021 , B81B3/0094 , B81B2201/0235 , B81B2201/0242 , B81B2203/0136 , B81B2203/04 , B81C1/00357 , B81C2201/0112 , B81C2201/0132
摘要： The present invention relates to a micromechanical device comprising a multi-layer micromechanical structure including only homogenous silicon material. The device layer comprises at least a rotor and at least two stators. At least some of the rotor and at least two stators are at least partially recessed to at least two different depths of recession from a first surface of the device layer and at least some of the rotor and at least two stators are at least partially recessed to at least two different depths of recession from a second surface of the device layer.

10. 发明公开

EP2829512A1 Reactive ion etching 有权
标题翻译： ReaktivesIonenätzen
公开(公告)号：EP2829512A1
公开(公告)日：2015-01-28
申请号：EP14177859.7
申请日：2014-07-21
申请人： Atlantic Inertial Systems Limited
发明人： Hawke, Tracey , Venables, Mark , Sturland, Ian , Eley, Rebecka
IPC分类号： B81C1/00
CPC分类号： B81C1/00531 , B81B3/0064 , B81B2201/033 , B81B2203/033 , B81C1/00388 , B81C1/00619 , B81C2201/0112 , H01L21/3065 , H01L21/308
摘要： A method of reactive ion etching a substrate 46 to form at least a first and a second etched feature (42, 44) is disclosed. The first etched feature (42) has a greater aspect ratio (depth:width) than the second etched feature (44). In a first etching stage the substrate (46) is etched so as to etch only said first feature (42) to a predetermined depth. Thereafter in a second etching stage, the substrate (46) is etched so as to etch both said first and said second features (42, 44) to a respective depth. A mask (40) may be applied to define apertures corresponding in shape to the features (42, 44). The region of the substrate (46) in which the second etched feature (44) is to be produced is selectively masked with a second maskant (50) during the first etching stage. The second maskant (50) is then removed prior to the second etching stage.
摘要翻译：公开了一种反应离子蚀刻衬底46以形成至少第一和第二蚀刻特征（42,44）的方法。第一蚀刻特征（42）具有比第二蚀刻特征（44）更大的纵横比（深度：宽度）。在第一蚀刻阶段中，蚀刻衬底（46）以仅将所述第一特征（42）仅蚀刻到预定深度。此后，在第二蚀刻阶段中，蚀刻衬底（46）以便将所述第一和第二特征（42,44）都蚀刻到相应的深度。可以施加掩模（40）以限定形状对应于特征（42,44）的孔。在第一蚀刻阶段期间，用第二掩模（50）选择性地掩蔽其中要产生第二蚀刻特征（44）的衬底（46）的区域。然后在第二蚀刻阶段之前去除第二掩模（50）。

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