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1. 发明授权

EP1079425B1 Procédé et dispositif pour le traitement de substrat sous vide par plasma. 有权
标题翻译：用于等离子真空衬底处理的方法和设备
公开(公告)号：EP1079425B1
公开(公告)日：2018-03-07
申请号：EP00402191.1
申请日：2000-07-31
申请人： Tegal Corporation
发明人： Puech, Michel
IPC分类号： H01L21/3065 , H01L21/3213
CPC分类号： H01J37/32449 , H01J37/3244 , H01L21/30655 , H01L21/32136

2. 发明授权

EP2595180B1 ETCHING METHOD 有权转让
标题翻译：蚀刻方法
公开(公告)号：EP2595180B1
公开(公告)日：2017-09-06
申请号：EP11806739.6
申请日：2011-07-11
申请人： SPP Technologies Co., Ltd.
发明人： OISHI, Akimitsu , MURAKAMI, Shoichi
IPC分类号： H01L21/3065 , H01L29/16
CPC分类号： H01L21/30655 , H01L29/1608

3. 发明授权

EP2820670B1 A METHOD FOR DEPOSITING AND/OR ETCHING MATERIAL ON A SUBSTRATE 有权
标题翻译：一种在基材上沉积和/或蚀刻材料的方法
公开(公告)号：EP2820670B1
公开(公告)日：2017-08-02
申请号：EP13709983.4
申请日：2013-02-27
申请人： Oxford Instruments Nanotechnology Tools Limited
发明人： MCNIE, Mark Edward , COOKE, Michael Joseph , LEA, LeslieMichael
IPC分类号： H01L21/3213 , H01L21/3065
CPC分类号： H01J37/32926 , C23C16/50 , C23C16/52 , G05B19/418 , G05B2219/34198 , H01J37/32449 , H01J37/32816 , H01J37/32834 , H01J37/32917 , H01J2237/24564 , H01J2237/24585 , H01J2237/248 , H01J2237/3321 , H01J2237/334 , H01L21/306 , H01L21/30655 , H01L22/12 , H01L22/26

4. 发明公开

EP3067919A1 Method for forming vertical structures in a semiconductor target layer 审中-公开
标题翻译：韦尔法罕zur Herstellung von vertikalen Strekturen在einer Halbleiterzielschicht
公开(公告)号：EP3067919A1
公开(公告)日：2016-09-14
申请号：EP15158703.7
申请日：2015-03-11
申请人： IMEC VZW
发明人： Milenin, Alexey , Witters, Liesbeth
IPC分类号： H01L21/3065
CPC分类号： H01L21/3065 , H01L21/30655
摘要： Method for forming vertical structures in a semiconductor target layer comprising at least one element selected from the group consisting of Si and Ge, the said method comprising the steps of a) Providing a patterned hard mask layer on the semiconductor target layer; b) Dry plasma etching of the semiconductor target layer through said patterned hard mask, thereby forming said vertical structures. The said dry plasma etching comprises at least the steps of II. Halogen, with or without 02, based plasma etching or Fluorocarbon based plasma etching, III. Fluorocarbon based plasma etching when the step II. is a halogen based plasma etching or halogen based plasma etching when the step II. is a fluorocarbon based plasma etching, when the halogen based plasma etching is performed without 02, a step of 02 and/or N2 based passivation, step I. is performed before the plasma etching step II.
摘要翻译：一种在半导体目标层中形成垂直结构的方法，包括从由Si和Ge组成的组中选择的至少一种元素，所述方法包括以下步骤：a）在半导体靶层上提供图案化的硬掩模层; b）通过所述图案化的硬掩模干燥等离子体蚀刻半导体靶层，从而形成所述垂直结构。所述干等离子体蚀刻至少包括以下步骤：II。卤素，有或没有O2，基于等离子体蚀刻或基于氟碳的等离子体蚀刻，III。基于氟碳的等离子体蚀刻步骤II。是基于卤素等离子体蚀刻或卤素等离子体蚀刻时的步骤II。是基于碳氟化合物的等离子体蚀刻，当在不进行氧化物的情况下进行卤素等离子体蚀刻时，在等离子体蚀刻步骤II之前执行步骤I 2和/或N 2的钝化步骤I.

5. 发明公开

EP3012857A1 Method of producing an opening with smooth vertical sidewall in a semiconductor substrate 审中-公开
标题翻译：一种用于制造在半导体衬底中具有光滑垂直侧壁中的开口的过程
公开(公告)号：EP3012857A1
公开(公告)日：2016-04-27
申请号：EP14189757.9
申请日：2014-10-21
申请人： ams AG
发明人： Koppitsch, Günther , Löffler, Bernhard
IPC分类号： H01L21/3065
CPC分类号： H01L21/76898 , H01L21/3065 , H01L21/30655 , H01L23/481
摘要： An opening (17) is etched from a main surface (10) of a substrate (1) of semiconductor material by deep reactive ion etching comprising a plurality of cycles, each of the cycles including a deposition of a passivation in the opening and an application of an etchant. An additional etching is performed between two consecutive cycles by an application of a further etchant that is different from the etchant. The passivation layer (9) is thus etched above a sidewall (7) of the opening to remove undesired protrusions.
摘要翻译：的开口（17）由半导体材料构成的基板（1）通过深反应离子蚀刻，包括周期的复数，的一个主表面（10）被蚀刻每个包括钝化的在开口和上应用的沉积循环的的蚀刻剂。一个额外的蚀刻两个连续周期之间通过在另外的蚀刻剂执行的应用确实是从蚀刻剂不同。钝化层（9）因此，上述的侧壁蚀刻的开口（7），以除去不期望的突出。

6. 发明公开

EP2939260A2 METHOD FOR PREPARING SAMPLES FOR IMAGING 审中-公开
标题翻译：制备法成像样品的
公开(公告)号：EP2939260A2
公开(公告)日：2015-11-04
申请号：EP13867351.2
申请日：2013-12-30
申请人： FEI Company
发明人： SCHMIDT, Michael , BLACKWOOD, Jeffrey , STONE, Stacey , LEE, Sang, Hoon , KELLEY, Ronald , LANDIN, Trevan
IPC分类号： H01L21/205
CPC分类号： G01N1/32 , G01N1/28 , H01L21/30655
摘要： A method and apparatus is provided for preparing samples for observation in a charged particle beam system in a manner that reduces or prevents artifacts. An ion beam mills exposes a cross section of the work piece using a bulk mill process. A deposition precursor gas is directed to the sample surface while a small amount of material is removed from the exposed cross section face, the deposition precursor producing a more uniform cross section. Embodiments are useful for preparing cross sections for SEM observation of samples having layers of materials of different hardnesses. Embodiments are useful for preparation of thin TEM samples.

7. 发明公开

EP2685489A1 DEVICE FOR ESTIMATING AND SIMULATING SHAPE WORKED BY PLASMA PROCESS, AND SIMULATION METHOD AND PROGRAM 审中-公开
标题翻译：设备估算和模拟通过等离子体过程中产生的形式和模拟方法及程序
公开(公告)号：EP2685489A1
公开(公告)日：2014-01-15
申请号：EP12754266.0
申请日：2012-02-29
申请人： Mizuho Information & Research Institute Inc.
发明人： ONO Kohei , IWASAKI Takuya
IPC分类号： H01L21/3065
CPC分类号： G06F17/5009 , H01L21/30655
摘要： A method and a program for predicting a processing shape by a plasma process, the method including: a conditions-setting step (STEP 11) for setting conditions relevant to an object to be processed, process conditions including a cycle number provided that an etching process and a deposition process are taken as one cycle, and conditions relevant to simulation; an etching process surface transition amount calculating step (STEP 12) for calculating a surface transition amount by plasma etching based on etching process conditions; and a deposition process surface transition amount calculating step (STEP 13) for calculating a surface transition amount by plasma deposition based on deposition process conditions, wherein the etching process surface transition amount calculating step (STEP 12) and the deposition process surface transition amount calculating step (STEP 13) are repeated for the cycle number set in the conditions-setting step (STEP 11), thereby obtaining a processing shape by the the Bosch process.

8. 发明公开

EP2539930A2 METHOD OF FORMING AND PATTERNING CONFORMAL INSULATION LAYER IN VIAS AND ETCHED STRUCTURES 审中-公开
标题翻译： PROCESS FOR IN通道和蚀刻结构的制备和结构共形绝缘层的
公开(公告)号：EP2539930A2
公开(公告)日：2013-01-02
申请号：EP11713021.1
申请日：2011-02-24
申请人： SPP Process Technology Systems UK Limited
发明人： DITIZIO, Robert
IPC分类号： H01L21/768 , B81B1/00
CPC分类号： H01L21/76898 , B81B2207/07 , B81C1/00087 , B81C2201/0112 , H01L21/02118 , H01L21/02271 , H01L21/02304 , H01L21/3065 , H01L21/30655
摘要： Vias are formed in a substrate using an etch process that forms an undercut profile below the mask layer. The vias are coated with a conformal insulating layer and an etch process is applied to the structures to remove the insulating layer from horizontal surfaces while leaving the insulating layers on the vertical sidewalls of the vias. The top regions of the vias are protected during the etchback process by the undercut hardmask.

9. 发明公开

EP2466627A1 ETCHING METHOD 审中-公开
标题翻译： ÄTZVERFAHREN
公开(公告)号：EP2466627A1
公开(公告)日：2012-06-20
申请号：EP10808085.4
申请日：2010-08-12
申请人： Ulvac, Inc.
发明人： MORIKAWA, Yasuhiro , SUU, Koukou
IPC分类号： H01L21/3065
CPC分类号： H01L21/30655
摘要： There is provided an etching method which can form trenches or via holes having desired aspect ratios and shapes in a to-be-processed object made of silicon. The etching method includes: a hydrogen halide-containing gas-based etching step of etching a silicon substrate 9 by introducing a hydrogen halide-containing gas into a vacuum chamber 1; a fluorine-containing gas-based etching step of etching the silicon substrate 9 by introducing a fluorine-containing gas into the vacuum chamber 1; a protective film formation step forming a protective film on the silicon substrate 9 by sputtering a solid material 15; and a protective film removal step of removing part of the protective film by applying radio frequency bias power to a substrate electrode 8. The fluorine-containing gas-based etching step, the protective film formation step, and the protective film removal step are repeatedly performed in this order.
摘要翻译：提供了一种蚀刻方法，其可以在由硅制成的待处理物体中形成具有期望的纵横比和形状的沟槽或通孔。蚀刻方法包括：含卤化氢的气体基蚀刻步骤，通过将含卤化氢的气体引入真空室1来蚀刻硅衬底9; 含氟气体蚀刻步骤，通过向真空室1内引入含氟气体来蚀刻硅衬底9; 通过溅射固体材料15在硅衬底9上形成保护膜的保护膜形成步骤; 以及通过对基板电极8施加射频偏置功率来除去保护膜的一部分的保护膜去除步骤。重复进行含氟气体蚀刻工序，保护膜形成工序和保护膜除去工序按此顺序

10. 发明授权

EP1153425B1 PLASMAÄTZVERFAHREN MIT GEPULSTER SUBSTRATELEKTRODENLEISTUNG 有权
标题翻译：等离子刻蚀与脉冲功率电极基板
公开(公告)号：EP1153425B1
公开(公告)日：2011-06-01
申请号：EP00972618.3
申请日：2000-10-10
申请人： ROBERT BOSCH GMBH
发明人： LAERMER, Franz , SCHILP, Andrea
IPC分类号： H01L21/3065 , H01J37/32
CPC分类号： H01L21/30655 , H01J37/32082 , H01J37/32155 , H01J37/32706 , H01L21/3065
摘要： A method for etching structures in an etching substrate (18), in particular in a silicon body (18) by means of a plasma (14) with a lateral extent, which is exactly defined by means of an etching mask, is disclosed. A high frequency pulsed high frequency power is coupled with the etching substrate (18) by means of an, at least temporarily applied, high frequency alternating voltage. Said coupled high frequency pulsed high frequency power is furthermore modulated with a low frequency and, in particular, cycled. Said disclosed method opens a wide process window, for the variation of etching parameters in the plasma etching process as carried out and is particularly suitable for the etching of structures in silicon, with high mask selectivity and high etching rates, with simultaneously minimised charging effects, in particular with regard to pocket formation on dielectric boundary surfaces.

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