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1. 发明公开

EP2568658A2 Capacitive communication circuit and method therefor 审中-公开
标题翻译： Kapazitative Kommunikationsschaltung und Verfahrendafür
公开(公告)号：EP2568658A2
公开(公告)日：2013-03-13
申请号：EP12178622.2
申请日：2012-07-31
申请人： NXP B.V. , NXP B.V.
发明人： Shrestha, Rameswor , Smeets, Patrick Emanuel Gerardus
IPC分类号： H04L12/12
CPC分类号： H04B5/0012 , H04B5/0031 , H04L25/0268
摘要： Data is communicated. In accordance with one or more example embodiments, a communications circuit communicates a digital data signal using a carrier signal having a frequency that is different than the frequency of the data signal. The communications circuit includes first and second sets of capacitors, a first circuit and a second circuit. The first circuit generates mixed data signals respectively mixed with the carrier signal and an inverse of the carrier signal, generates mixed inverted data signals respectively mixed with the carrier signal and an inverse of the carrier signal, provides the mixed data signals to the first set of capacitors, and provides the mixed inverted data signals to the second set of capacitors. The second circuit recovers the data signal from the mixed signals.
摘要翻译：数据传达。根据一个或多个示例实施例，通信电路使用具有与数据信号的频率不同的频率的载波信号来传送数字数据信号。通信电路包括第一和第二组电容器，第一电路和第二电路。第一电路产生分别与载波信号和载波信号的反相混合的混合数据信号，产生分别与载波信号和载波信号的反相混合的混合反相数据信号，将混合数据信号提供给第一组电容器，并将混合的反相数据信号提供给第二组电容器。第二个电路从混合信号中恢复数据信号。

2. 发明公开

EP4455727A1 UPDATING RADAR SENSOR ACCURACY MEASUREMENTS FOR OBJECT TRACKING 审中-公开
公开(公告)号：EP4455727A1
公开(公告)日：2024-10-30
申请号：EP24165059.7
申请日：2024-03-21
申请人： NXP B.V.
发明人： Paker, Özgün , Koppelaar, Arie Geert Cornelis
IPC分类号： G01S13/42 , G01S13/50 , G01S13/66 , G01S13/87 , G01S13/931
CPC分类号： G01S13/931 , G01S13/66 , G01S13/872 , G01S13/42 , G01S13/505 , G01S2013/932720200101
摘要： A method includes producing, at a radar sensor (106,108), a plurality of radar data points based on radar signal reflections received at the radar sensor. The method further includes, for one or more respective radar data points of the plurality of radar data points, calculating at the radar sensor a data item indicative of a measurement accuracy corresponding to the respective radar data point. The radar sensor then transmits the plurality of radar data points and the data item for each respective radar data point to a central radar processor (104). The data item is used to update a covariance matrix implemented by a Kalman filter at the central radar processor during the object tracking process.

3. 发明公开

EP4451535A1 BIDIRECTIONAL POWER CONVERTER WITH PHASE LEG FAULT DETECTION FOR CHARGING A BATTERY THAT POWERS A MULTIPHASE LOAD 审中-公开
公开(公告)号：EP4451535A1
公开(公告)日：2024-10-23
申请号：EP23305583.9
申请日：2023-04-17
申请人： NXP B.V.
发明人： Santiago, Erik , Dietsch, Jérôme , Bernal Pinzon, Angela Maria , Troudi, Rami
IPC分类号： H02M1/32 , H02M7/797 , H02J7/00 , B60L53/24
CPC分类号： H02J7/0068 , H02J2207/2020200101 , H02M1/325 , H02J7/0029 , H02J2310/4820200101 , H02M1/007 , B60L53/24 , H02M7/5387 , H02M3/155
摘要： A bidirectional power converter that includes phase legs that are used for both powering a multiphase load from a battery and for charging the battery from a power source. The converter includes fault detection for detecting faults in the phase legs of the converter. In response to a detection of a fault, the converter can utilize a spare phase leg in charging the battery such as in a multiphase charging mode or in single phase charging mode.

4. 发明公开

EP4447224A1 ANTENNA PACKAGE 审中-公开
公开(公告)号：EP4447224A1
公开(公告)日：2024-10-16
申请号：EP23167315.3
申请日：2023-04-11
申请人： NXP B.V.
发明人： Acar, Mustafa , Gong, Zhiwei , Wenzel, Robert Joseph , Zhou, Tingdong
IPC分类号： H01Q1/22 , H01Q1/52 , H01Q9/04 , H01Q21/06
CPC分类号： H01Q1/2283 , H01Q1/523 , H01Q9/0414 , H01Q21/065
摘要： An antenna package and method of manufacturing an antenna package is disclosed. The antenna package includes a first substrate and second substrate in a stacked arrangement. A first plurality of patch antennas and a plurality of decoupling capacitors is arranged on a first major surface of the first substrate. One or more decoupling capacitor of the plurality of decoupling capacitors is located between adjacent patch antennas of the first plurality of patch antennas. The second substrate includes a second plurality of patch antennas. One or more decoupling capacitors of the plurality of decoupling capacitors includes a first terminal configured to be in contact with the first substrate and a second terminal configured to be in contact with the first substrate and the second substrate.

5. 发明公开

EP4443514A1 METHODS OF FABRICATING A SI BJT, AND CORRESPONDING DEVICES 审中-公开
公开(公告)号：EP4443514A1
公开(公告)日：2024-10-09
申请号：EP23166308.9
申请日：2023-04-03
申请人： NXP B.V.
发明人： Huang, Chih Fan , Donkers, Johannes Josephus Theodorus Marinus
IPC分类号： H01L29/10 , H01L29/66 , H01L29/732 , H01L21/8222 , H01L27/082
CPC分类号： H01L29/732 , H01L29/7322 , H01L29/66272 , H01L29/1004 , H01L27/0825 , H01L21/8222
摘要： A method of manufacturing a Si BJT device is disclosed comprising prior processing steps; formation of a protective oxide layer over an active area of the Si BJT device; deposition of a dielectric layer, and a layer stack comprising SiGe, on the protective oxide; etching the dielectric layer, and the layer stack comprising SiGe, thereby removing them from the active area of the Si BJT; deposition of a polysilicon layer, and a further dielectric layer, across the device; etching the polysilicon base, and the further dielectric layer thereby removing it from the active area; implanting, through the protective oxide layer, a p-type dopant into the active area; etching the protective oxide layer, thereby removing it, and leaving voids under the dielectric layer; thermally treating the Si BJT device, thereby filling in voids under the polysilicon base; and subsequent processing steps. Corresponding devices are also disclosed.

6. 发明公开

EP4443334A1 DEEP NEURAL NETWORK MODEL COMPRESSION 审中-公开
公开(公告)号：EP4443334A1
公开(公告)日：2024-10-09
申请号：EP24155066.4
申请日：2024-01-31
申请人： NXP B.V.
发明人： Chen, Xupeng , Ravindran, Satish , Wu, Ryan Haoyun
IPC分类号： G06N3/045 , G06N3/0495 , G06N3/082 , G06N3/084
CPC分类号： G06N3/082 , G06N3/084 , G06N3/0495 , G06N3/0464
摘要： Various embodiments relate to a system and method of pruning a machine learning model, including: training the machine learning model using training input data; calculating alpha values for different parts of the machine learning model based on gradients used in training the machine learning model wherein the alpha values are an importance metric; accumulating the calculated alpha values across training iterations; and pruning the machine learning model based upon the accumulated alpha values.

7. 发明公开

EP4435446A1 SCAN WRAPPER CIRCUIT AND WRAPPER CELLS 审中-公开
公开(公告)号：EP4435446A1
公开(公告)日：2024-09-25
申请号：EP24164532.4
申请日：2024-03-19
申请人： NXP B.V.
发明人： Makkar, Shikhar , Gupta, Chandan
IPC分类号： G01R31/3185 , G06F30/333
CPC分类号： G01R31/318563 , G01R31/318572 , G01R31/318558 , G01R31/318513 , G01R31/318547 , G01R31/318544 , G01R31/318533 , G06F30/333
摘要： An apparatus (110) and method (200) are provided for scan testing a system-on-chip (SoC) integrated circuit having first and second partitions coupled together across one or more inter-partition circuits, each of which includes a decompressor; a compactor; an INTEST scan chain and an EXTEST scan chain coupled in parallel between the decompressor circuit and compactor circuit; and digital test control access hardware connected between the decompressor circuit and each INTEST scan chain and configured to selectively disable each INTEST scan chain while each EXTEST scan chain continues to operate in response to a partition EXTEST mode signal having a first predetermined value.

8. 发明公开

EP4431972A1 CASCADED RADAR SYSTEM WITH MITIGATION OF VEHICLE REFLECTION 审中-公开
公开(公告)号：EP4431972A1
公开(公告)日：2024-09-18
申请号：EP23305354.5
申请日：2023-03-16
申请人： NXP B.V.
发明人： Pavao Moreira, Cristian , Orlando, Julien
IPC分类号： G01S7/03 , G01S13/87 , G01S13/931 , G01S7/02 , G01S7/40 , G01S13/00 , G01S13/34
CPC分类号： G01S7/032 , G01S13/003 , G01S13/87 , G01S13/931 , G01S7/0232 , G01S7/0235 , G01S13/343 , G01S7/4008 , G01S7/038
摘要： A system and method for processing radar signals is presented. A first transmitted radar signal is transmitted by a first transmitter using a first local oscillator signal having a first frequency. The first transmitter is coupled to a structure of a vehicle. A first received radar signal is received using a first receiver. The first received radar signal is processed using a second local oscillator signal having a second frequency to generate a processed radar signal. The second frequency is offset from the first frequency by a predetermined offset value. An output signal is generated by executing a fast Fourier transform on the processed radar signal to generate a frequency-domain output signal.

9. 发明公开

EP4422071A2 CIRCUIT WITH A LATCH HAVING SETS OF INVERTERS 审中-实审
公开(公告)号：EP4422071A2
公开(公告)日：2024-08-28
申请号：EP24163581.2
申请日：2024-03-14
申请人： NXP B.V. , University Of Twente
发明人： Cents, Remon Bernardus Antonius , Ponte, Jeroen , Bindra, Harijot Singh , Nauta, Bram
IPC分类号： H03K3/356
CPC分类号： H03K3/356104
摘要： A latch includes two outputs and two inputs where the outputs latch complementary values indicative of voltages at the latch inputs. The latch includes two sets of one or more inverters. For each set of inverters, the signal input of the first in series inverter is connected to a latch input and the output of the last in series inverter is connected to a latch output. The first in series inverters for each set of one or more inverters has a signal input connected to one latch input and a supply voltage input configured to be biased by the other latch input. During a reset phase, the latch outputs are configured to be set to the same output value state. During a latching phase, the latch outputs are configured to be latched at complementary output value states. In some embodiments, the latch is used in a comparison circuit.

10. 发明公开

EP4418149A1 CONVOLUTION LAYER PROCESSOR AND METHOD 审中-公开
公开(公告)号：EP4418149A1
公开(公告)日：2024-08-21
申请号：EP23205301.7
申请日：2023-10-23
申请人： NXP B.V.
发明人： Fuks, Adam , Kimelman, Paul , Mindru, Iancu Ciprian , Peterson, Fred William , Avram, Andrei-Alexandru , Despotovici, Mihai
IPC分类号： G06F17/15 , G06N3/0464 , G06N3/063
CPC分类号： G06F17/153 , G06N3/0464 , G06N3/063
摘要： The disclosure relates to a convolution layer processor for a neural network accelerator and to a method of operating a convolution layer processor. Example embodiments include a convolution layer processor (500) for a neural network accelerator, comprising: a memory access module (501) configured to access elements of an input feature map comprising a first array of pixels from a memory (508); and a plurality of convolution modules (3140-x), each convolution module configured to receive an element of the input feature map from the memory access module (501) and perform a convolution operation on the received element of the input feature map with a convolution kernel comprising a second array of pixels to provide a corresponding element of an output feature map, the memory access module (501) comprising: a DMA requester (503) configured to request elements of the input feature map from the memory (508) via a data bus (504); a data buffer (502) configured to provide the requested elements to each of the plurality of convolution modules (3140-x); and a pad supervisor module (507) configured to provide to the data buffer (502), for each element requested by the DMA requester (503), padding pixels of the input feature map if the requested element extends beyond a boundary of the input feature map.

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