专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2004038764A3 SEMICONDUCTOR DEVICE WITH QUANTUM WELL AND ETCH STOP 审中-公开
标题翻译：具有量子阱和蚀刻停止的半导体器件
公开(公告)号：WO2004038764A3
公开(公告)日：2004-07-15
申请号：PCT/US0333829
申请日：2003-10-23
申请人： UNIV CONNECTICUT , OPEL INC
发明人： TAYLOR GEOFF W , DUNCAN SCOTT W
IPC分类号： H01L21/331 , H01L21/335 , H01L27/06 , H01L29/15 , H01L29/737 , H01L29/80 , H01L33/00
CPC分类号： H01L29/66318 , H01L27/0605 , H01L29/155 , H01L29/66462 , H01L29/7371 , H01L29/802
摘要： A semiconductor device includes a series of layers formed on a substrate (10), the layers including a first plurality of layers including an n-type ohmic contact layer (14), a p-type modulation doped quantum well structure (20), an n-type modulation doped quantum well structure (24), and a fourth plurality of layers including a p-type ohmic contact layer (30). Etch stop layers (16 and 28a) are used to form contacts to the n-type ohmic contact layer and contacts to the n-type modulation doped quantum well structure. Thin capping layers are also provided to protect certain layers from oxidation. Preferably, each such etch stop layer is made sufficiently thin to permit current tunneling therethrough during operation of optoelectronic/electronic devices realized from this structure (including heterojunction thyristor devices, n-channel HFET devices, p-channel HFET devices, p-type quantum-well-base bipolar transistor devices, and n-type quantum-well-base bipolar transistor devices).
摘要翻译：半导体器件包括在衬底（10）上形成的一系列层，所述层包括包括n型欧姆接触层（14），p型掺杂掺杂量子阱结构（20）的第一多个层， n型调制掺杂量子阱结构（24）和包括p型欧姆接触层（30）的第四多层。蚀刻停止层（16和28a）用于形成与n型欧姆接触层的接触并与n型调制掺杂量子阱结构接触。还提供薄盖层以保护某些层免于氧化。优选地，每个这样的蚀刻停止层被制成足够薄以允许在从该结构实现的光电子/电子器件的操作期间电流隧穿（包括异质结晶闸管器件，n沟道HFET器件，p沟道HFET器件，p型量子阱器件，基极双极晶体管器件和n型量子阱基双极晶体管器件）。

2. 发明申请

WO2004038764A8 SEMICONDUCTOR DEVICE WITH QUANTUM WELL AND ETCH STOP 审中-公开
标题翻译：具有量子阱和蚀刻停止的半导体器件
公开(公告)号：WO2004038764A8
公开(公告)日：2005-07-07
申请号：PCT/US0333829
申请日：2003-10-23
申请人： UNIV CONNECTICUT , OPEL INC
发明人： TAYLOR GEOFF W , DUNCAN SCOTT W
IPC分类号： H01L21/331 , H01L21/335 , H01L27/06 , H01L29/15 , H01L29/737 , H01L29/80 , H01L33/00
CPC分类号： H01L29/66318 , H01L27/0605 , H01L29/155 , H01L29/66462 , H01L29/7371 , H01L29/802
摘要： A semiconductor device includes a series of layers formed on a substrate (10), the layers including a first plurality of layers including an n-type ohmic contact layer (14), a p-type modulation doped quantum well structure (20), an n-type modulation doped quantum well structure (24), and a fourth plurality of layers including a p-type ohmic contact layer (30). Etch stop layers (16 and 28a) are used to form contacts to the n-type ohmic contact layer and contacts to the n-type modulation doped quantum well structure. Thin capping layers are also provided to protect certain layers from oxidation. Preferably, each such etch stop layer is made sufficiently thin to permit current tunneling therethrough during operation of optoelectronic/electronic devices realized from this structure (including heterojunction thyristor devices, n-channel HFET devices, p-channel HFET devices, p-type quantum-well-base bipolar transistor devices, and n-type quantum-well-base bipolar transistor devices).
摘要翻译：半导体器件包括在衬底（10）上形成的一系列层，所述层包括包括n型欧姆接触层（14），p型掺杂掺杂量子阱结构（20）的第一多个层， n型调制掺杂量子阱结构（24）和包括p型欧姆接触层（30）的第四多层。蚀刻停止层（16和28a）用于形成与n型欧姆接触层的接触并与n型调制掺杂量子阱结构接触。还提供薄盖层以保护某些层免于氧化。优选地，每个这样的蚀刻停止层被制成足够薄以允许在从该结构实现的光电子/电子器件的操作期间电流穿透其中（包括异质结晶闸管器件，n沟道HFET器件，p沟道HFET器件，p型量子阱器件，基极双极晶体管器件和n型量子阱基双极晶体管器件）。

3. 发明申请

WO2004038765A3 OPTOELECTRONIC CLOCK GENERATOR AND OTHER OPTOELECTRONIC DEVICES AND SYSTEMS EMPLOYING AT LEAST ONE HETEROJUNCTION THYRISTOR DEVICE 审中-公开
标题翻译：光电时钟发生器和采用至少一个异构电路设备的其他光电设备和系统
公开(公告)号：WO2004038765A3
公开(公告)日：2004-09-10
申请号：PCT/US0333830
申请日：2003-10-23
申请人： UNIV CONNECTICUT , OPEL INC
发明人： DEHMUBED ROHINTON , TAYLOR GEOFF W , UPP DANIEL C , CAI JIANHONG
IPC分类号： H01L21/331 , H01L21/335 , H01L29/15 , H01L29/80 , H03K3/42 , H03K17/79 , H03M1/66 , H03M1/74 , H03M1/80 , H01S5/30
CPC分类号： H01L29/66318 , H01L29/155 , H01L29/66462 , H01L29/802 , H03K3/42 , H03K17/79 , H03M1/667 , H03M1/74 , H03M1/808
摘要： An optoelectronic device is provided that includes a thyristor detector/emitter device (16) having an input port (29) and an output port (27). The thyristor detector/emitter device (16) is adapted to detect an input optical pulse (15) supplied to the input port (29) and to produce an output optical pulse (12) (via laser emission) and an output electrical pulse (14) in response to the detected input optical pulse (15). The output optical pulse (12) is output via the output port (27). An optical feedback path is operably coupled between the output port (27) and the input port (29) of the thyristor detector/emitter device (16). The optical feedback path supplies a portion of the output optical pulse (12) produced by the thyristor detector/emitter device (16) to the input port (29), thereby causing the thyristor detector/emitter device (16) to produce a sequence of output optical pulses (12) and a corresponding sequence of output electrical pulses (14). Preferably, the optical feedback path comprises a programmable optical delay line realized by a network of in-plane waveguide structures and directional coupler devices (26-1 - 26-M) that are integrally formed with the thyristor device structure of the detector/emitter device (16). Other optoelectronic devices are realized with the thyristor detector/emitter (16).
摘要翻译：提供了一种光电子器件，其包括具有输入端口（29）和输出端口（27）的晶闸管检测器/发射器件（16）。晶闸管检测器/发射器件（16）适于检测提供给输入端口（29）的输入光脉冲（15）并产生输出光脉冲（12）（经由激光发射）和输出电脉冲（14 ）响应于检测到的输入光脉冲（15）。输出光脉冲（12）经由输出端口（27）输出。光学反馈路径可操作地耦合在输出端口（27）和晶闸管检测器/发射器件（16）的输入端口（29）之间。光学反馈路径将由晶闸管检测器/发射器件（16）产生的输出光脉冲（12）的一部分提供给输入端口（29），从而使晶闸管检测器/发射器件（16）产生一系列输出光脉冲（12）和相应的输出电脉冲序列（14）。优选地，光学反馈路径包括由面内波导结构的网络和定向耦合器件（26-1-26-M）实现的可编程光学延迟线，其与检测器/发射器件的晶闸管器件结构整体形成（16）。其他光电子器件由晶闸管检测器/发射极（16）实现。

4. 发明申请

WO2005010951A2 SEMICONDUCTOR LASER ARRAY DEVICE EMPLOYING MODULATION DOPED QUANTUM WELL STRUCTURES 审中-公开
标题翻译：半导体激光阵列器件采用调制量子阱结构
公开(公告)号：WO2005010951A2
公开(公告)日：2005-02-03
申请号：PCT/US2004024031
申请日：2004-07-26
申请人： UNIV CONNECTICUT , OPEL INC
发明人： TAYLOR GEOFF W , DUNCAN SCOTT
IPC分类号： H01S5/183 , H01S5/40 , H01S5/42 , H01L
CPC分类号： H01S5/423 , B82Y20/00 , G02F1/01716 , G02F2201/346 , H01L27/15 , H01S5/06203 , H01S5/18313 , H01S5/18341 , H01S5/18358 , H01S5/18369 , H01S5/3086 , H01S5/4087
摘要： An optoelectronic integrated circuit comprises a substrate, a multilayer structure formed on the substrate, and an array of thyristor devices and corresponding resonant cavities formed in the multilayer structure. The resonant cavities, which are adapted to process different wavelengths of light, are formed by selectively removing portions of said multilayer structure to provide said resonant cavities with different vertical dimensions that correspond to the different wavelengths. Preferably, that portion of the multilayer structure that is selectively removed to provide the multiple wavelengths includes a periodic substructure formed by repeating pairs of an undoped spacer layer and an undoped etch stop layer. The multilayer structure may be formed from group III-V materials. In this case, the undoped spacer layer and undoped etch stop layer of the periodic substructure preferably comprises undoped GaAs and undoped AlAs, respectively. The undoped AlAs functions as an etch stop during etching by a chlorine-based gas mixture that includes fluorine. The array of multi-wavelength thyristor devices may be used to realize devices that provide a variety of optoelectronic functions, such as an array of thyristor-based lasers that emit light at different wavelengths and/or an array of thyristor-based detectors that detect light at different wavelengths (e.g., for wavelength-division-multiplexing applications).
摘要翻译：光电集成电路包括基板，形成在基板上的多层结构，以及在多层结构中形成的晶闸管器件阵列和相应的谐振腔。适于处理不同波长的光的谐振腔通过选择性地去除所述多层结构的部分以提供对应于不同波长的不同垂直尺寸的所述谐振腔来形成。优选地，选择性地去除以提供多个波长的多层结构的该部分包括通过重复未掺杂的间隔层和未掺杂的蚀刻停止层的对而形成的周期性子结构。多层结构可以由III-V族材料形成。在这种情况下，周期性亚结构的未掺杂的间隔层和未掺杂的蚀刻停止层优选分别包括未掺杂的GaAs和未掺杂的AlAs。未掺杂的AlAs在通过包含氟的氯基气体混合物蚀刻期间用作蚀刻停止。多波长晶闸管器件的阵列可用于实现提供各种光电子功能的器件，例如发射不同波长的光的晶闸管激光器阵列和/或检测光的基于晶闸管的检测器的阵列在不同的波长（例如，用于波分复用应用）。

5. 发明申请

WO2005041263A3 IMAGING ARRAY UTILIZING THYRISTOR-BASED PIXEL ELEMENTS 审中-公开
标题翻译：使用基于晶体管的像素元件的成像阵列
公开(公告)号：WO2005041263A3
公开(公告)日：2009-06-18
申请号：PCT/US2004034733
申请日：2004-10-20
申请人： UNIV CONNECTICUT , OPEL INC
发明人： TAYLOR GEOFF W
IPC分类号： H01L29/06 , H01L20060101 , H01L27/146 , H01L27/148 , H01L31/0304 , H01L31/0352
CPC分类号： H01L31/1113 , B82Y20/00 , H01L27/14652 , H01L27/14806 , H01L27/14812 , H01L29/7373 , H01L29/7783 , H01L31/0304 , H01L31/035236 , H04N5/335 , Y02E10/544
摘要： An improved imaging array (and corresponding method of operation) includes a plurality of heteroj unction thyristor-based pixel elements (101 A.101 B) disposed within resonant cavities formed on a substrate. Each thyristor-based pixel element includes complementary n-type (113) and p-type (11 1) modulation doped quantum well interfaces (122) that are spaced apart from one another. Incident radiation within a predetermined wavelength resonates within the cavity of a given pixel element for absorption therein that causes charge accumulation. The accumulated charge is related to the intensity of the incident radiation. The heteroj unction-thyristor-based pixel element is suitable for many imaging applications, including CCD-based imaging arrays and active-pixel imaging arrays.
摘要翻译：改进的成像阵列（和相应的操作方法）包括设置在形成在基底上的谐振腔内的多个异质结晶闸管的像素元件（101A101B）。每个基于晶闸管的像素元件包括彼此间隔开的互补n型（113）和p型（11 1）调制掺杂量子阱接口（122）。在预定波长内的入射辐射在给定的像素元件的空腔内谐振，用于吸收其中的电荷积累。累积电荷与入射辐射强度有关。基于异质晶闸管的像素元件适用于许多成像应用，包括基于CCD的成像阵列和有源像素成像阵列。

6. 发明申请

WO2004068727A3 INTERFERENCE CANCELLATION SYSTEM EMPLOYING PHOTONIC SIGMA DELTA MODULATION AND OPTICAL TRUE TIME DELAY 审中-公开
标题翻译：干涉消除系统采用光子信号调制和光时域延迟
公开(公告)号：WO2004068727A3
公开(公告)日：2005-04-14
申请号：PCT/US2004002494
申请日：2004-01-29
申请人： UNIV CONNECTICUT , OPEL INC
发明人： TAYLOR GEOFF W , CAI JIANHONG , UPP DANIEL C
IPC分类号： H01Q1/52 , H03M3/02 , H04B1/52 , H04B15/00 , H04L25/08
CPC分类号： H01Q1/525 , H03M3/43 , H03M3/454 , H03M3/456 , H04B1/525
摘要： Interference caused by the propagation of a transmit signal transmitted from a transmit antenna (14) to a receive antenna (16) is effectively cancelled by an improved signal cancellation system (fig.1). The system includes an interference cancellation signal generator (18) that generates a time-delayed and amplitude-reduced representation of said transmit signal. A summing stage (20) is operably coupled to the interference cancellation signal generator and the receive antenna. The summing stage subtracts the time-delayed and amplitude-reduced representation of the transmit signal from a receive signal to substantially cancel the interference. The interference cancellation signal generator (18) preferably includes a novel programmable optical delay line that introduces a variable amount of optical delay to an optical signal derived from said transmit signal in addition to a thyristor-based sigma delta modulator that converts samples of the transmit signal to into a digital signal in the optical domain.
摘要翻译：通过改进的信号消除系统（图1）有效地消除了由发射天线（14）发射到接收天线（16）的发射信号的传播引起的干扰。该系统包括产生所述发射信号的时间延迟和幅度减小的表示的干扰消除信号发生器（18）。求和级（20）可操作地耦合到干扰消除信号发生器和接收天线。求和级从接收信号中减去发射信号的时间延迟和幅度减小的表示，以基本上消除干扰。干扰消除信号发生器（18）优选地包括一种新颖的可编程光学延迟线，其将可变量的光学延迟引入到从所述发射信号导出的光学信号，以及基于晶闸管的Σ-Δ调制器，其转换发射信号的样本成为光域中的数字信号。

7. 发明申请

WO2015116435A2 OPTOELECTRONIC INTEGRATED CIRCUIT 审中-公开
标题翻译：光电集成电路
公开(公告)号：WO2015116435A2
公开(公告)日：2015-08-06
申请号：PCT/US2015012033
申请日：2015-01-20
申请人： OPEL SOLAR INC , UNIV CONNECTICUT TECHNOLOGY PARTNERSHIPS & LICENSING
发明人： TAYLOR GEOFF W
IPC分类号： H01S5/042
CPC分类号： G02B6/1347 , G02B6/131 , G02B6/29338 , H01L21/8252 , H01L27/0605 , H01L27/085 , H01L27/1443 , H01L29/083 , H01L29/1066 , H01L29/15 , H01L29/36 , H01L29/66401 , H01L29/74 , H01L29/7783 , H01L31/02327 , H01L31/03046 , H01L31/035209 , H01L31/035236 , H01L31/1105 , H01L31/1113 , H01L31/1129 , H01L31/1844 , H01L33/06 , H01L33/105 , H01S5/0228 , H01S5/0421 , H01S5/0424 , H01S5/0425 , H01S5/06203 , H01S5/06226 , H01S5/0625 , H01S5/1028 , H01S5/1032 , H01S5/1042 , H01S5/1071 , H01S5/1075 , H01S5/125 , H01S5/183 , H01S5/187 , H01S5/2027 , H01S5/2063 , H01S5/2086 , H01S5/222 , H01S5/3054 , H01S5/309 , H01S5/34313
摘要： A semiconductor device employs an epitaxial layer arrangement including a first ohmic contact layer and first modulation doped quantum well structure disposed above the first ohmic contact layer. The first ohmic contact layer has a first doping type, and the first modulation doped quantum well structure has a modulation doped layer of a second doping type. At least one isolation ion implant region is provided that extends through the first ohmic contact layer. The at least one isolation ion implant region can include oxygen ions. The at least one isolation ion implant region can define a region that is substantially free of charge carriers in order to reduce a characteristic capacitance of the device. A variety of high performance transistor devices (e.g., HFET and BICFETs) and optoelectronic devices can employ this device structure. Other aspects of wavelength-tunable microresonantors and related semiconductor fabrication methodologies are also described and claimed.
摘要翻译：半导体器件采用包括设置在第一欧姆接触层上方的第一欧姆接触层和第一调制掺杂量子阱结构的外延层布置。第一欧姆接触层具有第一掺杂类型，并且第一调制掺杂量子阱结构具有第二掺杂类型的调制掺杂层。提供延伸穿过第一欧姆接触层的至少一个隔离离子注入区域。至少一个隔离离子注入区域可以包括氧离子。至少一个隔离离子注入区域可以限定基本上不含电荷载体的区域，以便减小器件的特征电容。各种高性能晶体管器件（例如，HFET和BICFET）和光电器件可以采用该器件结构。还描述和要求保护波长可调谐微谐振器和相关半导体制造方法的其它方面。

8. 发明申请

WO2014093616A4 FIBER OPTIC COUPLER ARRAY 审中-公开
标题翻译：光纤耦合器阵列
公开(公告)号：WO2014093616A4
公开(公告)日：2014-08-14
申请号：PCT/US2013074658
申请日：2013-12-12
申请人： UNIV CONNECTICUT , OPEL SOLAR INC
发明人： TAYLOR GEOFF W , ZHANG YAN
IPC分类号： G02B6/26 , G02B6/36 , G02B6/42
CPC分类号： G02B6/305 , G02B6/1228 , G02B6/14 , G02B6/421 , G02B6/423 , G02B6/4249 , G02B6/4257
摘要： An assemby includes optical fibers each having a waveguide core, a photonic integrated circuit (IC) that includes in-plane waveguides corresponding to the optical fibers, and a substrate bonded to the photonic IC with grooves that support the optical fibers. The substrate and photonic IC can have metal bumps that cooperate to provide mechanical bonding and electrical connections between the substrate and photonic IC. Portions of the optical fibers supported by the substrate grooves can define flat surfaces spaced from the optical fiber cores. The photonic IC can include passive waveguide structures with a first coupling section that interfaces to the flat surface of a corresponding optical fiber (for evanescent coupling of optical signals) and a second coupling section that interfaces to a corresponding in-plane waveguide (for adiabatic spot-size conversion of optical signals).
摘要翻译：组件包括各自具有波导芯的光纤，包括对应于光纤的面内波导的光子集成电路（IC）以及与支撑光纤的凹槽连接到光子IC的基板。衬底和光子IC可以具有金属凸块，其配合以在衬底和光子IC之间提供机械结合和电连接。由基板槽支撑的光纤的一部分可以限定与光纤芯间隔开的平坦表面。光子IC可以包括无源波导结构，其具有与对应光纤的平坦表面（用于光信号的渐逝耦合）相接合的第一耦合部分和与对应的平面波导（用于绝热光点）相连接的第二耦合部分光信号的尺寸转换）。

9. 发明申请

WO2015013118A3 THYRISTOR MEMORY CELL INTEGRATED CIRCUIT 审中-公开
公开(公告)号：WO2015013118A3
公开(公告)日：2015-11-05
申请号：PCT/US2014047128
申请日：2014-07-18
申请人： OPEL SOLAR INC , UNIV CONNECTICUT
发明人： TAYLOR GEOFF W
IPC分类号： G11C11/39
CPC分类号： G11C13/0004 , G11C11/39 , G11C13/0097 , G11C14/0045 , G11C14/009 , H01L27/2445 , H01L27/2463 , H01L45/06 , H01L45/1233
摘要： A semiconductor memory device including an array of memory cells (MC) formed on a substrate each realized from a load element an thyristor that define a switchable current path whose state represents a volatile bit value stored by the MC. At least one word line corresponding to a respective row of the array is formed on the substrate and coupled to MC current paths for the corresponding row. Bit lines corresponding to respective columns of the array are formed on the substrate and can be coupled to a modulation doped QW interface of the MC thyristors for the corresponding column. Circuitry is configured to apply electrical signal to the word line(s) to generate current that programs phase change material of the MC load elements into one of a high or low resistive state according to state of the current path of the MCs for non-volatile backup and restore purposes.
摘要翻译：一种半导体存储器件，包括形成在衬底上的存储单元阵列，每个存储单元由负载元件实现，该晶闸管限定可转换电流通路，其状态表示MC存储的易失性位值。在衬底上形成对应于阵列的相应行的至少一个字线，并耦合到用于相应行的MC电流路径。对应于阵列的各列的位线形成在衬底上，并且可以耦合到相应列的MC晶闸管的调制掺杂QW接口。电路被配置为将电信号施加到字线以产生电流，其根据用于非易失性的MC的当前路径的状态来将MC负载元件的材料相变成高电阻或低电阻状态的电流备份和还原目的。

10. 发明申请

WO2014204748A8 OPTOELECTRONIC INTEGRATED CIRCUIT 审中-公开
标题翻译：光电集成电路
公开(公告)号：WO2014204748A8
公开(公告)日：2015-02-26
申请号：PCT/US2014041920
申请日：2014-06-11
申请人： OPEL SOLAR INC , UNIV CONNECTICUT
发明人： TAYLOR GEOFF W
IPC分类号： H01L29/15
CPC分类号： H01L29/0688 , B82Y10/00 , G02B6/125 , H01L21/0259 , H01L27/144 , H01L27/15 , H01L29/0665 , H01L29/122 , H01L29/127 , H01L29/155 , H01L29/66977 , H01L29/7786 , H01L31/035218 , H01L31/035236 , H01L31/18 , H01L33/005 , H01L33/06 , H01S5/026 , H01S5/06203 , H01S5/18358 , H01S5/309 , H01S5/34 , H01S5/3412
摘要： A semiconductor device includes a substrate supporting a plurality of layers that include at least one modulation doped quantum well (QW) structure offset from a quantum dot in quantum well (QD-in-QW) structure. The modulation doped QW structure includes a charge sheet spaced from at least one QW by a spacer layer. The QD-in-QW structure has QDs embedded in one or more QWs. The QD-in-QW structure can include at least one template/emission substructure pair separated by a barrier layer, the template substructure having smaller size QDs than the emission substructure.
摘要翻译：半导体器件包括支撑多个层的衬底，其包括从量子阱（QD-in-QW）结构中的量子点偏移的至少一个调制掺杂量子阱（QW）结构。调制掺杂QW结构包括通过间隔层与至少一个QW隔开的电荷片。 QD-QW结构将QD嵌入在一个或多个QW中。 QD-QW结构可以包括由势垒层分开的至少一个模板/发射子结构对，模板子结构具有比发射子结构更小的尺寸QD。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式