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1. 发明申请

WO2010085671A1 BUTTON SENSOR 审中-公开
标题翻译：按钮传感器
公开(公告)号：WO2010085671A1
公开(公告)日：2010-07-29
申请号：PCT/US2010/021841
申请日：2010-01-22
申请人： QUALCOMM INCORPORATED , MATSUMORI, Barry, Alan , KASKOUN, Kenneth , NOWAK, Matthew , YU, Nicholas
发明人： MATSUMORI, Barry, Alan , KASKOUN, Kenneth , NOWAK, Matthew , YU, Nicholas
IPC分类号： A61B5/00
CPC分类号： A61B5/6804 , A41D2300/32 , A61B5/0006 , A61B5/0008 , A61B5/002 , A61B5/0024 , A61B5/02 , A61B5/6802 , G06F1/163 , G06F19/00 , G06F19/3418 , G08B21/0438 , Y10T29/49002
摘要： A hermetically sealed electronic closure device, or button, includes a self-renewing power source, a sensor for measuring a metric, a memory storing information, a data processing circuit for controlling operations of the device, and a transceiver for sending and receiving information. The device is a standard part of a clothing item that is inconspicuous to a wearer of the clothing item.
摘要翻译：密封电子封闭装置或按钮包括自更新电源，用于测量度量的传感器，存储信息的存储器，用于控制设备的操作的数据处理电路以及用于发送和接收信息的收发器。该装置是与服装项目的佩戴者不显眼的服装物品的标准部分。

2. 发明申请

WO2010065667A2 WIRELESS BRANDING 审中-公开
标题翻译：无线品牌
公开(公告)号：WO2010065667A2
公开(公告)日：2010-06-10
申请号：PCT/US2009/066450
申请日：2009-12-02
申请人： QUALCOMM Incorporated , KASKOUN, Kenneth , MATSUMORI, Barry , YU, Nicholas , NOWAK, Matthew
发明人： KASKOUN, Kenneth , MATSUMORI, Barry , YU, Nicholas , NOWAK, Matthew
IPC分类号： H04B7/00 , G06Q99/00
CPC分类号： G06Q30/02 , G06Q30/0185
摘要： A device wirelessly broadcasts branding information associated with a consumer product attached to the device. The branding information is sent to a receiver located remotely from the product.
摘要翻译：设备无线地广播与附接到设备的消费者产品相关联的品牌信息。品牌信息被发送到远离产品的接收器。

3. 发明申请

WO2009137286A1 3-D INTEGRATED CIRCUIT LATERAL HEAT DISSIPATION 审中-公开
标题翻译： 3-D集成电路横向散热
公开(公告)号：WO2009137286A1
公开(公告)日：2009-11-12
申请号：PCT/US2009/041780
申请日：2009-04-27
申请人： QUALCOMM INCORPORATED , KASKOUN, Kenneth , GU, Shiqun , NOWAK, Matthew, M.
发明人： KASKOUN, Kenneth , GU, Shiqun , NOWAK, Matthew, M.
IPC分类号： H01L25/065 , H01L23/367 , H01L23/373
CPC分类号： H01L25/0657 , H01L23/3677 , H01L23/3732 , H01L23/3735 , H01L2224/16145 , H01L2225/06513 , H01L2225/06589 , H01L2924/01019
摘要： By filling an air gap between tiers (31,32) of a stacked IC device with a thermally conductive material (320) heat generated at one or more locations within one of the tiers can be laterally displaced. The lateral displacement of the heat can be along the full length of the tier and the thermal materia can be electrically insulating. Through silicon-vias (331) can be constructe at certain locations to assist in heat dissipation away from thermally troubled locations (310).
摘要翻译：通过在层叠的IC器件的层（31,32）之间填充导热材料（320），在层之一内的一个或多个位置处产生的热可以横向移位。热的横向位移可以沿着层的整个长度，并且热材料可以是电绝缘的。通过硅通孔（331）可以在某些位置处构造以帮助远离热故障位置（310）的散热。

4. 发明申请

WO2010030532A1 SYSTEMS AND METHODS FOR ENABLING ESD PROTECTION ON 3-D STACKED DEVICES 审中-公开
标题翻译：用于在三维堆叠设备上实现ESD保护的系统和方法
公开(公告)号：WO2010030532A1
公开(公告)日：2010-03-18
申请号：PCT/US2009/055620
申请日：2009-09-01
申请人： QUALCOMM INCORPORATED , KASKOUN, Kenneth , GU, Shiqun , NOWAK, Matthew
发明人： KASKOUN, Kenneth , GU, Shiqun , NOWAK, Matthew
IPC分类号： H01L25/065 , H01L23/60 , H01L23/48
CPC分类号： H01L23/481 , H01L21/76898 , H01L23/60 , H01L24/06 , H01L24/16 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/13025 , H01L2224/13099 , H01L2224/14181 , H01L2224/16145 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2924/00014 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01027 , H01L2924/01033 , H01L2924/01093 , H01L2924/10253 , H01L2924/14 , H01L2924/00 , H01L2224/05552
摘要： An electrostatic discharge (ESD) protection device is fabricated in a vertical space between active layers of stacked semiconductor dies thereby utilizing space that would otherwise be used only for communication purposes. The vertical surface area of the through silicon vias (TSVs) is used for absorbing large voltages resulting from ESD events. In one embodiment, an ESD diode is created in a vertical TSV between active layers of the semiconductor dies of a stacked device. This ESD diode can be shared by circuitry on both semiconductor dies of the stack thereby saving space and reducing die area required by ESD protection circuitry.
摘要翻译：在堆叠的半导体管芯的有源层之间的垂直空间中制造静电放电（ESD）保护装置，从而利用否则将仅用于通信目的的空间。通过硅通孔（TSV）的垂直表面积用于吸收由ESD事件引起的大电压。在一个实施例中，在层叠器件的半导体管芯的有源层之间的垂直TSV中产生ESD二极管。该ESD二极管可以由堆叠的两个半导体管芯上的电路共享，从而节省了ESD保护电路所需的空间和减小管芯面积。

5. 发明申请

WO2010068872A1 VIA FIRST PLUS VIA LAST TECHNIQUE FOR IC INTERCONNECT 审中-公开
标题翻译：通过IC互连技术的最新技术
公开(公告)号：WO2010068872A1
公开(公告)日：2010-06-17
申请号：PCT/US2009/067682
申请日：2009-12-11
申请人： QUALCOMM INCORPORATED , KASKOUN, Kenneth , GU, Shiqun , SWINNEN, Bart
发明人： KASKOUN, Kenneth , GU, Shiqun , SWINNEN, Bart
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76898 , H01L23/481 , H01L2224/06181 , H01L2924/0002 , H01L2924/00
摘要： A multi-tiered IC device contains a first die including a substrate with a first and second set of vias. The first set of vias extends from one side of the substrate, and the second set of vias extend from an opposite side of the substrate. Both sets of vias are coupled together. The first set of vias are physically smaller than the second set of vias. The first set of vias are produced prior to circuitry on the die, and the second set of vias are produced after circuitry on the die. A second die having a set of interconnects is stacked relative to the first die in which the interconnects couple to the first set of vias.
摘要翻译：多层IC器件包含第一裸片，其包括具有第一组和第二组通孔的衬底。第一组通孔从衬底的一侧延伸，并且第二组通孔从衬底的相对侧延伸。两组通孔耦合在一起。第一组通孔在物理上小于第二组通孔。第一组通孔在芯片上的电路之前产生，并且第二组通孔在芯片上的电路之后产生。具有一组互连件的第二管芯相对于第一管芯堆叠，其中互连件耦合到第一组通孔。

6. 发明申请

WO2009158289A1 INTEGRATED TESTER CHIP USING DIE PACKAGING TECHNOLOGIES 审中-公开
标题翻译：集成测试芯片使用DIE包装技术
公开(公告)号：WO2009158289A1
公开(公告)日：2009-12-30
申请号：PCT/US2009/048034
申请日：2009-06-19
申请人： QUALCOMM INCORPORATED , KASKOUN, Kenneth , JHA, Sanjay, K.
发明人： KASKOUN, Kenneth , JHA, Sanjay, K.
IPC分类号： G01R31/3185 , H01L25/065
CPC分类号： G01R31/318513 , G01R31/3187 , H01L25/0652 , H01L2225/06513 , H01L2225/06541 , H01L2225/06596 , H01L2924/0002 , H01L2924/00
摘要： By constructing a universal test circuit on a tester chip, and stacking the tester chip in an IC package together with operational circuit chips to be tested, the problems inherent with external IC testing are reduced. The tester chip can be standardized across a number of different chip combinations and, if desired, pre-programmed during manufacturing for a particular package. The tester chip interfaces to other chips in the stack advantageously are standardized.
摘要翻译：通过在测试器芯片上构建通用测试电路，并将测试器芯片与待测试的操作电路芯片一起堆叠在IC封装中，降低了外部IC测试所固有的问题。测试器芯片可以跨许多不同的芯片组合进行标准化，并且如果需要，可以在针对特定封装的制造期间进行预编程。测试器芯片与堆叠中的其他芯片的接口有利地被标准化。

7. 发明申请

WO2010075331A1 EMBEDDED THROUGH SILICON STACK 3-D DIE IN A PACKAGE SUBSTRATE 审中-公开
标题翻译：通过硅包堆叠在包装基板中的三维模具
公开(公告)号：WO2010075331A1
公开(公告)日：2010-07-01
申请号：PCT/US2009/069102
申请日：2009-12-22
申请人： QUALCOMM INCORPORATED , RAY, Urmi , SWEENEY, Fifin , KASKOUN, Kenneth , GU, Shiqun , TOMS, Thomas R.
发明人： RAY, Urmi , SWEENEY, Fifin , KASKOUN, Kenneth , GU, Shiqun , TOMS, Thomas R.
IPC分类号： H01L23/538 , H01L25/065
CPC分类号： H01L25/0657 , H01L23/481 , H01L23/5383 , H01L23/5385 , H01L23/5389 , H01L25/03 , H01L2224/16225 , H01L2224/16227 , H01L2225/06513 , H01L2225/06541 , H01L2225/06568 , H01L2924/00014 , H01L2924/15311 , H01L2224/0401
摘要： An integrated circuit package has a die or die stack with through silicon vias embedded in a package substrate. A method of producing an integrated circuit package embeds at least one die with a through silicon via in a package substrate. The package substrate provides a protective cover for the die or die stack.
摘要翻译：集成电路封装具有通过硅通孔嵌入封装衬底中的管芯或管芯堆叠。一种制造集成电路封装件的方法在封装衬底中嵌入具有穿硅通孔的至少一个管芯。封装衬底提供用于管芯或管芯堆叠的保护盖。

8. 发明申请

WO2010062946A3 ANTENNA INTEGRATED IN A SEMICONDUCTOR CHIP 审中-公开
公开(公告)号：WO2010062946A3
公开(公告)日：2010-06-03
申请号：PCT/US2009/065898
申请日：2009-11-25
申请人： QUALCOMM INCORPORATED , CHANDRASEKARAN, Arvind , KASKOUN, Kenneth , GU, Shiqun
发明人： CHANDRASEKARAN, Arvind , KASKOUN, Kenneth , GU, Shiqun
IPC分类号： H01L23/58 , H01L23/66 , H01L25/065 , H01L23/48 , H01L23/64 , H01L21/02
摘要： An antenna structure is integrated in a semiconductor chip. The antenna structure is formed by at least one of: a) one or more through-silicon vias (TSVs), and b) one or more crack stop structures. In certain embodiments, the antenna structure includes an antenna element formed by the TSVs. The antenna structure may further include a directional element formed by the crack stop structure. In certain other embodiments, the antenna structure includes an antenna element formed by the crack stop structure, and the antenna structure may further include a directional element formed by the TSVs.

9. 发明申请

WO2015073447A1 METHODS, DEVICES AND SYSTEMS FOR SELF SUPPLYING SENSORS 审中-公开
标题翻译：方法，自动提供传感器的设备和系统
公开(公告)号：WO2015073447A1
公开(公告)日：2015-05-21
申请号：PCT/US2014/065056
申请日：2014-11-11
申请人： QUALCOMM INCORPORATED
发明人： TAYLOR, Kirk Steven , KASKOUN, Kenneth
IPC分类号： H02J17/00
CPC分类号： H02J50/00 , G01D11/00 , H02J17/00 , H02J50/80
摘要： Methods, systems and devices for an energy harvesting sensor are disclosed. A sensor device may include an energy harvesting element configured to harvest energy from a source of energy that is to be measured by the sensor device, and an energy storage element configured to store energy generated by the energy harvesting element. The sensor device may further include a transmitter circuit coupled to the energy storage element and configured to transmit a wireless signal when the energy stored in the energy storage element is sufficient to power a transmission of the wireless signal. The time between transmissions by the transmitter may be used by a receiver of those transmissions to calculate a measure of the quantity being used for energy harvesting.
摘要翻译：公开了用于能量收集传感器的方法，系统和装置。传感器装置可以包括能量收集元件，其被配置为从要由传感器装置测量的能量源收集能量，以及能量存储元件，其被配置为存储由能量收集元件产生的能量。传感器设备还可以包括耦合到能量存储元件并被配置为当存储在能量存储元件中的能量足以为无线信号的传输供电时发送无线信号的发射机电路。发射机的传输之间的时间可以由这些传输的接收机使用以计算用于能量采集的量的量度。

10. 发明申请

WO2017218097A1 MONOLITHIC INTEGRATED EMITTER-DETECTOR ARRAY IN A FLEXIBLE SUBSTRATE FOR BIOMETRIC SENSING 审中-公开
标题翻译：用于生物测量的柔性衬底中的单片集成辐射探测器阵列
公开(公告)号：WO2017218097A1
公开(公告)日：2017-12-21
申请号：PCT/US2017/031154
申请日：2017-05-04
申请人： QUALCOMM INCORPORATED
发明人： GU, Shiqun , NOWAK, Matthew Michael , KASKOUN, Kenneth , DANTSKER, Eugene , MARTIN, Russel Allyn
IPC分类号： A61B5/1455 , A61B5/145 , A61B5/00
CPC分类号： A61B5/02433 , A61B5/14532 , A61B5/14551 , A61B5/14552 , A61B5/681 , A61B5/6823 , A61B5/6824 , A61B5/6828 , A61B5/7278 , A61B5/742 , A61B5/7475 , A61B2560/0214 , A61B2560/0475 , A61B2562/04 , A61B2562/046 , A61B2562/164
摘要： Examples of monolithic integrated emitter-detector array in a flexible substrate for biometric sensing and associated devices and methods are disclosed. One disclosed example device includes a flexible substrate; a first array of emitters embedded in the flexible substrate, the first array of emitters configured to emit first electromagnetic (EM) signals; a first array of detectors embedded in the flexible substrate, the first array of detectors configured to detect reflections of the first EM signals; a first scanning circuit coupled to the first array of emitters, the first scanning circuit configured to selectively activate individual emitters of the first array of emitters; and a first sensing circuit coupled to individual detectors of the first array of detectors, the first sensing circuit configured to receive a detection signal from at least one of the detectors of the first array of detectors.
摘要翻译：公开了用于生物测定感测的柔性衬底中的单片集成发射极 - 检测器阵列以及相关联的装置和方法的示例。一个公开的示例装置包括柔性衬底; 嵌入所述柔性衬底中的第一发射器阵列，所述第一发射器阵列配置为发射第一电磁（EM）信号; 嵌入在所述柔性衬底中的第一检测器阵列，所述第一检测器阵列被配置为检测所述第一EM信号的反射; 耦合到所述第一发射器阵列的第一扫描电路，所述第一扫描电路被配置为选择性地激活所述第一发射器阵列的单独发射器; 以及耦合到所述第一检测器阵列的各个检测器的第一检测电路，所述第一检测电路被配置为接收来自所述第一检测器阵列的至少一个检测器的检测信号。

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