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1. 发明申请

WO2013064978A1 MICRO -ELECTRO -MECHANICAL DEVICE WITH BURIED CONDUCTIVE REGIONS, AND MANUFACTURING PROCESS THEREOF 审中-公开
标题翻译：带电导电区域的微电子机械及其制造工艺
公开(公告)号：WO2013064978A1
公开(公告)日：2013-05-10
申请号：PCT/IB2012/056021
申请日：2012-10-30
申请人： STMICROELECTRONICS S.R.L.
发明人： CAMPEDELLI, Roberto , PEZZUTO, Raffaella , LOSA, Stefano , MANTOVANI, Marco , AZPEITIA URQUIA, Mikel
IPC分类号： B81B7/00 , B81B3/00
CPC分类号： B81B7/0006 , B81B3/0086 , B81B7/007 , B81B2201/0235 , B81B2201/0242 , B81B2207/07 , B81B2207/097 , B81C1/00476 , H01L29/84
摘要： A MEMS device (17) formed by a body (2); a cavity (25), extending above the body; mobile and fixed structures (18, 19) extending above the cavity and physically connected to the body via anchoring regions (16); and electrical-connection regions (10a, 10b, 10c), extending between the body (2) and the anchoring regions (16) and electrically connected to the mobile and fixed structures. The electrical-connection regions (10a, 10b, 10c) are formed by a conductive multilayer including a first semiconductor material layer (5), a composite layer (6) of a binary compound of the semiconductor material and of a transition metal, and a second semiconductor material layer (7).
摘要翻译：由主体（2）形成的MEMS装置（17）; 在所述主体上方延伸的空腔（25）; 移动和固定结构（18,19），其延伸到空腔上方并经由锚定区域（16）物理连接到身体。以及在主体（2）和锚固区域（16）之间延伸并且电连接到移动和固定结构的电连接区域（10a，10b，10c）。电连接区域（10a，10b，10c）由包括第一半导体材料层（5），半导体材料的二元化合物和过渡金属的复合层（6）的导电性多层构成，以及第二半导体材料层（7）。

2. 发明申请

WO2013007705A1 ELECTRONIC DEVICE BASED ON A GALLIUM COMPOUND OVER A SILICON SUBSTRATE, AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：基于硅基底板上的玻璃化合物的电子器件及其制造方法
公开(公告)号：WO2013007705A1
公开(公告)日：2013-01-17
申请号：PCT/EP2012/063442
申请日：2012-07-09
申请人： STMICROELECTRONICS S.R.L. , ABAGNALE, Giovanni
发明人： ABAGNALE, Giovanni
IPC分类号： H01L29/417 , H01L21/74
CPC分类号： H01L21/743 , H01L29/2003 , H01L29/7787 , H01L29/872
摘要： An electronic device includes a silicon substrate (2) having a first side and a second side. A structural layer of gallium nitride (6) is formed over the first side of the silicon substrate and includes an active area of the electronic device. A transition layer (8) is provided between the substrate and the structural layer. The transition layer electrically and/or thermally insulated the substrate and the structural layer from one another. A via hole (20) made of a conductive material extends through the structural layer and the transition layer. The via hole is electrically and/or thermally connected to the active area of the electronic device and to the substrate.
摘要翻译：电子设备包括具有第一侧和第二侧的硅衬底（2）。在硅衬底的第一侧上形成氮化镓（6）的结构层，并且包括电子器件的有源区。在基板和结构层之间提供过渡层（8）。过渡层将衬底和结构层彼此电和/或热绝缘。由导电材料制成的通孔（20）延伸穿过结构层和过渡层。通孔与电子器件的有源区域和衬底电气和/或热连接。

3. 发明申请

WO2012156034A1 METHOD AND APPARATUS FOR MANUFACTURING LEAD FRAMES 审中-公开
标题翻译：制造引线框架的方法和装置
公开(公告)号：WO2012156034A1
公开(公告)日：2012-11-22
申请号：PCT/EP2012/001928
申请日：2012-05-04
申请人： STMICROELECTRONICS S.R.L. , CREMA, Paolo
发明人： CREMA, Paolo
IPC分类号： H01L21/48 , B41C1/14
CPC分类号： H01L24/43 , H01L21/4821 , H01L2224/43 , H01L2924/00014 , H01L2924/12042 , H01L2924/15747 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： The present invention relates to a method and an apparatus for manufacturing lead frames. According to the present invention, a coating layer (120) is formed on one or more predefined portions (A, B, C, D, E, F, G, H) of the surface (110s) of the substrate (100) of the lead frame (100) by delimiting the predefined portions (A, B, C, D, E, F, G, H) by means of screen printing. The employment of screen printing allows the obtainment of large amounts of lead frames with excellent electronic and structural properties in a quick and cost-effective way.
摘要翻译：本发明涉及一种用于制造引线框架的方法和装置。根据本发明，在基板（100）的表面（110s）的一个或多个预定部分（A，B，C，D，E，F，G，H）上形成涂层（120）通过丝网印刷限定预定部分（A，B，C，D，E，F，G，H）来引导框架（100）。丝网印刷的使用允许以快速和成本有效的方式获得具有优异的电子和结构特性的大量引线框架。

4. 发明申请

WO2012089335A1 4D DATA ULTRASOUND IMAGING SYSTEM AND CORRESPONDING CONTROL PROCESS 审中-公开
标题翻译： 4D数据超声成像系统和相应的控制过程
公开(公告)号：WO2012089335A1
公开(公告)日：2012-07-05
申请号：PCT/EP2011/006556
申请日：2011-12-23
申请人： STMICROELECTRONICS S.R.L. , RONCHI, Daniele , TERENZI, MARCO
发明人： RONCHI, Daniele , TERENZI, MARCO
IPC分类号： G01S15/89
CPC分类号： G01S15/8925 , G01S7/52023 , G01S15/8918 , G01S15/8927 , G01S15/8993
摘要： 4D data ultrasound imaging system (100) comprising a matrix (10) of transducer elements (3) suitable for transmitting and for receiving ultrasound signals, said transducer elements (3) being divided into sub-matrixes (21) suitable for receiving in a delayed way a same acoustic signal, a plurality of reception channels (22) with one of said reception channels (22) being associated with one of said transducer elements (3), a beamformer device (109) comprising a plurality of storage cells (111) arranged in re-phasing matrixes (112), each re-phasing matrix (1 12) being associated with a corresponding sub-matrix (21) with each row (Ri) associated with one of said transducer elements (3), said storage cells (111) comprising an input storage stage (In) that is selectively associated with a row (Ri) and a reading output stage (Out) that is selectively associated with a buffer (16); each storage cell (111) that belongs to a same column (Coi) has the input stage (In) that is dynamically activated in sequential times with respect to another storage cell (11 1) of the same column (Coi) for storing the same delayed acoustic signal, said storage cells (1 11) that belong to the same column (Coi) have the output stage (Out) that is simultaneously activated.
摘要翻译： 4D数据超声成像系统（100）包括适于发送和接收超声信号的换能器元件（3）的矩阵（10），所述换能器元件（3）被分成适合于以延迟的方式接收的子矩阵（21）一种相同的声信号，具有一个所述接收信道（22）的多个接收信道（22）与所述换能器元件（3）中的一个相关联，包括多个存储单元（111）的波束形成装置（109）每个重定相矩阵（112）与相应的子矩阵（21）相关联，每个行（Ri）与所述换能器元件（3）中的一个相关联，所述存储单元（111）包括选择性地与与缓冲器（16）相关联的行（Ri）和读取输出级（Out）相关联的输入存储级（In）; 属于相同列（Coi）的每个存储单元（111）具有相对于用于存储相同列（Coi）的另一存储单元（111）的连续时间动态地激活的输入级（In）延迟声信号，属于同一列（Coi）的所述存储单元（11）具有同时被激活的输出级（Out）。

5. 发明申请

WO2011151269A2 CONTROL INTEGRATED CIRCUIT FOR A POWER TRANSISTOR OF A SWITCHING CURRENT REGULATOR 审中-公开
标题翻译：用于开关电流调节器的功率晶体管的控制集成电路
公开(公告)号：WO2011151269A2
公开(公告)日：2011-12-08
申请号：PCT/EP2011/058766
申请日：2011-05-27
申请人： STMICROELECTRONICS S.R.L. , ADRAGNA, Claudio
发明人： ADRAGNA, Claudio
IPC分类号： H02M3/335 , H02M7/217
CPC分类号： H02M3/3353 , H02M3/33507 , H02M3/33523 , H02M7/2176 , H02M2001/0022
摘要： An integrated circuit controls a switch of a switching current regulator. The current regulator comprises primary and secondary windings where a first and a second current flow, respectively. The switch is adapted to initiate or interrupt the circulation of the first current in the primary winding. The control integrated circuit comprises a comparator configured to compare a first signal representative of said first current to a second signal and a divider circuit configured to generate said second signal as a ratio of a third signal, proportional to a voltage on the primary winding, with a voltage on a capacitor. The capacitor is charged by a further current controlled by the third signal when the second current is different from zero and is discharged through resistor when the value of said second current is substantially zero.
摘要翻译：集成电路控制开关电流调节器的开关。电流调节器包括分别具有第一和第二电流的初级和次级绕组。开关适于启动或中断初级绕组中的第一电流的循环。所述控制集成电路包括：比较器，被配置为将表示所述第一电流的第一信号与第二信号进行比较;以及分频器电路，其被配置为产生所述第二信号，所述比较器与所述初级绕组上的电压成正比的第三信号与电容上的电压。当第二电流不同于零时，电容器被由第三信号控制的另外的电流充电，并且当所述第二电流的值基本上为零时，通过电阻放电。

6. 发明申请

WO2011138276A3 INTEGRATED CIRCUIT FOR CONTROLLING A SWITCH OF A CURRENT PATH WITH LEADING EDGE BLANKING DEVICE OF THE CURRENT SIGNAL. 审中-公开
公开(公告)号：WO2011138276A3
公开(公告)日：2011-11-10
申请号：PCT/EP2011/056956
申请日：2011-05-02
申请人： STMICROELECTRONICS S.R.L. , SPINI, Claudio , ADRAGNA, Claudio
发明人： SPINI, Claudio , ADRAGNA, Claudio
IPC分类号： H02M3/335
摘要： An integrated control circuit of a switch is described, which is adapted to open or close a current path; said integrated circuit includes a comparator to compare a first signal with a second signal representative of the current flowing through said current path. The comparator outputs a third variable signal between a low logic level and a high logic level according to whether said second signal is lower than said first signal or vice versa; the integrated circuit has a driver to generate a signal to drive said switch in response to the third signal, and is configured to detect a spike on the leading edge of said second signal and to blank said third signal for a first blanking time period which depends on a turn-on delay of said switch and a second blanking period which depends on the duration of said spike on the leading edge of said second signal.

7. 发明申请

WO2011079883A1 TRANSMISSION CHANNEL, IN PARTICULAR FOR ULTRASOUND APPLICATIONS 审中-公开
标题翻译：传输通道，特别是超声波应用
公开(公告)号：WO2011079883A1
公开(公告)日：2011-07-07
申请号：PCT/EP2010/005932
申请日：2010-09-29
申请人： STMICROELECTRONICS S.R.L. , ROSSI, Sandro , RICOTTI, Giulio
发明人： ROSSI, Sandro , RICOTTI, Giulio
IPC分类号： H03K17/0416 , H03K17/16 , H03K17/74 , B06B1/02
CPC分类号： H03K17/74 , B06B1/0215 , H03K17/04163 , H03K17/161
摘要： A transmission channel (1) is described of the type comprising at least one high voltage buffer block (4) comprising buffer transistors (MB1, MB2, MB3, MB4) and respective buffer diodes (DB1, DB2, DB3, DB4), being inserted between respective voltage references (HVPO, HVP1, HVMO, HVM1), these buffer transistors (MB1, MB2, MB3, MB4) being also connected to a clamping block (5), in turn comprising clamping transistors (MC1, MC2) connected to at least one output terminal (HVout) of this transmission channel through diodes (DC1, DC2) connected to prevent the body diodes of the clamping transistors (MC1, MC2) from conducting. Advantageously according to the invention, the transmission channel (1) comprises at least one reset circuit (20) comprising diodes (DME1, DME2, DME3, DME4) and being inserted between circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2) of the high voltage buffer block (4) and of the clamping block (5), these circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2) being in correspondence with conduction terminals of the transistors (MB l, MB2, MB3, MB4; MC1, MC2) comprised into the high voltage buffer block (4) and into the clamping block (5).
摘要翻译：描述了包括至少一个包括缓冲晶体管（MB1，MB2，MB3，MB4）和相应的缓冲二极管（DB1，DB2，DB3，DB4）的高压缓冲块（4）的传输通道（1）在相应的电压基准（HVPO，HVP1，HVMO，HVM1）之间，这些缓冲晶体管（MB1，MB2，MB3，MB4）也连接到钳位块（5），反过来又包括钳位晶体管（MC1，MC2）所述传输通道的至少一个输出端子（HVout）通过连接的二极管（DC1，DC2），以防止钳位晶体管（MC1，MC2）的体二极管导通。有利地，根据本发明，传输通道（1）包括至少一个包括二极管（DME1，DME2，DME3，DME4）的复位电路（20），并且插入在电路节点（XME1，XME2，XME3，XME4，XC1，XC2 ）和高压缓冲块（4）和钳位块（5）的这些电路节点（XME1，XME2，XME3，XME4，XC1，XC2）与晶体管（MB1，MB2， MB3，MB4; MC1，MC2）组成高压缓冲块（4）并进入夹紧块（5）。

8. 发明申请

WO2011076910A1 MICROELECTROMECHANICAL TRANSDUCER AND CORRESPONDING ASSEMBLY PROCESS 审中-公开
标题翻译：微电子变压器及相关组件工艺
公开(公告)号：WO2011076910A1
公开(公告)日：2011-06-30
申请号：PCT/EP2010/070608
申请日：2010-12-22
申请人： STMICROELECTRONICS S.R.L. , STMICROELECTRONICS (MALTA) LTD , FORMOSA, Kevin , AZZOPARDI, Mark Anthony , CORTESE, Mario Francesco
发明人： FORMOSA, Kevin , AZZOPARDI, Mark Anthony , CORTESE, Mario Francesco
IPC分类号： H04R19/00 , B81B7/00
CPC分类号： H04R19/005 , B81B2201/0257 , B81B2207/012 , B81B2207/07 , B81B2207/093 , B81C1/0023 , B81C2203/019 , B81C2203/035 , B81C2203/0785 , B81C2203/0792 , H01L2224/05554 , H01L2224/48091 , H01L2224/48137 , H01L2224/8592 , H01L2924/10253 , H01L2924/1461 , H01L2924/16151 , H01L2924/3025 , Y10T29/49117 , H01L2924/00014 , H01L2924/00
摘要： A MEMS transducer (1) has a micromechanical sensing structure (10) and a package (46). The package (46) is provided with a substrate (45), carrying first electrical-connection elements (47), and with a lid (25), coupled to the substrate to define an internal cavity (24), in which the micromechanical sensing structure (10) is housed. The lid (25) is formed by: a cap layer (20) having a first surface (20a) and a second surface (20b), set opposite to one another, the first surface (20a) defining an external face of the package (46) and the second surface (20b) facing the substrate (45) inside the package (46); and a wall structure (21), set between the cap layer (20) and the substrate (45), and having a coupling face (21a) coupled to the substrate (45). At least a first electrical component (10, 11) is coupled to the second surface (20b) of the cap layer (20), inside the package (46), and the coupling face (21a) of the wall structure (21) carries second electrical-connection elements (30), electrically connected to the first electrical component (10, 11) and to the first electrical-connection elements (47).
摘要翻译： MEMS传感器（1）具有微机械感测结构（10）和封装（46）。封装（46）设置有承载第一电连接元件（47）的衬底（45），以及耦合到衬底以限定内部空腔（24）的盖（25），其中微机械感测结构（10）被容纳。盖（25）由以下部分形成：盖层（20），具有彼此相对设置的第一表面（20a）和第二表面（20b），所述第一表面（20a）限定包装的外表面 46）和所述第二表面（20b）面对所述衬底（45）; 以及设置在所述盖层（20）和所述基板（45）之间并且具有联接到所述基板（45）的联接面（21a）的壁结构（21）。至少第一电气部件（10,11）在封装（46）的内部联接到盖层（20）的第二表面（20b），并且壁结构（21）的联接面（21a）承载电连接到第一电气部件（10,11）和第一电连接元件（47）的第二电连接元件（30）。

9. 发明申请

WO2010076187A3 INTEGRATED ELECTRONIC DEVICE WITH TRANSCEIVING ANTENNA AND MAGNETIC INTERCONNECTION 审中-公开
公开(公告)号：WO2010076187A3
公开(公告)日：2010-07-08
申请号：PCT/EP2009/067156
申请日：2009-12-15
申请人： STMICROELECTRONICS S.R.L. , PAGANI, Alberto , GIRLANDO, Giovanni
发明人： PAGANI, Alberto , GIRLANDO, Giovanni
IPC分类号： H01L23/66 , H01L23/48 , H01L21/66 , H01L23/544 , H01L25/065
摘要： An integrated electronic device (1) having a body (9) of semiconductor material and a first antenna (3;3a) which enables magnetic or electromagnetic coupling of the integrated electronic device with a further antenna (3b,3c). The integrated electronic device (1) has a first via (4;4a- 4d;50;50a;53) of magnetic material arranged at least in part inside the body (9), which forms, in use, a communication channel between the first antenna (3;3a) and the further antenna (3b,3c).

10. 发明申请

WO2010046724A1 METHOD FOR AN IMPROVED CHECKING OF REPEATABILITY AND REPRODUCIBILITY OF A MEASURING CHAIN, IN PARTICULAR FOR THE QUALITY CONTROL BY MEANS OF THE SEMICONDUCTOR DEVICE TESTING 审中-公开
标题翻译：用于改进测量链可重复性和可重复性的方法，特别是通过半导体器件测试的质量控制
公开(公告)号：WO2010046724A1
公开(公告)日：2010-04-29
申请号：PCT/IB2008/003660
申请日：2008-10-22
申请人： STMICROELECTRONICS (GRENOBLE) SAS , STMICROELECTRONICS S.R.L. , TENUCCI, Sergio , PAGANI, Alberto , SPINETTA, Marco , RANCHOUX, Bernard
发明人： TENUCCI, Sergio , PAGANI, Alberto , SPINETTA, Marco , RANCHOUX, Bernard
IPC分类号： G05B19/418 , G01R31/28
CPC分类号： G05B19/41875 , G01R31/2894 , Y02P90/22 , Y02P90/86
摘要： The invention relates to a method for an improved checking of repeatability and reproducibility of a measuring chain, in particular for the quality control by means of the semiconductor device testing, wherein testing steps are provided for multiple and different devices to be subjected to measurement through a measuring system comprising at least one concatenation of measuring units between a testing apparatus (ATE) and each device to be subjected to measurement. Advantageously, the method comprises the following steps: checking repeatability and reproducibility of each type of unit that forms part of the measuring chain of the concatenation; then making a correlation between the various measuring chains as a whole to check repeatability and reproducibility, using a corresponding device subjected to measurement.
摘要翻译：本发明涉及一种用于改进测量链的重复性和再现性检查的方法，特别是通过半导体器件测试进行质量控制的方法，其中为多个和不同的器件提供测试步骤以通过测量系统包括测试装置（ATE）和待测量的每个装置之间的测量单元的至少一个级联。有利地，该方法包括以下步骤：检查构成级联测量链的一部分的每种类型的单元的重复性和重复性; 然后在各测量链之间进行整体的相关性，以检查重复性和再现性，使用相应的测量装置。

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