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1. 发明申请

WO2008100602A1 EMBEDDED ARCHITECTURE WITH SERIAL INTERFACE FOR TESTING FLASH MEMORIES 审中-公开
标题翻译：带有串行接口的嵌入式结构，用于测试闪存
公开(公告)号：WO2008100602A1
公开(公告)日：2008-08-21
申请号：PCT/US2008/002057
申请日：2008-02-15
申请人： ATMEL CORPORATION , REGGIORI, Riccardo , TASSAN CASER, Fabio , MARSELLA, Mirella , MARZIANI, Monica
发明人： REGGIORI, Riccardo , TASSAN CASER, Fabio , MARSELLA, Mirella , MARZIANI, Monica
IPC分类号： G11C29/12 , G11C29/32 , G11C29/00
CPC分类号： G11C29/32 , G11C16/04 , G11C29/1201 , G11C29/16 , G11C29/4401 , G11C29/789 , G11C2029/3602
摘要： A flash memory device includes a flash memory array, a set of non-volatile redundancy registers, a serial interface, and testing logic coupled to the serial interface, the testing logic configured to accept a set of serial commands from an external tester; erase the array; program the array with a test pattern; read the array and compare the results with expected results to identify errors; determine whether the errors can be repaired by substituting a redundant row or column of the array, and if so, generate redundancy information; and program the redundancy information into the non-volatile redundancy registers.
摘要翻译：闪速存储器件包括闪存阵列，一组非易失性冗余寄存器，串行接口和耦合到串行接口的测试逻辑，该测试逻辑被配置为从外部测试器接收一组串行命令; 擦除数组; 使用测试模式对阵列进行编程; 读取阵列并将结果与预期结果进行比较以识别错误; 通过替换阵列的冗余行或列来确定是否可以修复错误，如果是，则生成冗余信息; 并将冗余信息编程到非易失性冗余寄存器中。

2. 发明申请

WO2006078744A2 METHOD AND SYSTEM FOR MANAGING A SUSPEND REQUEST IN A FLASH MEMORY 审中-公开
标题翻译：用于管理闪存中的暂停请求的方法和系统
公开(公告)号：WO2006078744A2
公开(公告)日：2006-07-27
申请号：PCT/US2006/001776
申请日：2006-01-19
申请人： ATMEL CORPORATION , SURICO, Stefano , BARTOLI, Simone , MARZIANI, Monica , FIGINI, Luca
发明人： SURICO, Stefano , BARTOLI, Simone , MARZIANI, Monica , FIGINI, Luca
IPC分类号： G06F12/00
CPC分类号： G06F9/30003 , G11C2216/22
摘要： System and method for the managing of suspend requests in flash memory devices. The system includes a microcontroller performing a modify operation on a flash memory array, a memory coupled to the microcontroller and storing suspend sequence code for causing a suspension of the modify operation when executed by the microcontroller, and suspend circuitry that receives a suspend request from a user to suspend the modify operation and starts the execution of the suspend sequence code.
摘要翻译：用于管理闪存设备中的挂起请求的系统和方法。该系统包括微控制器，其对闪速存储器阵列进行修改操作，耦合到微控制器的存储器，并且存储暂停序列代码，用于当由微控制器执行时导致暂停修改操作;以及暂停从微控制器接收暂停请求的电路用户暂停修改操作并开始执行挂起序列代码。

3. 发明申请

WO2006078744A3 METHOD AND SYSTEM FOR MANAGING A SUSPEND REQUEST IN A FLASH MEMORY 审中-公开
标题翻译：用于管理闪存中的暂停请求的方法和系统
公开(公告)号：WO2006078744A3
公开(公告)日：2009-04-16
申请号：PCT/US2006001776
申请日：2006-01-19
申请人： ATMEL CORP , SURICO STEFANO , BARTOLI SIMONE , MARZIANI MONICA , FIGINI LUCA
发明人： SURICO STEFANO , BARTOLI SIMONE , MARZIANI MONICA , FIGINI LUCA
IPC分类号： G06F12/00
CPC分类号： G06F9/30003 , G11C2216/22
摘要： The system includes a microcontroller (12) performing a modify operation on a flash memory array (16), a memory (14) coupled to the microcontroller (12) and storing suspend sequence code for causing a suspension of the modify operation when executed by the microcontroller (12), and suspend circuitry (30) that receives a suspend request (22) from a user to suspend the modify operation and starts the execution of the suspend sequence code.
摘要翻译：该系统包括对闪速存储器阵列（16）执行修改操作的微控制器（12），耦合到微控制器（12）的存储器（14），并且存储暂停序列代码，用于当由微控制器（12）和挂起电路（30），其从用户接收暂停请求（22）以暂停修改操作并开始执行挂起序列码。

4. 发明申请

WO2006041730A2 METHOD AND SYSTEM FOR A PROGRAMMING APPROACH FOR A NONVOLATILE ELECTRONIC DEVICE 审中-公开
标题翻译：用于非线性电子器件的编程方法的方法和系统
公开(公告)号：WO2006041730A2
公开(公告)日：2006-04-20
申请号：PCT/US2005/035296
申请日：2005-09-30
申请人： ATMEL CORPORATION , SURICO, Stefano , BARTOLI, Simone , TASSAN CASER, Fabio , MARZIANI, Monica
发明人： SURICO, Stefano , BARTOLI, Simone , TASSAN CASER, Fabio , MARZIANI, Monica
IPC分类号： G11C16/06
CPC分类号： G11C16/3459 , G11C11/5628 , G11C16/12 , G11C16/3454 , G11C2211/5621 , G11C2211/5634
摘要： Aspects for programming a nonvolatile electronic device include performing an initial verify step of a programming algorithm with an initial type of reference voltage value, and performing one or more subsequent verify steps in the programming algorithm with a second type of reference voltage value. Further included is utilizing a read reference voltage for the initial verify step, wherein desired programming is ensured for a cell that falls out of ideal distribution.
摘要翻译：用于编程非易失性电子设备的方面包括使用初始类型的参考电压值执行编程算法的初始验证步骤，以及使用第二类型的参考电压值来执行编程算法中的一个或多个后续验证步骤。进一步包括利用读取参考电压进行初始验证步骤，其中为理想分布的单元确保期望的编程。

5. 发明申请

WO2006041730A3 METHOD AND SYSTEM FOR A PROGRAMMING APPROACH FOR A NONVOLATILE ELECTRONIC DEVICE 审中-公开
标题翻译：用于非易失性电子器件编程方法的方法和系统
公开(公告)号：WO2006041730A3
公开(公告)日：2006-08-17
申请号：PCT/US2005035296
申请日：2005-09-30
申请人： ATMEL CORP , SURICO STEFANO , BARTOLI SIMONE , TASSAN CASER FABIO , MARZIANI MONICA
发明人： SURICO STEFANO , BARTOLI SIMONE , TASSAN CASER FABIO , MARZIANI MONICA
IPC分类号： G11C16/06
CPC分类号： G11C16/3459 , G11C11/5628 , G11C16/12 , G11C16/3454 , G11C2211/5621 , G11C2211/5634
摘要： Aspects for programming a nonvolatile electronic device include performing an initial verify step of a programming algorithm with an initial type of reference voltage value, and performing one or more subsequent verify steps in the programming algorithm with a second type of reference voltage value. Further included is utilizing a read reference voltage for the initial verify step, wherein desired programming is ensured for a cell that falls out of ideal distribution.
摘要翻译：用于编程非易失性电子设备的方面包括利用初始类型的参考电压值执行编程算法的初始验证步骤，并且利用第二类型的参考电压值在编程算法中执行一个或多个后续验证步骤。进一步包括利用读取参考电压进行初始验证步骤，其中对于落在理想分布之外的单元确保期望的编程。

6. 发明申请

WO2004077439A3 AN APPARATUS AN METHOD FOR A CONFIGURABLE MIRROR FAST SENSE AMPLIFIER 审中-公开
标题翻译：一种可配置的镜像快速感测放大器的方法
公开(公告)号：WO2004077439A3
公开(公告)日：2004-12-29
申请号：PCT/US2004004729
申请日：2004-02-17
申请人： ATMEL CORP , BEDARIDA LORENZO , SACCO ANDREA , MARZIANI MONICA
发明人： BEDARIDA LORENZO , SACCO ANDREA , MARZIANI MONICA
IPC分类号： G11C7/06 , G11C7/14 , G11C16/28 , G11C11/34
CPC分类号： G11C16/28 , G11C7/062 , G11C7/14 , G11C2207/063 , G11C2207/2254
摘要： A configurable mirror sense amplifier system for flash memory having the following features. A power source generates a reference voltage. A plurality of transistors is biased at the reference voltage. The plurality of transistors is each coupled to a second transistor. Each of the plurality of transistors is also configured to provide a current for comparison with the flash memory. The reference voltage is internal, stable and independent from variations of a power supply or temperature. The plurality of transistors is in parallel with one another. A mirror transistor is coupled to the plurality of transistors. The plurality of transistors is configured so that at least one of at least one transistor is activated with a signal in order to provide the current for comparison to the flash memory. Also, the reference voltage may be modified in order to modify the current for comparison to the flash memory.
摘要翻译：一种用于闪存的可配置的镜像放大器系统，具有以下特征。电源产生参考电压。多个晶体管被偏置在参考电压。多个晶体管各自耦合到第二晶体管。多个晶体管中的每一个也被配置为提供用于与闪速存储器进行比较的电流。参考电压是内部的，稳定的，独立于电源或温度的变化。多个晶体管彼此并联。反射镜晶体管耦合到多个晶体管。多个晶体管被配置为使得至少一个晶体管中的至少一个被激活，以便提供用于与闪存相比较的电流。此外，可以修改参考电压以便修改用于与闪存存储器进行比较的电流。

7. 发明申请

WO2008045411A3 ADAPTIVE REGULATOR FOR IDLE STATE IN A CHARGE PUMP CIRCUIT OF A MEMORY DEVICE 审中-公开
标题翻译：存储器装置的电荷泵电路中的空闲状态的自适应调节器
公开(公告)号：WO2008045411A3
公开(公告)日：2008-11-20
申请号：PCT/US2007021534
申请日：2007-10-09
申请人： ATMEL CORP , PASSERINI MARCO , SIVERO STEFANO , SACCO ANDREA , MARZIANI MONICA
发明人： PASSERINI MARCO , SIVERO STEFANO , SACCO ANDREA , MARZIANI MONICA
IPC分类号： G11C5/14
CPC分类号： G11C7/02 , G11C5/145
摘要： An apparatus and method for improving the performance of an electronic device is disclosed. An idle voltage state is introduced by an adaptive voltage generator when providing or removing a high voltage signal from a line or a node in a circuit. The idle state reduces the undesirable effects of switching disturbances caused by sudden voltage changes in a line or node.
摘要翻译：公开了一种用于改进电子设备的性能的装置和方法。当从电路中的线路或节点提供或去除高电压信号时，自适应电压发生器引入空闲电压状态。空闲状态减少了由线路或节点中的突然电压变化引起的开关干扰的不良影响。

8. 发明申请

WO2008076546A3 METHOD AND DEVICE FOR MANAGING A POWER SUPPLY POWER-ON SEQUENCE 审中-公开
标题翻译：用于管理电源上电序列的方法和设备
公开(公告)号：WO2008076546A3
公开(公告)日：2008-08-14
申请号：PCT/US2007084166
申请日：2007-11-08
申请人： ATMEL CORP , FRULIO MASSIMILIANO , SURICO STEFANO , BETTINI ANDREA , MARZIANI MONICA
发明人： FRULIO MASSIMILIANO , SURICO STEFANO , BETTINI ANDREA , MARZIANI MONICA
IPC分类号： H03K19/0175
CPC分类号： G11C5/147 , G11C5/143
摘要： Many circuits require a minimum voltage supply level before proper operation may be initiated. Power-on control circuits have typically used a voltage supply level detector and have compared that level with an internal reference. The internal reference typically has a dependence on device threshold, accuracy of tracking electrical characteristics in the device, as well as temperature and processing variation. The present invention (400) incorporates a typical supply voltage detector (410) to trigger a reference voltage generator (420). The reference voltage generator (420) is a temperature and process independent supply capable of operating at low power supply levels. An output voltage level from the reference voltage generator (420) is compared with the ramping-up supply voltage. When the ramping-up supply voltage is greater than the reference voltage generator output voltage level an enable signal is produced. The enable signal signifies to system circuitry that a supply voltage level great enough to support nominal operations is present.
摘要翻译：许多电路在启动正常操作之前需要最小电压电平。上电控制电路通常使用电压电平检测器，并将其与内部参考电平进行比较。内部参考通常取决于器件阈值，跟踪器件电气特性的准确性，以及温度和工艺变化。本发明（400）包含典型电源电压检测器（410）以触发参考电压发生器（420）。参考电压发生器（420）是能够在低电源电平下工作的温度和工艺独立电源。将来自参考电压发生器（420）的输出电压电平与斜升电源电压进行比较。当斜升电源电压大于参考电压发生器输出电压电平时，产生使能信号。使能信号表示系统电路存在足够大以支持标称操作的电源电压水平。

9. 发明申请

WO2006119327A2 METHOD AND SYSTEM FOR PROGRAM PULSE GENERATION DURING PROGRAMMING OF NONVOLATILE ELECTRONIC DEVICES 审中-公开
标题翻译：非线性电子设备编程过程中的程序脉冲生成方法与系统
公开(公告)号：WO2006119327A2
公开(公告)日：2006-11-09
申请号：PCT/US2006/016902
申请日：2006-05-03
申请人： ATMEL CORPORATION , SURICO, Stefano , MARSELLA, Mirella , MARZIANI, Monica , CHINOSI, Mauro
发明人： SURICO, Stefano , MARSELLA, Mirella , MARZIANI, Monica , CHINOSI, Mauro
IPC分类号： G11C11/34
CPC分类号： G11C16/12 , G11C16/3468
摘要： Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.
摘要翻译：在非易失性电子设备的编程期间，用于编程脉冲产生的方面包括提供可配置电压序列发生器，用于在用于非易失性电子设备的编程算法的修改操作期间根据需要管理验证脉冲和脉冲验证切换，其中产生更有效的修改操作。以这种方式，可以容易地由微控制器管理的高度灵活的位序列生成，导致更短的代码长度，更快的执行时间以及在不同器件中的重用性。更具体地，引入完全兼容的电压序列生成，其可以应用于被修改的闪存单元的端子，并且允许对脉冲验证和验证脉冲切换进行有效且省时的管理。

10. 发明申请

WO2008076546A2 METHOD AND DEVICE FOR MANAGING A POWER SUPPLY POWER-ON SEQUENCE 审中-公开
标题翻译：用于管理电源供电序列的方法和设备
公开(公告)号：WO2008076546A2
公开(公告)日：2008-06-26
申请号：PCT/US2007/084166
申请日：2007-11-08
申请人： ATMEL CORPORATION , FRULIO, Massimiliano , SURICO, Stefano , BETTINI, Andrea , MARZIANI, Monica
发明人： FRULIO, Massimiliano , SURICO, Stefano , BETTINI, Andrea , MARZIANI, Monica
IPC分类号： H03L7/00
CPC分类号： G11C5/147 , G11C5/143
摘要： Many circuits require a minimum voltage supply level before proper operation may be initiated. Power-on control circuits have typically used a voltage supply level detector and have compared that level with an internal reference. The internal reference typically has a dependence on device threshold, accuracy of tracking electrical characteristics in the device, as well as temperature and processing variation. The present invention (400) incorporates a typical supply voltage detector (410) to trigger a reference voltage generator (420). The reference voltage generator (420) is a temperature and process independent supply capable of operating at low power supply levels. An output voltage level from the reference voltage generator (420) is compared with the ramping-up supply voltage. When the ramping-up supply voltage is greater than the reference voltage generator output voltage level an enable signal is produced. The enable signal signifies to system circuitry that a supply voltage level great enough to support nominal operations is present.
摘要翻译：许多电路需要最小电压供应水平才能启动适当的操作。上电控制电路通常使用电压电平检测器，并将该电平与内部参考值进行比较。内部参考通常依赖于器件阈值，器件跟踪电气特性的精度以及温度和处理变化。本发明（400）包括用于触发参考电压发生器（420）的典型电源电压检测器（410）。参考电压发生器（420）是能够以低电源电平工作的温度和处理独立电源。将来自参考电压发生器（420）的输出电压电平与升高电源电压进行比较。当升高电源电压大于参考电压发生器输出电压电平时，产生使能信号。使能信号表示系统电路，电源电压水平足以支持标称操作。

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