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21. 发明申请

WO2008013672A2 MAGNETIC AND OPTICAL ROTATING STORAGE SYSTEMS WITH AUDIO MONITORING 审中-公开
标题翻译：带音频监控的磁性和光学旋转存储系统
公开(公告)号：WO2008013672A2
公开(公告)日：2008-01-31
申请号：PCT/US2007/015796
申请日：2007-07-11
申请人： MARVELL WORLD TRADE LTD. , SUTARDJA, Sehat
发明人： SUTARDJA, Sehat
IPC分类号： G11B27/36 , G01H1/00 , G01H3/12
CPC分类号： G01H1/003 , G01H3/12 , G11B27/36 , G11B2220/20
摘要： A control system for a rotating data storage device, comprises a drive printed circuit board (PCB). A drive module is arranged on the drive PCB and at least one of processes data, stores data and controls operation of the rotating storage device. An audio monitoring module communicates with the drive module and analyzes audio signals that are based on noise generated by the rotating storage device during operation.
摘要翻译：一种用于旋转数据存储装置的控制系统，包括驱动印刷电路板（PCB）。驱动模块布置在驱动PCB上并且处理数据，存储数据和控制旋转存储设备的操作中的至少一个。音频监视模块与驱动模块进行通信并且分析基于操作期间由旋转存储设备产生的噪声的音频信号。

22. 发明申请

WO2007133647A3 ADAPTIVE STORAGE SYSTEM INCLUDING HARD DISK DRIVE WITH FLASH INTERFACE 审中-公开
公开(公告)号：WO2007133647A3
公开(公告)日：2007-11-22
申请号：PCT/US2007/011328
申请日：2007-05-10
申请人： MARVELL WORLD TRADE LTD. , SUTARDJA, Sehat , YANG, Yun
发明人： SUTARDJA, Sehat , YANG, Yun
IPC分类号： G06F1/32
摘要： A data storage system for a device including low power and high power modes comprises low power (LP) nonvolatile memory that includes a LP hard disk drive (HDD) having a non-volatile semiconductor memory interface, wherein said LP HDD communicates with said device via said non-volatile semiconductor memory interface. High power (HP) nonvolatile memory communicates with said device.

23. 发明申请

WO2015183741A1 COMMON-SOURCE POWER AMPLIFIERS 审中-公开
标题翻译：通用功率放大器
公开(公告)号：WO2015183741A1
公开(公告)日：2015-12-03
申请号：PCT/US2015/032214
申请日：2015-05-22
申请人： MARVELL WORLD TRADE LTD. , LEONG, Poh Boon , SUTARDJA, Sehat
发明人： LEONG, Poh Boon , SUTARDJA, Sehat
IPC分类号： H03F3/21 , H03F3/45 , H03F1/02
CPC分类号： H03F3/211 , H03F1/0205 , H03F1/565 , H03F3/193 , H03F3/45179 , H03F3/45183 , H03F3/45475 , H03F2200/408 , H03F2200/451 , H03F2200/513 , H03F2203/21106 , H03F2203/21139 , H03F2203/45032 , H03F2203/45134 , H03F2203/45138 , H03F2203/45481 , H03F2203/45621 , H03F2203/45731
摘要： A system (100) includes a first amplifier stage (104) and a second amplifier stage (106). The first amplifier stage (104) is configured to amplify an input signal (RF IN) and generate first output signals (V 01 , V 02 ). The first amplifier stage (104) includes a common- source differential amplifier. The common-source differential amplifier includes a plurality of metal-oxide semiconductor field- effect transistors (MOSFETs) having source terminals connected to a common potential. The second amplifier stage (106) includes a first differential amplifier (106-1) and a second differential amplifier (106-2) configured to respectively generate first and second differential outputs based on the first output signals (V 01 , V 02 ) - Each of the first and second differential amplifiers (106-1, 106-2) includes a plurality of MOSFETs having source terminals connected to the common potential via a respective balun.
摘要翻译：系统（100）包括第一放大级（104）和第二放大级（106）。第一放大器级（104）被配置为放大输入信号（RF IN）并产生第一输出信号（V01，V02）。第一放大器级（104）包括公共源差分放大器。共源差分放大器包括具有连接到公共电位的源极端子的多个金属氧化物半导体场效应晶体管（MOSFET）。第二放大级（106）包括：第一差分放大器（106-1）和第二差分放大器（106-2），被配置为基于第一输出信号（V01，V02）分别产生第一和第二差分输出第一和第二差分放大器（106-1,106-2）包括多个MOSFET，其源极端子通过相应的平衡 - 不平衡转换器连接到公共电位。

24. 发明申请

WO2014182919A1 SNUBBER CIRCUIT TO INCREASE EFFICIENCY OF POWER CONVERTERS 审中-公开
标题翻译： SNUBBER电路提高功率转换器的效率
公开(公告)号：WO2014182919A1
公开(公告)日：2014-11-13
申请号：PCT/US2014/037328
申请日：2014-05-08
申请人： MARVELL WORLD TRADE LTD. , SUTARDJA, Sehat
发明人： SUTARDJA, Sehat
IPC分类号： H02M1/34
CPC分类号： H02M1/34 , H02M2001/344 , H02M2001/346 , H02M2001/348 , Y02B70/1491
摘要： A system including a converter and a snubber circuit. The converter converts an alternating current voltage into a direct current voltage and outputs the direct current voltage across an inductance and a switch connected in series. The inductance has a center tap connected to a node, which is connected to a load. In response to the switch being turned on, a first current flows through the inductance and the switch. In response to the switch being turned off, a second current flows from the node to the load. The snubber circuit is connected across the node and a junction of the inductance and the switch. In response to the switch being turned off, the snubber circuit receives a third current from the junction, and supplies a first portion of the third current to the node. The second current and the first portion of the third current flow through the load.
摘要翻译：一种包括转换器和缓冲电路的系统。转换器将交流电压转换为直流电压，并输出跨过电感和串联连接的开关的直流电压。电感具有连接到负载的节点的中心抽头。响应于开关导通，第一电流流过电感和开关。响应于开关被关闭，第二电流从节点流向负载。缓冲电路跨越节点和电感和开关的结点连接。响应于开关断开，缓冲电路从接点接收第三电流，并将第三电流的第一部分提供给节点。第二电流和第三电流的第一部分流过负载。

25. 发明申请

WO2014026034A1 METHODS OF MAKING PACKAGES USING THIN CU FOIL SUPPORTED BY CARRIER CU FOIL 审中-公开
标题翻译：使用由运输公司支持的薄煎饼制作包装的方法
公开(公告)号：WO2014026034A1
公开(公告)日：2014-02-13
申请号：PCT/US2013/054192
申请日：2013-08-08
申请人： MARVELL WORLD TRADE LTD. , SUTARDJA, Sehat , WU, Albert , SHIN, Hyun, J.
发明人： SUTARDJA, Sehat , WU, Albert , SHIN, Hyun, J.
IPC分类号： H01L21/48 , H01L23/31
CPC分类号： H05K3/007 , H01L21/4832 , H01L21/568 , H01L23/3107 , H01L2224/32245 , H01L2224/4809 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H05K1/182 , Y10T29/49146 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： In an embodiment, there is provided a method of creating a package, the method comprising: providing an initial substrate, wherein the initial substrate comprises a carrier foil, a functional copper foil, and an interface release layer between the carrier foil and the functional copper foil; building up copper portions on the functional copper foil; attaching a chip to a first copper portion; coupling the chip to a second copper portion; encapsulating at least the chip and the copper portions with a mold; and removing the carrier foil and interface release layer.
摘要翻译：在一个实施例中，提供了一种创建封装的方法，所述方法包括：提供初始衬底，其中所述初始衬底包括载体箔，功能铜箔以及所述载体箔和所述功能性铜之间的界面剥离层挫败; 在功能铜箔上堆积铜部分; 将芯片附接到第一铜部分; 将所述芯片耦合到第二铜部分; 至少用模具封装芯片和铜部分; 并移除载体箔和界面释放层。

26. 发明申请

WO2014018538A1 METHODS AND ARRANGEMENTS RELATING TO SEMICONDUCTOR PACKAGES INCLUDING MULTI-MEMORY DIES 审中-公开
标题翻译：与包含多存储器件的半导体封装相关的方法和布置
公开(公告)号：WO2014018538A1
公开(公告)日：2014-01-30
申请号：PCT/US2013/051694
申请日：2013-07-23
申请人： MARVELL WORLD TRADE LTD. , SUTARDJA, Sehat
发明人： SUTARDJA, Sehat
IPC分类号： H01L23/00
CPC分类号： H01L23/36 , H01L21/82 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0652 , H01L25/105 , H01L2224/0401 , H01L2224/04042 , H01L2224/06155 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/73207 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/12042 , H01L2924/1434 , H01L2924/1436 , H01L2924/15311 , H01L2924/15331 , H01L2924/19107 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In an embodiment, there is provided a packaging arrangement comprising a substrate; a multi-memory die coupled to the substrate, wherein the multi-memory die comprises multiple individual memory dies, and each of the multiple individual memory dies is defined as an individual memory die within a wafer of semiconductor material during production of memory dies, and the multi-memory die is created by singulating the wafer of semiconductor material into memory dies, where at least one of the memory dies is the multi-memory die that includes the multiple individual memory dies that are still physically connected together; and a semiconductor die coupled to the multi-memory die and the substrate, wherein the semiconductor die is configured as a system on a chip, wherein at least one of the multi-memory die and the semiconductor die is attached to the substrate.
摘要翻译：在一个实施例中，提供了一种包括衬底的包装装置; 耦合到所述衬底的多存储器管芯，其中所述多存储器管芯包括多个单独存储器管芯，并且所述多个独立存储器管芯中的每一个在存储器管芯的制造期间被定义为半导体材料的晶片内的单个存储器管芯，以及多存储器管芯是通过将半导体材料的晶片分成存储器管芯而形成的，其中至少一个存储器管芯是包括仍然物理连接在一起的多个独立存储器管芯的多存储器管芯; 以及耦合到所述多存储器管芯和所述衬底的半导体管芯，其中所述半导体管芯被配置为芯片上的系统，其中所述多存储器管芯和所述半导体管芯中的至少一个附接到所述衬底。

27. 发明申请

WO2013184633A1 WIRELESS HDD WITH INTEGRATED STORAGE CONTROLLER AND WIRELESS PROCESSING 审中-公开
标题翻译：无线硬盘，集成存储控制器和无线处理
公开(公告)号：WO2013184633A1
公开(公告)日：2013-12-12
申请号：PCT/US2013/044018
申请日：2013-06-04
申请人： MARVELL WORLD TRADE LTD. , SUTARDJA, Sehat , HO, Son Hong
发明人： SUTARDJA, Sehat , HO, Son Hong
IPC分类号： G06F3/06
CPC分类号： G06F3/0604 , G06F3/0613 , G06F3/0638 , G06F3/064 , G06F3/0661 , G06F3/0674 , H04W88/02
摘要： A storage device includes a wireless interface and a processor. The wireless interface is configured to receive wireless data from a device external to the storage device. The wireless data includes at least one data packet configured according to a wireless communication protocol. The processor is configured to receive the wireless data including the at least one data packet from the wireless interface, generate a storage device data package including the wireless data, store, in a storage region of the storage device, the storage device data package including the wireless data, retrieve the storage device data package from the storage region, recover the wireless data from the storage device data package, and provide the wireless data to the wireless interface for transmission to the device external to the storage device.
摘要翻译：存储设备包括无线接口和处理器。无线接口被配置为从存储设备外部的设备接收无线数据。无线数据包括根据无线通信协议配置的至少一个数据分组。处理器被配置为从无线接口接收包括至少一个数据分组的无线数据，生成包括无线数据的存储设备数据包，存储在存储设备的存储区域中，包括存储设备数据包无线数据，从存储区域检索存储设备数据包，从存储设备数据包恢复无线数据，并将无线数据提供给无线接口以传输到存储设备外部的设备。

28. 发明申请

WO2013003324A1 METHODS AND ARRANGEMENTS RELATING TO SEMICONDUCTOR PACKAGES INCLUDING MULTI-MEMORY DIES 审中-公开
标题翻译：与包含多存储器件的半导体封装相关的方法和布置
公开(公告)号：WO2013003324A1
公开(公告)日：2013-01-03
申请号：PCT/US2012/044159
申请日：2012-06-26
申请人： MARVELL WORLD TRADE LTD. , SUTARDJA, Sehat
发明人： SUTARDJA, Sehat
IPC分类号： H01L25/065
CPC分类号： H01L24/43 , G11C5/063 , H01L23/3128 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0652 , H01L25/105 , H01L25/16 , H01L25/18 , H01L25/50 , H01L2224/02379 , H01L2224/0401 , H01L2224/04042 , H01L2224/0557 , H01L2224/06156 , H01L2224/131 , H01L2224/1403 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/43 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/49175 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06562 , H01L2225/06589 , H01L2225/1052 , H01L2225/1058 , H01L2924/00014 , H01L2924/12042 , H01L2924/1434 , H01L2924/1436 , H01L2924/15311 , H01L2924/15321 , H01L2924/014 , H01L2924/00 , H01L2924/00012 , H01L2224/05552 , H01L2224/45099 , H01L2224/05599
摘要： Embodiments provide a method comprising providing a multi-memory die that comprises multiple individual memory dies. Each of the individual memory dies is defined as an individual memory die within a wafer of semiconductor material during production of memory dies. The multi-memory die is created by singulating the wafer of semiconductor material into memory dies where at least one of the memory dies is a multi-memory die that includes multiple individual memory dies that are still physically connected together. The method further comprises coupling a semiconductor die to the multi-memory die.
摘要翻译：实施例提供了一种方法，包括提供包括多个单独存储器管芯的多存储器管芯。各个存储器管芯在存储器管芯的制造期间被定义为半导体材料晶片内的单个存储器管芯。多存储器管芯是通过将半导体材料的晶片分解成存储器管芯而形成的，其中至少一个存储器管芯是包括仍然物理连接在一起的多个独立存储器管芯的多存储器管芯。该方法还包括将半导体管芯耦合到多存储器管芯。

29. 发明申请

WO2012154720A2 METAL OXIDE METAL CAPACITOR STRUCTURES 审中-公开
标题翻译：金属氧化物金属电容器结构
公开(公告)号：WO2012154720A2
公开(公告)日：2012-11-15
申请号：PCT/US2012/036897
申请日：2012-05-08
申请人： MARVELL WORLD TRADE LTD. , SUTARDJA, Sehat
发明人： SUTARDJA, Sehat
IPC分类号： H01G4/10
CPC分类号： H01G4/10 , H01G4/005 , H01G4/228 , H01L23/5223 , H01L28/60 , H01L28/86 , H01L28/90 , H01L2924/0002 , H01L2924/00
摘要： A metal oxide metal (MOM) capacitor includes an outer conducting structure defined in a plurality of metal layers and a plurality of via layers of an integrated circuit including first opposing side walls, second opposing side walls, a cavity with first and second openings, and openings in the first opposing side walls. An inner conducting structure is defined in the plurality of metal layers and the plurality of via layers of the integrated circuit. The inner conducting structure is arranged in the cavity of the outer conducting structure and includes a body, and conducting extensions that extend from the body through the openings in the first opposing side walls. Oxide is arranged between the outer conducting structure and the inner conducting structure.
摘要翻译：金属氧化物金属（MOM）电容器包括限定在多个金属层中的外部导电结构以及包括第一相对侧壁，第二相对侧壁，具有第一和第二开口的空腔的集成电路的多个通孔层，以及在第一相对侧壁中的开口。内部导电结构限定在集成电路的多个金属层和多个通孔层中。内部导电结构被布置在外部导电结构的空腔中，并且包括主体和从主体穿过第一相对侧壁中的开口延伸的导电延伸部。氧化物布置在外部导电结构和内部导电结构之间。

30. 发明申请

WO2010132340A1 PUSH-PULL LOW-NOISE AMPLIFIER WITH AREA-EFFICIENT IMPLEMENTATION 审中-公开
标题翻译：推拉式低噪声放大器，具有高效率的实现
公开(公告)号：WO2010132340A1
公开(公告)日：2010-11-18
申请号：PCT/US2010/034200
申请日：2010-05-10
申请人： MARVELL WORLD TRADE LTD. , BRUNN, Brian , SUTARDJA, Sehat , FAN, Xiaohua , UEHARA, Gregory
发明人： BRUNN, Brian , SUTARDJA, Sehat , FAN, Xiaohua , UEHARA, Gregory
IPC分类号： H03F3/30
CPC分类号： H03F3/3001 , H03F3/45188
摘要： An amplifier integrated circuit (IC) includes a push-pull configuration including a push stage and a pull stage. A first loop of wire is configured to form a first degeneration inductance of the push stage. A second loop of wire is configured to form a first degeneration inductance of the pull stage. The first and second loops are concentric.
摘要翻译：放大器集成电路（IC）包括包括推进级和拉动级的推挽配置。导线的第一回路被配置成形成推进级的第一退化电感。电线的第二回路被配置成形成拉阶段的第一退化电感。第一和第二环是同心的。

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