专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20130159944A1 FLARE MAP CALCULATING METHOD AND RECORDING MEDIUM 有权
标题翻译： FLARE MAP计算方法和记录介质
公开(公告)号：US20130159944A1
公开(公告)日：2013-06-20
申请号：US13615691
申请日：2012-09-14
申请人： Taiga UNO , Toshiya KOTANI , Satoshi TANAKA
发明人： Taiga UNO , Toshiya KOTANI , Satoshi TANAKA
IPC分类号： G06F17/50
CPC分类号： G03F7/70941 , G03F1/70
摘要： A flare map calculating method of an embodiment calculates an optical image intensity distribution in each division region set in a pattern region. Furthermore, an average value of the optical image intensity distribution is calculated in each division region. A pattern or plural patterns, which has a pattern density corresponding to the average value, is calculated as a corresponding density pattern in each division region. Furthermore, a density map, which represents a pattern density distribution within the pattern region, is generated based on the corresponding density pattern, and a flare map representing a flare intensity distribution within the pattern region is calculated by convolution integral of the density map and a point spread function.
摘要翻译：实施例的耀斑映射计算方法计算在图案区域中设置的每个划分区域中的光学图像强度分布。此外，在每个划分区域中计算出光学图像强度分布的平均值。在每个划分区域中计算具有对应于平均值的图案密度的图案或多个图案作为相应的浓度图案。此外，基于对应的浓度模式生成表示图案区域内的图案密度分布的密度图，并且通过密度图和a的卷积积分来计算表示图案区域内的耀斑强度分布的耀斑图点扩散功能。

2. 发明申请

US20110029937A1 PATTERN EVALUATING METHOD, PATTERN GENERATING METHOD, AND COMPUTER PROGRAM PRODUCT 审中-公开
标题翻译：模式评估方法，图案生成方法和计算机程序产品
公开(公告)号：US20110029937A1
公开(公告)日：2011-02-03
申请号：US12836235
申请日：2010-07-14
申请人： Katsuyoshi KODERA , Satoshi TANAKA , Toshiya KOTANI , Shigeki NOJIMA , Soichi INOUE
发明人： Katsuyoshi KODERA , Satoshi TANAKA , Toshiya KOTANI , Shigeki NOJIMA , Soichi INOUE
IPC分类号： G06F17/50
CPC分类号： G03F7/70441
摘要： A pattern evaluating method includes generating a proximity pattern that affects a resolution performance of a circuit pattern around a lithography target pattern of the circuit pattern to be formed on the substrate, generating distribution information on a distribution of an influence degree to the resolution performance of the circuit pattern by using the lithography target pattern, calculating the influence degree to the resolution performance of the circuit pattern by the proximity pattern as a score by comparing the distribution information with the proximity pattern, and evaluating whether the proximity pattern is placed at an appropriate position in accordance with the circuit pattern based on the score.
摘要翻译：模式评估方法包括：生成接近图案，其影响围绕要形成在基板上的电路图案的光刻目标图案周围的电路图案的分辨率性能，产生关于影响程度分布的分布信息，通过使用光刻目标图案，通过将分布信息与接近图案进行比较，计算通过邻近图案作为分数的电路图案的分辨率性能的影响程度，以及评估接近图案是否位于适当位置根据电路图案的分数。

3. 发明申请

US20120054695A1 Pattern Verification Method, Pattern Verification System, Mask Manufacturing Method and Semiconductor Device Manufacturing Method 审中-公开
标题翻译：模式验证方法，模式验证系统，掩模制造方法和半导体器件制造方法
公开(公告)号：US20120054695A1
公开(公告)日：2012-03-01
申请号：US13289630
申请日：2011-11-04
申请人： Kyoko IZUHA , Shigeki NOJIMA , Toshiya KOTANI , Satoshi TANAKA
发明人： Kyoko IZUHA , Shigeki NOJIMA , Toshiya KOTANI , Satoshi TANAKA
IPC分类号： G06F17/50
CPC分类号： G03F7/70441 , G03F1/36
摘要： A pattern verification method comprising preparing a desired pattern and a mask pattern forming the desired pattern on a substrate, defining at least one evaluation point on an edge of the desired pattern, defining at least one process parameter to compute the transferred/formed pattern, defining a reference value and a variable range for each of the process parameters, computing a positional displacement for each first points corresponding to the evaluation point, first points computed using correction mask pattern and a plurality of combinations of parameter values obtained by varying the process parameters within the variable range or within the respective variable ranges, the positional displacement being displacement between first point and the evaluation point, computing a statistics of the positional displacements for each of the evaluation points, and outputting information modifying the mask pattern according to the statistics.
摘要翻译：一种图案验证方法，包括在衬底上制备期望图案和形成期望图案的掩模图案，在期望图案的边缘上限定至少一个评估点，限定至少一个工艺参数以计算所转印/形成的图案，定义对于每个过程参数的参考值和可变范围，计算与评估点相对应的每个第一点的位置位移，使用校正掩模图案计算的第一点和通过改变其中的处理参数而获得的参数值的多个组合可变范围或在各个可变范围内，位置偏移是第一点和评估点之间的位移，计算每个评估点的位置偏移的统计，以及根据统计信息输出修改掩模图案的信息。

4. 发明申请

US20100159709A1 MASK PATTERN CORRECTING METHOD, MASK PATTERN INSPECTING METHOD, PHOTO MASK MANUFACTURING METHOD, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
标题翻译：掩模图像校正方法，掩模图案检查方法，照相胶片制造方法和半导体器件制造方法
公开(公告)号：US20100159709A1
公开(公告)日：2010-06-24
申请号：US12717914
申请日：2010-03-04
申请人： Toshiya KOTANI , Satoshi Tanaka , Shigeki Nojima , Koji Hashimoto , Soichi Inoue
发明人： Toshiya KOTANI , Satoshi Tanaka , Shigeki Nojima , Koji Hashimoto , Soichi Inoue
IPC分类号： H01L21/302 , G03F1/00
CPC分类号： G06F17/5068 , G03F1/36
摘要： A pattern correcting method for correcting a design pattern to form a desired pattern on a wafer is disclosed, which comprises defining an allowable dimensional change quantity of each of design patterns, defining a pattern correction condition for the each design pattern based on the allowable dimensional change quantity defined for the each design pattern, and correcting the each design pattern based on the pattern correction condition defined for the each design pattern.
摘要翻译：公开了一种用于校正在晶片上形成期望图案的设计图案的图案校正方法，其包括限定每个设计图案的允许尺寸变化量，基于允许的尺寸变化来定义每个设计图案的图案校正条件并且基于为每个设计图案定义的图案校正条件来校正每个设计图案。

5. 发明申请

US20080250381A1 PARAMETER ADJUSTMENT METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND RECORDING MEDIUM 有权
标题翻译：参数调整方法，半导体器件制造方法和记录介质
公开(公告)号：US20080250381A1
公开(公告)日：2008-10-09
申请号：US12062859
申请日：2008-04-04
申请人： Toshiya KOTANI , Yasunobu Kai , Soichi Inoue , Satoshi Tanaka , Shigeki Nojima , Kazuyuki Masukawa , Koji Hashimoto
发明人： Toshiya KOTANI , Yasunobu Kai , Soichi Inoue , Satoshi Tanaka , Shigeki Nojima , Kazuyuki Masukawa , Koji Hashimoto
IPC分类号： G06F17/50
CPC分类号： G03F7/70625 , G03F7/70525 , H01L22/12 , H01L22/20 , H01L2924/0002 , H01L2924/00
摘要： A parameter adjustment method for a plurality of manufacturing devices to form a pattern of a semiconductor device on a substrate using the manufacturing devices includes: adjusting a parameter adjustable for a manufacturing device serving as a reference manufacturing device so as to fall within a range of a predetermined permissible variation and defining the adjusted parameter as a reference parameter of the reference manufacturing device; obtaining a first shape of a pattern of a semiconductor device to be formed on a substrate using the reference manufacturing device from a mask to form the pattern on the substrate when the reference parameter is set to the reference manufacturing device and defining the obtained first shape as a reference finished shape; defining an adjustable parameter of another to-be-adjusted manufacturing device as a to-be-adjusted parameter of the to-be-adjusted manufacturing device; obtaining a second shape of the pattern formed on the substrate using the to-be-adjusted manufacturing device from the mask when the defined to-be-adjusted parameter is set to the to-be-adjusted manufacturing device and defining the obtained second shape as a to-be-adjusted finished shape; calculating a difference amount between the reference finished shape and the to-be-adjusted finished shape; repeatedly calculating the difference amount by changing the to-be-adjusted parameter until the difference amount becomes equal to or less than a predetermined reference value; outputting as a parameter of the to-be-adjusted manufacturing device the to-be-adjusted parameter having the difference amount equal to or less than the predetermined reference value or the to-be-adjusted parameter having the difference amount which becomes equal to or less than the predetermined reference value through the repeated calculation.
摘要翻译：用于使用该制造装置在基板上形成半导体器件的图案的多个制造装置的参数调整方法包括：调整作为参考制造装置的制造装置可调节的参数，使其落在预定的允许变化并将调整参数定义为参考制造装置的参考参数; 使用参考制造装置从掩模获得要在基板上形成的半导体器件的图案的第一形状，以在将参考参数设置为参考制造装置并将所获得的第一形状定义为参考完成形状; 将另一个待调节制造装置的可调参数定义为待调整制造装置的待调整参数; 当将所述规定的待调整参数设定为所述待调节制造装置并且将所获得的第二形状定义为所述第二形状时，从所述掩模获得使用所述待调节制造装置在所述基板上形成的所述图案的第二形状一个待调整的成品形状; 计算参考完成形状和待调整完成形状之间的差值; 通过改变待调整参数重复计算差值，直到差值变得等于或小于预定参考值; 作为待调整制造装置的参数输出具有等于或小于预定参考值的差值的待调整参数或具有等于或等于或等于或等于通过重复计算小于预定的参考值。

6. 发明申请

US20110065028A1 PATTERN GENERATING METHOD, MANUFACTURING METHOD OF MASK, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 审中-公开
标题翻译：图案生成方法，掩模制造方法和半导体器件的制造方法
公开(公告)号：US20110065028A1
公开(公告)日：2011-03-17
申请号：US12874756
申请日：2010-09-02
申请人： Katsuyoshi KODERA , Satoshi TANAKA , Toshiya KOTANI , Soichi INOUE
发明人： Katsuyoshi KODERA , Satoshi TANAKA , Toshiya KOTANI , Soichi INOUE
IPC分类号： G03F1/00 , G03F7/20
CPC分类号： G03F1/36
摘要： According to the embodiments, each of a main pattern of a mask to be transferred onto a substrate by using a lithography process, a first assist pattern that improves a resolution of an on-substrate pattern obtained by transferring the main pattern onto the substrate, and a second assist pattern that suppresses a transfer property of the first assist pattern onto the substrate is placed as a mask pattern.
摘要翻译：根据实施例，通过使用光刻工艺将要转印到基板上的掩模的主图案，提高通过将主图案转印到基板上而获得的基板上图案的分辨率的第一辅助图案，以及将第一辅助图案的转印特性抑制在基板上的第二辅助图案作为掩模图案。

7. 发明申请

US20080301621A1 MASK PATTERN CORRECTING METHOD 有权
标题翻译：掩模图校正方法
公开(公告)号：US20080301621A1
公开(公告)日：2008-12-04
申请号：US12129167
申请日：2008-05-29
申请人： Kazuya FUKUHARA , Tatsuhiko HIGASHIKI , Toshiya KOTANI , Satoshi TANAKA , Takashi SATO , Akiko MIMOTOGI , Masaki SATAKE
发明人： Kazuya FUKUHARA , Tatsuhiko HIGASHIKI , Toshiya KOTANI , Satoshi TANAKA , Takashi SATO , Akiko MIMOTOGI , Masaki SATAKE
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： In a model-based OPC which makes a suitable mask correction for each mask pattern using an optical image intensity simulator, a mask pattern is divided into subregions and the model of optical image intensity simulation is changed according to the contents of the pattern in each subregion. When the minimum dimensions of the mask pattern are smaller than a specific threshold value set near the exposure wavelength, the region is calculated using a high-accuracy model and the other regions are calculated using a high-speed model.
摘要翻译：在基于模型的OPC中，使用光学图像强度模拟器对每个掩模图案进行适当的掩模校正，将掩模图案划分为子区域，并且根据每个子区域中的图案的内容来改变光学图像强度模拟模型。当掩模图案的最小尺寸小于在曝光波长附近设置的特定阈值时，使用高精度模型计算该区域，并且使用高速模型计算其它区域。

8. 发明申请

US20120184109A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND COMPUTER READABLE MEDIUM FOR STORING PATTERN SIZE SETTING PROGRAM 有权
标题翻译：制造半导体器件的方法和用于存储图案尺寸设置程序的计算机可读介质
公开(公告)号：US20120184109A1
公开(公告)日：2012-07-19
申请号：US13397750
申请日：2012-02-16
申请人： Hiromitsu MASHITA , Toshiya KOTANI , Fumiharu NAKAJIMA , Takafumi TAGUCHI , Chikaaki KODAMA
发明人： Hiromitsu MASHITA , Toshiya KOTANI , Fumiharu NAKAJIMA , Takafumi TAGUCHI , Chikaaki KODAMA
IPC分类号： H01L21/302
CPC分类号： H01L21/0337
摘要： A method of manufacturing a semiconductor device, which forms a pattern by performing pattern transformation steps multiple times, comprises setting finished pattern sizes for patterns to be formed in each consecutive two pattern transformation steps among the plurality of pattern transformation steps based on a possible total amount of in-plane size variation of the patterns to be formed in the consecutive two pattern transformation steps.
摘要翻译：通过多次执行图案变换步骤来形成图案的半导体器件的制造方法包括：在多个图案变换步骤中，基于可能的总量，在每个连续的两个图案变换步骤中设定要形成的图案的完成图案尺寸在连续的两个图案变换步骤中要形成的图案的平面尺寸变化。

9. 发明申请

US20110177458A1 EXPOSURE DETERMINING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND COMPUTER PROGRAM PRODUCT 有权
标题翻译：曝光测定方法，制造半导体器件的方法和计算机程序产品
公开(公告)号：US20110177458A1
公开(公告)日：2011-07-21
申请号：US13007238
申请日：2011-01-14
申请人： Toshiya KOTANI , Kazuya Fukuhara , Michiya Takimoto , Hidefumi Mukai , Soichi Inoue
发明人： Toshiya KOTANI , Kazuya Fukuhara , Michiya Takimoto , Hidefumi Mukai , Soichi Inoue
IPC分类号： G03F7/20 , G06F17/50
CPC分类号： G03F7/70425 , G03F7/70558
摘要： According to one embodiment, a deviation amount distribution of a two-dimensional shape parameter between a mask pattern formed on a mask and a desired mask pattern is acquired as a mask pattern map. Such that a deviation amount of the two-dimensional shape parameter between a pattern on substrate formed when the mask is subjected to exposure shot to form a pattern on a substrate and a desired pattern on substrate fits within a predetermined range, an exposure is determined for each position in the exposure shot in forming the pattern on substrate based on the mask pattern map.
摘要翻译：根据一个实施例，获取形成在掩模上的掩模图案与期望的掩模图案之间的二维形状参数的偏差量分布作为掩模图案图。使得当在掩模经受曝光拍摄以形成基板上的图案和在基板上形成图案之后形成的基板上的图案之间的二维形状参数的偏移量适合在预定范围内时，确定曝光基于掩模图案图，在基板上形成图案的曝光中的每个位置。

10. 发明申请

US20110065030A1 MASK PATTERN DETERMINING METHOD, MASK MANUFACTURING METHOD, AND DEVICE MANUFACTURING METHOD 审中-公开
标题翻译：掩模图形测定方法，掩模制造方法及装置制造方法
公开(公告)号：US20110065030A1
公开(公告)日：2011-03-17
申请号：US12880507
申请日：2010-09-13
申请人： Toshiya KOTANI , Fumiharu Nakajima , Ryota Aburada , Takafumi Taguchi , Hiromitsu Mashita , Michiya Takimoto , Chikaaki Kodama
发明人： Toshiya KOTANI , Fumiharu Nakajima , Ryota Aburada , Takafumi Taguchi , Hiromitsu Mashita , Michiya Takimoto , Chikaaki Kodama
IPC分类号： G03F7/20 , G06F17/50
CPC分类号： G06F17/5009 , G03F1/68 , G03F7/70425
摘要： According to one embodiment, a mask pattern determining method includes a mask-pattern dimension variation amount of a first photomask is derived. Moreover, a correspondence relationship between a target dimension value of an on-substrate test pattern formed by using a second photomask and a dimension allowable variation amount of a mask pattern formed on the second photomask is derived. Then, it is determined whether pattern formation is possible with a pattern dimension that needs to be formed when performing the pattern formation on a substrate by using the first photomask based on the mask-pattern dimension variation amount and the correspondence relationship.
摘要翻译：根据一个实施例，掩模图案确定方法包括导出第一光掩模的掩模图案尺寸变化量。此外，导出通过使用第二光掩模形成的基板上测试图案的目标尺寸值与形成在第二光掩模上的掩模图案的尺寸允许变化量之间的对应关系。然后，基于掩模图案尺寸变化量和对应关系，通过使用第一光掩模在基板上进行图案形成时，确定是否可以形成图案尺寸。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式