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1. 发明专利

JP2012199520A Semiconductor device and manufacturing method of the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2012199520A
公开(公告)日：2012-10-18
申请号：JP2012036376
申请日：2012-02-22
申请人： Toshiba Corp , 株式会社東芝
发明人： KITAMURA MASAYUKI , SAKATA ATSUKO , WADA MAKOTO , YAMAZAKI YUICHI , KATAGIRI MASAYUKI , KAJITA AKIHIRO , SAKAI TADASHI , SAKUMA HISASHI , MIZUSHIMA ICHIRO
IPC分类号： H01L21/3205 , H01L21/768 , H01L23/532
CPC分类号： H01L21/02639 , H01L21/02491 , H01L21/02502 , H01L21/02527 , H01L21/02645 , H01L21/28556 , H01L21/32051 , H01L21/76846 , H01L21/76877 , H01L23/53276 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device including a high quality graphene having crystal defect as less as possible and resistance lower than the related art.SOLUTION: A semiconductor device comprises: a semiconductor substrate; and wiring provided above the semiconductor substrate. A portion of a promoter layer, which contacts a catalyst layer has a face-centered cubic structure or a hexagonal close-packed structure, and (111) face of the face-centered cubic structure or (002) face of the hexagonal close-packed structure is directed parallel to a surface of the semiconductor substrate. Alternatively, the portion of the promoter layer, which contacts the catalyst layer has an amorphous structure or a microcrystalline structure. The catalyst layer has a face-centered cubic structure or a hexagonal close-packed structure, and (111) face of the face-centered cubic structure or (002) face of the hexagonal close-packed structure is directed parallel to the surface of the semiconductor substrate.
摘要翻译：要解决的问题：提供一种半导体器件，其包括具有尽可能低的晶体缺陷的高品质石墨烯和比现有技术更低的电阻。解决方案：半导体器件包括：半导体衬底; 以及设置在半导体基板上方的布线。与催化剂层接触的助催化剂层的一部分具有面心立方结构或六方密堆积结构，并且六面体密堆积的（111）面的面心立方结构或（002）面结构指向与半导体衬底的表面平行。或者，与催化剂层接触的促进剂层的部分具有非晶结构或微晶结构。催化剂层具有面心立方结构或六方密堆积结构，并且六边形密堆积结构的面心立方结构的（111）面或（002）面的平行于半导体衬底。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP4718962B2 Semiconductor device 有权
公开(公告)号：JP4718962B2
公开(公告)日：2011-07-06
申请号：JP2005294591
申请日：2005-10-07
申请人：ルネサスエレクトロニクス株式会社
发明人：和美斉藤
IPC分类号： H01L21/3205 , H01L21/3213 , H01L23/52
CPC分类号： H01L23/5226 , H01L21/76849 , H01L23/53266 , H01L2221/1078 , H01L2924/0002 , H01L2924/00

3. 发明专利

JP2007103824A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2007103824A
公开(公告)日：2007-04-19
申请号：JP2005294591
申请日：2005-10-07
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： SAITO KAZUMI
IPC分类号： H01L21/768
CPC分类号： H01L23/5226 , H01L21/76849 , H01L23/53266 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device in which electrical connection between a tungsten film and a barrier metal film is stabilized and film forming property of a wiring layer is improved in a simple method. SOLUTION: This semiconductor device comprises a semiconductor substrate 101, an inter-layer insulating film 102 having an opening part 102a formed on the semiconductor substrate 101, a tungsten film (W plug 108) filling the opening 102a, a first barrier metal film 110 other than a Ti film which is formed on the surface of the tungsten film, a second barrier metal film 111 which is a Ti-containing film and formed on the first barrier metal film 110, and a metal wiring film 116 formed on the surface of the second barrier metal film 111. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体器件，其中钨膜和阻挡金属膜之间的电连接稳定，并且以简单的方法提高了布线层的成膜性能。解决方案：该半导体器件包括半导体衬底101，具有形成在半导体衬底101上的开口部102a的层间绝缘膜102，填充开口102a的钨膜（W插头108），第一阻挡金属除了形成在钨膜表面上的Ti膜以外，形成在第一阻挡金属膜110上的含Ti膜的第二阻挡金属膜111和形成在第一阻挡金属膜110上的金属配线膜116 第二阻挡金属膜111的表面。（C）2007，JPO＆INPIT

4. 发明专利

JP5047434B2 How to modify the raw chemicals in Ald method 有权
公开(公告)号：JP5047434B2
公开(公告)日：2012-10-10
申请号：JP2001529475
申请日：2000-10-12
申请人：エイエスエムインターナショナルエヌ.ヴェー.
发明人：エレルス，カイ−エリク
IPC分类号： C23C16/448 , C23C16/32 , C23C16/34 , C23C16/44 , C23C16/455 , C30B25/02 , C30B29/02 , C30B29/36 , C30B29/38 , H01L21/285 , H01L21/768
CPC分类号： C30B29/38 , C23C16/32 , C23C16/34 , C23C16/44 , C23C16/4401 , C23C16/4488 , C23C16/45525 , C30B25/02 , C30B29/02 , C30B29/36 , H01L21/28568 , H01L21/76843 , H01L21/76877 , H01L2221/1078
摘要： This invention concerns a method for modifying a source material used in an ALD process, a method for depositing transition metal nitride thin films by an ALD process and apparatus for use in such process. According to the present invention transition metal source materials are reduced by vaporizing a metal source material, conducting the vaporized metal source material, into a reducing zone comprising a solid reducing agent maintained at an elevated temperature. Thereafter, the metal source material is contacted with the solid or liquid reducing agent in order to convert the source material into a reduced metal compound and reaction byproducts having a sufficiently high vapor pressure for transporting in gaseous form.

5. 发明专利

JPWO2004112114A1 成膜方法、半導体装置の製造方法、半導体装置および成膜装置有权
公开(公告)号：JPWO2004112114A1
公开(公告)日：2006-07-27
申请号：JP2005506876
申请日：2004-04-27
申请人：東京エレクトロン株式会社
发明人：石坂　忠大 , 忠大石坂 , 大島　康弘 , 康弘大島 , 直樹吉井 , 直樹吉井 , 重岡　隆 , 隆重岡 , 川村　剛平 , 剛平川村 , 幸夫福田 , 幸夫福田 , 小島　康彦 , 康彦小島
IPC分类号： H01L21/285 , C23C16/34 , C23C16/44 , C23C16/455 , H01L21/28 , H01L21/3205 , H01L21/768 , H01L23/52
CPC分类号： C23C16/34 , C23C16/45529 , C23C16/45542 , H01L21/28562 , H01L21/76846 , H01L21/7685 , H01L2221/1078
摘要：処理容器内の被処理基板に成膜する成膜方法であって、ハロゲン元素を含まない有機金属化合物からなる第1の原料ガスを前記処理容器内に供給した後、前記第1の原料ガスを前記処理容器内から除去する第1の工程と、水素または水素化合物を含む第2の原料ガスを前記処理容器内に供給した後、前記第2の原料ガスを前記処理容器内から除去する第2の工程とを繰り返してなる第1の膜成長工程と、金属ハロゲン化物からなる第3の原料ガスを前記処理容器内に供給した後、前記第3の原料ガスを前記被処理基板から除去する第3の工程と、水素または水素化合物を含む第4の原料ガスを前記処理容器内に供給した後、前記第4の原料ガスを前記処理容器内から除去する第4の工程とを繰り返してなる第2の膜成長工程からなる成膜方法を用いた。

6. 发明专利

JP2006054477A Antireflection coating and laminated wiring line 审中-公开
标题翻译：抗反射涂层和层压接线
公开(公告)号：JP2006054477A
公开(公告)日：2006-02-23
申请号：JP2005261785
申请日：2005-09-09
申请人： Micron Technology Inc , マイクロンテクノロジーインコーポレイテッドMicron Technology, Inc.
发明人： MCTEER EVERETT A , ZAHORIK RUSSELL C , MEIKLE SCOTT G
IPC分类号： H01J9/02 , H01L23/52 , G09F9/30 , H01J1/52 , H01J29/04 , H01J29/89 , H01J29/96 , H01J31/12 , H01L21/027 , H01L21/28 , H01L21/285 , H01L21/3205 , H01L21/3213 , H01L21/768 , H01L23/532 , H01L31/0216
CPC分类号： H01L21/76849 , H01J1/52 , H01J29/896 , H01J31/127 , H01J2201/30403 , H01J2201/319 , H01L21/0276 , H01L21/32139 , H01L21/7685 , H01L21/76858 , H01L21/76885 , H01L23/53223 , H01L31/02161 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a given junction with an antireflection coating and a laminated wiring line which can prevent the junction from an undesired exposure by photons. SOLUTION: Ti-Al-N being laminated on a semiconductor substrate serves as an antireflection coating. For a form of embodiment of the wiring line, an aluminum electrically conductive layer (54) and aluminum-titanium lower layer (52) are formed beneath an antireflection cap layer. For a field emission display (FED), a Ti-Al-N layer prevents blocking of the device operation by a light originated in the anode of the display screen passing through a transistor junction. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供具有防反射涂层和层压布线的给定结，其可以防止结点不受光子的不期望的暴露。解决方案：层叠在半导体衬底上的Ti-Al-N用作抗反射涂层。对于布线的一个实施例的形式，铝制导电层（54）和铝 - 钛下层（52）形成在防反射盖层的下方。对于场致发射显示器（FED），Ti-Al-N层通过源自通过晶体管结的显示屏的阳极的光阻止器件工作的阻塞。版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2004197227A Source alternate mocvd process of depositing tungsten nitride thin film as barrier layer for mocvd copper interconnection 审中-公开
标题翻译：用于MOCVD铜互连的沉积硝酸盐薄膜作为阻挡层的源替代MOCVD工艺
公开(公告)号：JP2004197227A
公开(公告)日：2004-07-15
申请号：JP2003421943
申请日：2003-12-19
申请人： Sharp Corp , シャープ株式会社
发明人： PAN WEI , EVANS DAVID R , SHIEN TEN SUU
IPC分类号： C23C16/34 , H01L21/285 , H01L21/768
CPC分类号： H01L21/76843 , H01L21/28556 , H01L2221/1078
摘要： PROBLEM TO BE SOLVED: To form a WN barrier layer having high density, low resistivity, and extremely fine crystal grains or an amorphous structure.
SOLUTION: The process is a source alternate CVD (Chemical Vapor Deposition) process for forming a WN barrier layer, and includes: a stage (a) where a substrate is heated inside a CVD chamber; a stage (b) where an alternate source W(CO)
6 precursor is introduced into the CVD chamber; and a stage (c) where an NH
3 source is introduced into the chamber. The process further includes a stage where the W(CO)
6 and NH
3 are reacted, and WN is deposited on the heated substrate.
COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：形成具有高密度，低电阻率和极细晶粒或无定形结构的WN阻挡层。解决方案：该方法是用于形成WN阻挡层的源替代CVD（化学气相沉积）方法，并且包括：在CVD室内加热基板的载物台（a）将备用源W（CO）SB 6前体引入CVD室的阶段（b）; 以及将NH 3 SB 3源引入室中的阶段（c）。该方法还包括使W（CO）SB 6和NH 3 SB 3反应的阶段，并且WN沉积在加热的基底上。版权所有（C）2004，JPO＆NCIPI

9. 发明专利

JP2016115892A 半導体装置およびその製造方法审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2016115892A
公开(公告)日：2016-06-23
申请号：JP2014255608
申请日：2014-12-17
申请人：ルネサスエレクトロニクス株式会社
发明人：松本雅弘 , 前川和義 , 河野祐一
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532 , H01L23/12 , H01L21/3205
CPC分类号： H01L21/4817 , H01L21/76852 , H01L23/53238 , H01L24/03 , H01L24/05 , H01L24/06 , H01L2221/1078 , H01L2224/02166 , H01L2224/0345 , H01L2224/03452 , H01L2224/0401 , H01L2224/04042 , H01L2224/05075 , H01L2224/05664 , H01L2224/0612 , H01L2224/131 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45644 , H01L2224/45664 , H01L2224/48247 , H01L2224/48465 , H01L23/3121 , H01L23/525 , H01L24/13 , H01L24/45 , H01L24/48 , H01L2924/181
摘要：【課題】半導体装置の信頼性を向上させる。【解決手段】半導体基板1P上に、複数の配線層の最上層に形成されたパッド電極9aと、パッド電極9a上に開口10aを有する表面保護膜10と、表面保護膜10上に形成され、上面と側面を有する再配線RMと、再配線RMの上面を露出し、側面を覆う絶縁膜からなる側壁バリア膜11aと、再配線RMの上面を覆うキャップ金属膜CMとを有する。そして、再配線RMの上面および側面は、キャップ金属膜CMまたは側壁バリア膜11aで覆われており、キャップ金属膜CMと側壁バリア膜11aとは重なる部分を有する。【選択図】図4
摘要翻译：要解决的问题：提高半导体器件的可靠性。解决方案：半导体器件在半导体衬底1上具有形成在多个布线层的最上层上的焊盘电极9a，具有开口10a的表面保护膜10 在焊盘电极9a上，形成在表面保护膜10上并具有上表面和侧面的再布线RM，由用于暴露重新布线RM的上表面并覆盖侧面的绝缘膜组成的侧壁阻挡膜11a 以及覆盖重新布线RM的上表面的盖金属膜CM。再配线RM的上表面和侧面由盖金属膜CM或侧壁阻挡膜11a覆盖，并且帽金属膜CM和侧壁阻挡膜11a具有重叠部分。图4

10. 发明专利

JP5245258B2 Semiconductor device and a method of manufacturing the same 有权
公开(公告)号：JP5245258B2
公开(公告)日：2013-07-24
申请号：JP2007040325
申请日：2007-02-21
申请人：富士通セミコンダクター株式会社
发明人：秀明菊池 , 孝一永井 , 寿良三浦
IPC分类号： H01L23/522 , H01L21/3205 , H01L21/768 , H01L21/8246 , H01L23/532 , H01L27/105
CPC分类号： H01L23/53223 , H01L21/2885 , H01L21/76802 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/7685 , H01L21/76852 , H01L23/53295 , H01L27/11502 , H01L27/11507 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device that includes a metal wiring formed on the insulating film and having a main wiring portion laminated with a plurality of metal films and a metal protection film formed at least on the upper surfaces of the main wiring portion and made of a precious metal material.

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