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1. 发明专利

JP2014107454A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2014107454A
公开(公告)日：2014-06-09
申请号：JP2012260233
申请日：2012-11-28
申请人： Toshiba Corp , 株式会社東芝
发明人： SUZUKI MARIKO , SAKAI TADASHI , SAKUMA HISASHI , KATAGIRI MASAYUKI , YAMAZAKI YUICHI
IPC分类号： H01L29/868 , H01L21/329 , H01L21/336 , H01L21/338 , H01L29/47 , H01L29/78 , H01L29/812 , H01L29/861 , H01L29/872
CPC分类号： H01L29/1602 , H01L21/02376 , H01L21/02433 , H01L21/02444 , H01L21/02494 , H01L21/02502 , H01L21/02516 , H01L21/02527 , H01L21/02576 , H01L21/02579 , H01L21/041 , H01L21/042 , H01L29/045 , H01L29/0657 , H01L29/1037 , H01L29/36 , H01L29/4236 , H01L29/6603 , H01L29/66045 , H01L29/78 , H01L29/8128 , H01L29/868 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that includes diamond semiconductor layers with controlled impurity concentration, and has low on-resistance and high withstand voltage.SOLUTION: A semiconductor device includes: a first diamond semiconductor layer of a first conductivity type having a primary surface with a first surface orientation; a trench structure formed in the first diamond semiconductor layer; a second diamond semiconductor layer formed on the first diamond semiconductor layer in the trench structure and having a lower impurity concentration than the first diamond semiconductor layer; a third diamond semiconductor layer of a second conductivity type formed on the second diamond semiconductor layer and having a higher impurity concentration than the second diamond semiconductor layer; a first electrode electrically connected to the first diamond semiconductor layer; and a second electrode electrically connected to the third diamond semiconductor layer.
摘要翻译：要解决的问题：提供一种半导体器件，其包括具有可控杂质浓度的金刚石半导体层，并且具有低导通电阻和高耐压。解决方案：半导体器件包括：第一导电类型的第一金刚石半导体层，其具有主表面具有第一表面取向; 形成在所述第一金刚石半导体层中的沟槽结构; 形成在所述沟槽结构中的所述第一金刚石半导体层上并且具有比所述第一金刚石半导体层更低的杂质浓度的第二金刚石半导体层; 第二导电类型的第三金刚石半导体层形成在第二金刚石半导体层上并且具有比第二金刚石半导体层更高的杂质浓度; 电连接到第一金刚石半导体层的第一电极; 以及与第三金刚石半导体层电连接的第二电极。

2. 发明专利

JP2013058669A Semiconductor device and manufacturing method of the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013058669A
公开(公告)日：2013-03-28
申请号：JP2011196955
申请日：2011-09-09
申请人： Toshiba Corp , 株式会社東芝
发明人： KATAGIRI MASAYUKI , YAMAZAKI YUICHI , WADA MAKOTO , SAKAI TADASHI , SAKUMA HISASHI , SUZUKI MARIKO
IPC分类号： H01L21/3205 , C01B31/02 , H01L21/28 , H01L21/285 , H01L21/768 , H01L23/522 , H01L23/532
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufactured by a method of a simple manufacturing process.SOLUTION: A semiconductor device according to an embodiment comprises: a substrate; a catalyst metal film on the substrate; a graphene on the catalyst metal film; an interlayer insulation film on the graphene; a contact hole penetrating the interlayer insulation film; and carbon nanotubes provided in the contact hole on the catalyst metal film processed by plasma of one and more gases selected from hydrogen, nitrogen, ammonia, and an inert gas, or carbon nanotubes penetrating the interlayer insulation film on the catalyst metal film processed by plasma of one and more gases selected from hydrogen, nitrogen, ammonia, and an inert gas.
摘要翻译：要解决的问题：提供通过简单制造方法制造的半导体器件。解决方案：根据实施例的半导体器件包括：衬底; 基板上的催化剂金属膜; 催化剂金属膜上的石墨烯; 石墨烯上的层间绝缘膜; 穿透层间绝缘膜的接触孔; 以及设置在催化剂金属膜上的接触孔中的碳纳米管，其通过从氢，氮，氨和惰性气体中选择的一种或多种气体的等离子体处理，或者穿过在等离子体处理的催化剂金属膜上的层间绝缘膜的碳纳米管的一种或多种选自氢，氮，氨和惰性气体的气体。版权所有（C）2013，JPO＆INPIT

3. 发明专利

JP2012199520A Semiconductor device and manufacturing method of the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2012199520A
公开(公告)日：2012-10-18
申请号：JP2012036376
申请日：2012-02-22
申请人： Toshiba Corp , 株式会社東芝
发明人： KITAMURA MASAYUKI , SAKATA ATSUKO , WADA MAKOTO , YAMAZAKI YUICHI , KATAGIRI MASAYUKI , KAJITA AKIHIRO , SAKAI TADASHI , SAKUMA HISASHI , MIZUSHIMA ICHIRO
IPC分类号： H01L21/3205 , H01L21/768 , H01L23/532
CPC分类号： H01L21/02639 , H01L21/02491 , H01L21/02502 , H01L21/02527 , H01L21/02645 , H01L21/28556 , H01L21/32051 , H01L21/76846 , H01L21/76877 , H01L23/53276 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device including a high quality graphene having crystal defect as less as possible and resistance lower than the related art.SOLUTION: A semiconductor device comprises: a semiconductor substrate; and wiring provided above the semiconductor substrate. A portion of a promoter layer, which contacts a catalyst layer has a face-centered cubic structure or a hexagonal close-packed structure, and (111) face of the face-centered cubic structure or (002) face of the hexagonal close-packed structure is directed parallel to a surface of the semiconductor substrate. Alternatively, the portion of the promoter layer, which contacts the catalyst layer has an amorphous structure or a microcrystalline structure. The catalyst layer has a face-centered cubic structure or a hexagonal close-packed structure, and (111) face of the face-centered cubic structure or (002) face of the hexagonal close-packed structure is directed parallel to the surface of the semiconductor substrate.
摘要翻译：要解决的问题：提供一种半导体器件，其包括具有尽可能低的晶体缺陷的高品质石墨烯和比现有技术更低的电阻。解决方案：半导体器件包括：半导体衬底; 以及设置在半导体基板上方的布线。与催化剂层接触的助催化剂层的一部分具有面心立方结构或六方密堆积结构，并且六面体密堆积的（111）面的面心立方结构或（002）面结构指向与半导体衬底的表面平行。或者，与催化剂层接触的促进剂层的部分具有非晶结构或微晶结构。催化剂层具有面心立方结构或六方密堆积结构，并且六边形密堆积结构的面心立方结构的（111）面或（002）面的平行于半导体衬底。版权所有（C）2013，JPO＆INPIT

4. 发明专利

JP2012049268A Method for manufacturing semiconductor substrate 有权
标题翻译：制造半导体基板的方法
公开(公告)号：JP2012049268A
公开(公告)日：2012-03-08
申请号：JP2010188836
申请日：2010-08-25
申请人： Toshiba Corp , 株式会社東芝
发明人： SAKUMA HISASHI , SAKAI TADASHI , YAMAZAKI YUICHI , KATAGIRI MASAYUKI , SUZUKI MARIKO , WADA MAKOTO
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/768 , H01L23/522
CPC分类号： H01L21/76879 , H01L21/28556 , H01L21/76876 , H01L21/76883 , H01L23/53276 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor substrate solving the problem in which an embedded film formed in a via-hole, for embedding a carbon nanotube, is not uniformly formed in the substrate, thereby causing an interlayer insulating film to be ununiformly polished at a planarization treatment step to produce a short-circuit between an underlying interconnection and an upper electrode at a position other than via wiring.SOLUTION: A method for manufacturing a semiconductor substrate comprises: forming a carbon nanotube in a via-hole formed in an interlayer insulating film in a semiconductor substrate; thereafter, subjecting the entire substrate to fluorination treatment; then forming an embedded film only in the via-hole having the carbon nanotube therein; and thereafter, polishing the substrate for planarization treatment of the entire substrate. Accordingly, the interlayer insulating film is prevented from being locally polished.
摘要翻译：解决问题的方案：为了提供一种解决在基板中不均匀地形成用于嵌入碳纳米管的通孔中形成的嵌入膜的半导体基板的制造方法，由此形成中间层绝缘膜在平坦化处理步骤中被不均匀地抛光，以在除了通孔布线之外的位置处产生下面的互连和上电极之间的短路。解决方案：一种用于制造半导体衬底的方法包括：在形成在半导体衬底中的层间绝缘膜中的通孔中形成碳纳米管; 然后对整个基板进行氟化处理; 然后仅在其中具有碳纳米管的通孔中形成嵌入膜; 然后对整个基板进行平面化处理用基板的研磨。因此，防止了层间绝缘膜的局部抛光。版权所有（C）2012，JPO＆INPIT

5. 发明专利

JP2010212619A Graphene manufacturing method, graphene, graphene manufacturing device, and semiconductor device 审中-公开
标题翻译：石墨制造方法，石墨，石墨制造装置和半导体装置
公开(公告)号：JP2010212619A
公开(公告)日：2010-09-24
申请号：JP2009059869
申请日：2009-03-12
申请人： Toshiba Corp , 株式会社東芝
发明人： YAMAZAKI YUICHI , WADA MAKOTO , SAKAI TADASHI , MATSUNAGA NORIAKI , SAKUMA HISASHI , KATAGIRI MASAYUKI , SUZUKI MARIKO
IPC分类号： H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a method and device for manufacturing a graphene structure suited for a semiconductor manufacturing process.
SOLUTION: The method includes: a first step of supplying a first plasma generated from a first gas containing at least hydrogen or one of rare gas to a thin film containing at least one of Co, Ni, Fe carried by a substrate 30; a second step of generating a second plasma containing radical from a second gas containing a hydrocarbon-based gas, and supplying the radical of the second plasma to the thin film through a plane electrode 4 which intercepts penetration of the second plasma other than the radical; and a third step of supplying a third plasma generated from a third gas containing a rare gas to the thin film.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于制造适于半导体制造工艺的石墨烯结构的方法和装置。解决方案：该方法包括：第一步骤，将由至少含有氢或一种稀有气体的第一气体产生的第一等离子体供给到由衬底30承载的至少一种Co，Ni，Fe的薄膜 ; 从含有烃基气体的第二气体产生含有自由基的第二等离子体的第二步骤，并且通过拦截第二等离子体而不是自由基的平面电极4将第二等离子体的基团供给薄膜; 以及第三步骤，将从含有稀有气体的第三气体产生的第三等离子体提供给薄膜。版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2009033021A Structure, electronic device and method of forming structure 有权
标题翻译：结构，电子设备和形成结构的方法
公开(公告)号：JP2009033021A
公开(公告)日：2009-02-12
申请号：JP2007197353
申请日：2007-07-30
申请人： Toshiba Corp , 株式会社東芝
发明人： SAKAI TADASHI , SAKUMA HISASHI , KATAGIRI MASAYUKI , SUZUKI MARIKO
IPC分类号： H01L21/60 , C01B31/02 , H01H59/00 , H01L21/3205 , H01L23/52 , H01L29/06
CPC分类号： H01L2224/11
摘要： PROBLEM TO BE SOLVED: To provide a structure for preventing a carbon nanotube bundle from spreading. SOLUTION: The structure includes a conductive film 12 formed in a base layer 10 and a plurality of carbon nanotube CNT bundles 20 an end of which is connected to the conductive film 12. At least the carbon nanotube at an external side portion of the CNT bundle 20 out of a plurality of carbon nanotubes is extended to the exterior of the CNT bundle having a convex curvature at an other end of the CNT bundle 20. The curvature becomes larger in a direction of the perimeter of the CNT bundle, the bundle diameter being smaller in a direction of the other end thereof. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种防止碳纳米管束扩散的结构。解决方案：该结构包括形成在基底层10中的导电膜12和多个碳纳米管CNT束20，其端部连接到导电膜12上。至少在碳纳米管的外侧部分多个碳纳米管中的CNT束20在CNT束20的另一端延伸到具有凸曲率的CNT束的外部。曲率在CNT束的周边方向上变大，束直径在其另一端的方向上较小。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2013067541A Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013067541A
公开(公告)日：2013-04-18
申请号：JP2011208851
申请日：2011-09-26
申请人： Toshiba Corp , 株式会社東芝
发明人： SUZUKI MARIKO , SAKAI TADASHI , SAKUMA HISASHI , KATAGIRI MASAYUKI , YAMAZAKI YUICHI
IPC分类号： C30B29/04 , C23C16/27 , H01L21/205
CPC分类号： H01L21/02527 , H01L21/02376 , H01L21/02433 , H01L21/02576 , H01L29/66136 , H01L29/66143 , H01L29/8613 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device excellent in the uniformity of impurity concentration and crystallinity which has an n-type diamond semiconductor layer, and to provide a method for manufacturing the same.SOLUTION: The semiconductor device includes: a diamond substrate having a surface inclined from a (100) plane in a range of 10 to 40° in a direction of ±10°; the n-type diamond semiconductor layer containing phosphorus (P) and formed on the surface plane described above. Further, the method for manufacturing the semiconductor device includes the following steps: preparing the diamond substrate having a surface inclined from the (100) surface in a range of 10 to 40° in the direction of ±10°; forming the n-type diamond semiconductor layer containing phosphorus (P) on the surface plane described above by epitaxial growth.
摘要翻译：要解决的问题：提供具有n型金刚石半导体层的杂质浓度和结晶度均匀性优异的半导体器件，并提供其制造方法。解决方案：半导体器件包括：金刚石衬底，具有从（100）面倾斜10°至40°范围内的方向<011±10°的表面; 含有磷（P）并形成在上述表面上的n型金刚石半导体层。此外，制造半导体器件的方法包括以下步骤：制备具有从（100）表面倾斜的表面在<011>±10°的方向上在10至40°的范围内的金刚石基底; 通过外延生长在上述表面上形成含有磷（P）的n型金刚石半导体层。版权所有（C）2013，JPO＆INPIT

8. 发明专利

JP2012204425A Semiconductor substrate, method of manufacturing the same, and electronic device 有权
标题翻译：半导体衬底，其制造方法和电子器件
公开(公告)号：JP2012204425A
公开(公告)日：2012-10-22
申请号：JP2011065266
申请日：2011-03-24
申请人： Toshiba Corp , 株式会社東芝
发明人： SAKUMA HISASHI , SAKAI TADASHI , YAMAZAKI YUICHI , KATAGIRI MASAYUKI , SUZUKI MARIKO , WADA MAKOTO
IPC分类号： H01L21/3205 , C01B31/02 , H01L21/768 , H01L23/532
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor substrate using carbon nanotubes and having excellent characteristics, a method of manufacturing the same, and an electronic device.SOLUTION: A semiconductor substrate comprises: a base that has a lower electrode in its first primary surface; an interlayer insulating film that is provided on a portion except for the lower electrode on the base; a catalyst layer that is provided on the lower electrode; a plurality of carbon nanotubes that are provided on the catalyst layer and extend in the direction perpendicular to a first primary surface of the lower electrode; an upper electrode that is provided on the carbon nanotubes and faces the lower electrode; a first buried film that covers the catalyst layer and ends of the carbon nanotubes at the catalyst layer side; and a second buried film that is filled between the other ends of the carbon nanotubes and has higher density than the first buried film.
摘要翻译：要解决的问题：提供一种使用碳纳米管并具有优异特性的半导体衬底，其制造方法和电子器件。解决方案：半导体衬底包括：在其第一主表面中具有下电极的基底; 设置在基底上的下部电极以外的部分的层间绝缘膜; 设置在下电极上的催化剂层; 多个碳纳米管，其设置在所述催化剂层上并且在垂直于所述下电极的第一主表面的方向上延伸; 设置在碳纳米管上且面向下电极的上电极; 在催化剂层侧覆盖催化剂层和碳纳米管末端的第一掩埋膜; 以及填充在碳纳米管的另一端之间并且具有比第一掩埋膜更高的密度的第二掩埋膜。版权所有（C）2013，JPO＆INPIT

9. 发明专利

JP2010177405A Carbon nanotube and method of manufacturing the same 有权
标题翻译：碳纳米管及其制造方法
公开(公告)号：JP2010177405A
公开(公告)日：2010-08-12
申请号：JP2009017687
申请日：2009-01-29
申请人： Toshiba Corp , 株式会社東芝
发明人： KATAGIRI MASAYUKI , SAKAI TADASHI , SAKUMA HISASHI , YAMAZAKI YUICHI , SUZUKI MARIKO
IPC分类号： H01L21/768 , C01B31/02 , H01L21/28 , H01L21/285 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a carbon nanotube on a CoWP.
SOLUTION: The method of manufacturing a carbon nanotube wiring structure includes: a plasma treatment step of plasma-treating a plating layer containing Co on a Cu wiring; an auxiliary catalyst providing step of providing an auxiliary catalyst for growing carbon nanotube to the Co-contained plating layer before or after the plasma treatment step; a heat treatment step of heat-treating the Co-contained plating layer and the auxiliary catalyst provided to the Co-contained plating layer after the plasma treatment step and the auxiliary catalyst providing step; and a carbon nanotube growing step in a plasma CVD method after the heat treatment step.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：待解决的问题：提供在CoWP上制造碳纳米管的方法。解决方案：制造碳纳米管布线结构的方法包括：在Cu布线上等离子体处理含有Co的镀层的等离子体处理步骤; 辅助催化剂提供步骤，其在等离子体处理步骤之前或之后提供用于将碳纳米管生长至辅助镀层的辅助催化剂; 在等离子体处理步骤和辅助催化剂提供步骤之后，对附着的镀层和辅助催化剂进行热处理的热处理步骤; 以及在热处理步骤之后的等离子体CVD法中的碳纳米管生长步骤。版权所有（C）2010，JPO＆INPIT

10. 发明专利

JP2010163331A Method of growing carbon nanotube, and carbon nanotube bundle-formed substrate 有权
标题翻译：生长碳纳米管的方法和碳纳米管组合形成的基体
公开(公告)号：JP2010163331A
公开(公告)日：2010-07-29
申请号：JP2009008437
申请日：2009-01-19
申请人： Fujitsu Semiconductor Ltd , Toshiba Corp , 富士通セミコンダクター株式会社 , 株式会社東芝
发明人： YAMAZAKI YUICHI , SAKAI TADASHI , SAKUMA HISASHI , KATAGIRI MASAYUKI , SUZUKI MARIKO , SATO SHINTARO
IPC分类号： C01B31/02
CPC分类号： H01J37/32422 , B82Y30/00 , B82Y40/00 , C01B32/16 , C23C16/02 , C23C16/26 , H01J37/32357
摘要： PROBLEM TO BE SOLVED: To provide a method of growing a high-density carbon nanotube by preventing agglomeration of the catalyst fine particles.
SOLUTION: The method of growing the high-density carbon nanotube comprises: a first plasma treatment process of treating the surface of a substrate provided with the catalyst fine particles by the plasma species generated from a gas containing at least hydrogen or a rare gas excluding carbon; a second plasma treatment process of forming a carbon layer on the surface of the catalyst fine particles by the plasma generated from a gas containing at least hydrocarbons after the first process; and a carbon nanotube growth process of growing the carbon nanotube by the plasma generated from the gas containing at least hydrocarbons after the second process.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供一种通过防止催化剂细颗粒的聚集来生长高密度碳纳米管的方法。解决方案：生长高密度碳纳米管的方法包括：第一等离子体处理方法，其通过由至少含有氢气或稀有气体的气体产生的等离子体物质来处理设置有催化剂细颗粒的基板的表面煤气不含碳; 第二等离子体处理工艺，其通过在第一工艺之后由至少含有烃的气体产生的等离子体在催化剂细颗粒的表面上形成碳层; 以及通过在第二工序后至少含有烃的气体产生的等离子体生长碳纳米管的碳纳米管生长方法。版权所有（C）2010，JPO＆INPIT

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