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    • 3. 发明专利
    • Semiconductor substrate, method of manufacturing the same, and electronic device
    • 半导体衬底,其制造方法和电子器件
    • JP2012204425A
    • 2012-10-22
    • JP2011065266
    • 2011-03-24
    • Toshiba Corp株式会社東芝
    • SAKUMA HISASHISAKAI TADASHIYAMAZAKI YUICHIKATAGIRI MASAYUKISUZUKI MARIKOWADA MAKOTO
    • H01L21/3205C01B31/02H01L21/768H01L23/532
    • PROBLEM TO BE SOLVED: To provide a semiconductor substrate using carbon nanotubes and having excellent characteristics, a method of manufacturing the same, and an electronic device.SOLUTION: A semiconductor substrate comprises: a base that has a lower electrode in its first primary surface; an interlayer insulating film that is provided on a portion except for the lower electrode on the base; a catalyst layer that is provided on the lower electrode; a plurality of carbon nanotubes that are provided on the catalyst layer and extend in the direction perpendicular to a first primary surface of the lower electrode; an upper electrode that is provided on the carbon nanotubes and faces the lower electrode; a first buried film that covers the catalyst layer and ends of the carbon nanotubes at the catalyst layer side; and a second buried film that is filled between the other ends of the carbon nanotubes and has higher density than the first buried film.
    • 要解决的问题:提供一种使用碳纳米管并具有优异特性的半导体衬底,其制造方法和电子器件。 解决方案:半导体衬底包括:在其第一主表面中具有下电极的基底; 设置在基底上的下部电极以外的部分的层间绝缘膜; 设置在下电极上的催化剂层; 多个碳纳米管,其设置在所述催化剂层上并且在垂直于所述下电极的第一主表面的方向上延伸; 设置在碳纳米管上且面向下电极的上电极; 在催化剂层侧覆盖催化剂层和碳纳米管末端的第一掩埋膜; 以及填充在碳纳米管的另一端之间并且具有比第一掩埋膜更高的密度的第二掩埋膜。 版权所有(C)2013,JPO&INPIT
    • 4. 发明专利
    • Carbon nanotube and method of manufacturing the same
    • 碳纳米管及其制造方法
    • JP2010177405A
    • 2010-08-12
    • JP2009017687
    • 2009-01-29
    • Toshiba Corp株式会社東芝
    • KATAGIRI MASAYUKISAKAI TADASHISAKUMA HISASHIYAMAZAKI YUICHISUZUKI MARIKO
    • H01L21/768C01B31/02H01L21/28H01L21/285H01L23/522
    • PROBLEM TO BE SOLVED: To provide a method of manufacturing a carbon nanotube on a CoWP.
      SOLUTION: The method of manufacturing a carbon nanotube wiring structure includes: a plasma treatment step of plasma-treating a plating layer containing Co on a Cu wiring; an auxiliary catalyst providing step of providing an auxiliary catalyst for growing carbon nanotube to the Co-contained plating layer before or after the plasma treatment step; a heat treatment step of heat-treating the Co-contained plating layer and the auxiliary catalyst provided to the Co-contained plating layer after the plasma treatment step and the auxiliary catalyst providing step; and a carbon nanotube growing step in a plasma CVD method after the heat treatment step.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 待解决的问题:提供在CoWP上制造碳纳米管的方法。 解决方案:制造碳纳米管布线结构的方法包括:在Cu布线上等离子体处理含有Co的镀层的等离子体处理步骤; 辅助催化剂提供步骤,其在等离子体处理步骤之前或之后提供用于将碳纳米管生长至辅助镀层的辅助催化剂; 在等离子体处理步骤和辅助催化剂提供步骤之后,对附着的镀层和辅助催化剂进行热处理的热处理步骤; 以及在热处理步骤之后的等离子体CVD法中的碳纳米管生长步骤。 版权所有(C)2010,JPO&INPIT
    • 7. 发明专利
    • Diamond electron emission element
    • 钻石电子发射元件
    • JP2008243676A
    • 2008-10-09
    • JP2007084287
    • 2007-03-28
    • Toshiba Corp株式会社東芝
    • ONO TOMIOSAKAI TADASHISAKUMA HISASHIYOSHIDA HIROAKISUZUKI MARIKO
    • H01J1/308
    • PROBLEM TO BE SOLVED: To provide a diamond electron emission element in which electrons can be emitted at high efficiency. SOLUTION: This is equipped with a diamond substrate (1), a high concentration p-type diamond layer (2) which is formed on the diamond substrate and contains p-type impurities at a first concentration, a low concentration p-type diamond layer (3) which is formed on the high concentration p-type diamond layer and contains p-type impurities at a second concentration that is lower than the first concentration, an n-type semiconductor region (5) formed at a part of the low concentration p-type diamond layer, an insulation layer (7) that is formed ranging over the low concentration p-type diamond layer and the n-type semiconductor region and has an aperture in which the low concentration p-type diamond layer and the n-type conductor region are partially exposed, a gate electrode (8) formed on the insulation layer, an electron emission suppressing region (6) that is extended to the aperture and arranged under the insulation membrane, and a hydrogen terminal end face (9) to cover the surface of the aperture. COPYRIGHT: (C)2009,JPO&INPIT
    • 要解决的问题:提供能够以高效率发射电子的金刚石电子发射元件。

      解决方案:它配备有金刚石基底(1),高浓度p型金刚石层(2),其形成在金刚石基底上并含有第一浓度的p型杂质,低浓度p- 形成在高浓度p型金刚石层上并且含有低于第一浓度的第二浓度的p型杂质的n型金刚石层(3),形成在第一浓度部分的n型半导体区域 低浓度p型金刚石层,形成在低浓度p型金刚石层和n型半导体区域之上的绝缘层(7),并且具有孔,其中低浓度p型金刚石层和 n型导体区域部分地露出,形成在绝缘层上的栅电极(8),延伸到孔口并布置在绝缘膜下方的电子发射抑制区域(6)和氢终端端面 9)覆盖表面 e的孔径。 版权所有(C)2009,JPO&INPIT