专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPH0747201A VAPORIZATION SYSTEM 失效
公开(公告)号：JPH0747201A
公开(公告)日：1995-02-21
申请号：JP21501993
申请日：1993-08-06
申请人： TOSHIBA CORP , CKD CORP
发明人： NAGAMATSU TAKAHITO , YOSHIDA TAKAMITSU , YAJIMA HIROMI , AOKI RIICHIRO , SUDO YOSHIHISA , ITO MINORU
IPC分类号： B01D1/00 , B01J7/00 , B01J7/02 , C23C16/44 , C23C16/448 , H01L21/31
摘要： PURPOSE:To provide a vaporizer and a vaporization system by means of which a material being a liq, at ordinary temp. and ordinary pressure can be fed into a vapor phase reaction tank etc., by controlling precisely vaporization of the material. CONSTITUTION:This vaporization system is constituted of a quantitative pump 3, a check valve 2 and a vaporizer 1. The quantitative pump 3 feeds a specified amt. of TEOS to the check valve 2 by up and down movement of a rod 22 set through a bellows 23. At this time, a valve body 32 of the check valve 2 is separated from a valve seat 33 and TEOS is sent to the vaporizer. As a flat plate 11, etc., are heated by means of an electric heater 12 in the vaporizer 1, TEOS is surely vaporized and is mixed with an assist and it is fed as a mixed gas into a gas phase reaction tank, etc. Therefore, TEOS is stably vaporized without generating reliquefaction on the inner wall, etc., of the vaporizer 1 to contribute to a stable operation of the process and the yield by the process is also improved.

2. 发明专利

JPH06338463A SEMICONDUCTOR MANUFACTURING DEVICE 失效
公开(公告)号：JPH06338463A
公开(公告)日：1994-12-06
申请号：JP12712193
申请日：1993-05-28
申请人： TOSHIBA CORP
发明人： NAGAMATSU TAKAHITO
IPC分类号： H01L21/205 , H01L21/302 , H01L21/3065 , H01L21/31 , H01L21/68 , H01L21/683
摘要： PURPOSE:To provide a semiconductor manufacturing device which prevents carriage troubles and does not give damages to a thin insulating film formed in a subject to be processed. CONSTITUTION:A semiconductor manufacturing device is provided with a chamber 20 for exciting reacting gas by high-frequency power and performing prescribed process on a wafer 10, a susceptor 12 for placing the wafer 10, a lift pin 16 for releasing the wafer 10 from the susceptor 12 and a resistance 26 for gradually discharging charges accumulated on the wafer 10 during the process. Such constitution does not allow the wafer 10 and the susceptor 12 to be attracted by an electrostatic chuck and carriage troubles are prevented. Even when the wafer 10 is placed far from the susceptor 12 or when a handler is permitted to make contact with the wafer 10, potential change in the wafer 10 is extremely small or zero and damages on the gate insulating film is prevented.

3. 发明专利

JP2005163080A Plating apparatus and plating method 审中-公开
标题翻译：电镀设备和电镀方法
公开(公告)号：JP2005163080A
公开(公告)日：2005-06-23
申请号：JP2003401773
申请日：2003-12-01
申请人： Toshiba Corp , 株式会社東芝
发明人： TOYODA HIROSHI , MATSUI YOSHITAKA , YAHIRO KAZUYUKI , YAMABE SUMISHIGE , MISHIMA SHIRO , NAGAMATSU TAKAHITO
IPC分类号： C25D5/02 , C25D5/18 , C25D7/12 , C25D17/00 , C25D17/10 , C25D21/00 , H01L21/00 , H01L21/288 , H01L21/768
CPC分类号： C25D7/123 , C25D17/001 , C25D17/002 , C25D17/10 , C25D21/00 , H01L21/2885 , H01L21/76877
摘要： PROBLEM TO BE SOLVED: To provide a plating apparatus which inhibits the formation of voids and improves the in-plane thickness uniformity of a plated film, and to provide a plating method. SOLUTION: The plating apparatus 1 comprises a plating liquid tank 2 for storing a plating liquid therein, and a holder 3 for holding a wafer W. The plating liquid tank 2 has an anode 5 to which voltage between itself and the seed layer 103 of the wafer W is applied, and a sacrificial anode 7 which can be electrically connected to the seed layer 103, arranged therein. The sacrificial anode 7 is composed of a substance having an oxidation-reduction potential less noble than that of a metal that forms the seed layer 103. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供抑制空隙形成并提高镀膜的面内厚度均匀性的电镀装置，并提供电镀方法。解决方案：电镀装置1包括用于在其中储存电镀液的电镀液槽2和用于保持晶片W的保持器3.镀液槽2具有阳极5，阳极5在其之间和种子层之间施加电压施加晶片W的103，以及可以与种子层103电连接的牺牲阳极7。牺牲阳极7由具有比形成种子层103的金属的氧化还原电位低的物质组成。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2006294643A Semiconductor manufacturing method 审中-公开
标题翻译：半导体制造方法
公开(公告)号：JP2006294643A
公开(公告)日：2006-10-26
申请号：JP2005108974
申请日：2005-04-05
申请人： Toshiba Corp , 株式会社東芝
发明人： NAGAMATSU TAKAHITO
IPC分类号： H01L21/768
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing method capable of efficiently suppressing the warpage of a semiconductor wafer without adding a new film forming process.
SOLUTION: The method is provided with a process of forming a plurality of element regions on the semiconductor wafer, process of forming an interlayer insulating film on the semiconductor wafer, process of forming a first groove on the interlayer insulating film, process of repeating a wiring forming process provided with a process of forming a metallic wiring layer inside the first groove a plurality of times to form a multilayer wiring, process of forming a second groove on the external periphery of the element regions, and process of forming a cavity and/or a metallic wiring layer inside the second groove.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够有效地抑制半导体晶片的翘曲而不添加新的成膜工艺的半导体制造方法。解决方案：该方法设置有在半导体晶片上形成多个元件区域的工艺，在半导体晶片上形成层间绝缘膜的工艺，在层间绝缘膜上形成第一沟槽的工艺，在重复布线形成工艺，该布线形成工艺具有多次在第一凹槽内形成金属布线层的工艺以形成多层布线，在元件区域的外周形成第二凹槽的工艺，以及形成空腔的工艺和/或第二槽内的金属布线层。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2006216854A Manufacturing method for semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：JP2006216854A
公开(公告)日：2006-08-17
申请号：JP2005029454
申请日：2005-02-04
申请人： Toshiba Corp , 株式会社東芝
发明人： HONDA AKIRA , TSUTSUMI KAORI , MURAKAMI KAZUHIRO , NUMANO MASAKUNI , NAGAMATSU TAKAHITO , HARAKAWA HIDEAKI , MATSUYAMA HIDETO , EZAWA HIROKAZU , KANEKO HISAFUMI
IPC分类号： H01L21/28 , H01L21/3065 , H01L21/768
CPC分类号： H01L21/76802 , H01L21/02063 , H01L21/31116 , H01L21/76814
摘要： PROBLEM TO BE SOLVED: To solve the problem wherein it is difficult to sufficiently remove a damaged layer or a natural oxide film within a contact hole.
SOLUTION: The contact hole 14 for exposing an electrically conductive layer 12 is formed by subjecting an insulating film 13 to dry-etching, the plasma excited from an oxidizing gas is supplied onto the exposed electrically conductive layer 12 to subject the damaged layer 15 formed within the contact hole 14 to dry cleaning, a product 16 formed within the contact hole 14 by the dry cleaning is removed by wet treatment, dry treatment is carried out using a gas containing either NF
3 or HF, the natural oxide film 17 formed within the contact hole 14 by the wet treatment is etched, and the product formed by the etching is removed by heat treatment.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了解决难以充分地除去接触孔内的损伤层或自然氧化膜的问题。解决方案：用于暴露导电层12的接触孔14是通过对绝缘膜13进行干蚀刻来形成的，将从氧化气体激发的等离子体供应到暴露的导电层12上以使受损层 15，形成在接触孔14内以进行干洗，通过湿式处理除去形成在接触孔14内的通过干式清洁的产品16，使用含有NF 3 SB 3的气体进行干法处理 HF中，蚀刻通过湿式处理形成在接触孔14内的自然氧化膜17，并且通过热处理除去由蚀刻形成的产物。版权所有（C）2006，JPO＆NCIPI

6. 发明专利

JP2005029820A Plating method, method of producing semiconductor device, and plating device 审中-公开
标题翻译：电镀方法，制造半导体器件的方法和镀层器件
公开(公告)号：JP2005029820A
公开(公告)日：2005-02-03
申请号：JP2003194254
申请日：2003-07-09
申请人： Ebara Corp , Toshiba Corp , 株式会社東芝 , 株式会社荏原製作所
发明人： YAHIRO KAZUYUKI , KANEKO HISAFUMI , MATSUDA TETSURO , TOYODA HIROSHI , MORITA TOSHIYUKI , MISHIMA SHIRO , NAGAMATSU TAKAHITO , SAITO AKIKO , MISHIMA KOJI , SUZUKI HIDENAO , IDE KUNIHITO , NOMURA KAZUFUMI
IPC分类号： C25D7/12 , C25D17/00 , C25D21/00 , C25D21/08 , C25D21/10 , H01L21/288 , H01L21/3205 , H01L23/52
摘要： PROBLEM TO BE SOLVED: To provide a plating method capable of securely burying platings into a recessed part, a method of producing a semiconductor device hardly causing disconnection, and a plating device capable of washing a substrate uniformly.
SOLUTION: A wafer W is rotated by the rotation of a wafer holder 25. Further, water is fed onto the wafer W from a water feeding nozzle 40, and the wafer W is washed. The washing of the wafer W is performed while moving the water feeding nozzle 40 and changing the rotational frequency or the like of the wafer holder 25. After the washing, in a state wherein the wafer W is rotated, the feed of the water from the water feeding nozzle 40 is stopped, and the dewatering of the wafer W is performed. After the dewatering, voltage is applied to the space between an anode electrode 31 and a cathode electrode 28. Also, a plating liquid is fed from the water feeding nozzle 40 onto the wafer W, thereby plating the surface of the wafer W.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够将电镀牢固地埋入凹部中的电镀方法，几乎不会断开的半导体装置的制造方法以及能够均匀地洗涤基板的电镀装置。解决方案：通过晶片保持器25的旋转使晶片W旋转。此外，水从供水喷嘴40供给到晶片W上，并且晶片W被洗涤。在移动给水嘴40并改变晶片保持器25的旋转频率等的同时进行晶片W的洗涤。在清洗之后，在晶片W旋转的状态下，从供水喷嘴40停止，并且执行晶片W的脱水。脱水后，向阳极电极31和阴极电极28之间的空间施加电压。此外，电镀液体从供水喷嘴40供给到晶片W，由此电镀晶片W的表面。
版权所有（C）2005，JPO＆NCIPI

7. 发明专利

JP2014165076A Ion implanter and state determination method of ion implanter 有权
标题翻译：离子植入物的离子植入物和状态测定方法
公开(公告)号：JP2014165076A
公开(公告)日：2014-09-08
申请号：JP2013036260
申请日：2013-02-26
申请人： Toshiba Corp , 株式会社東芝
发明人： JINGUJI MASAYUKI , HATTORI KEI , FUJITA KEIJI , NAGAMATSU TAKAHITO
IPC分类号： H01J37/317 , H01L21/265
CPC分类号： H01J37/3171 , H01J37/026 , H01J2237/24564 , H01J2237/304
摘要： PROBLEM TO BE SOLVED: To provide an ion implanter which allows for precise determination whether or not the electrons are supplied from a plasma generation unit to a substrate normally, and to provide a state determination method of the ion implanter.SOLUTION: An ion implanter includes an ion implantation unit, a position detection unit, a charge supply unit, a current value detection unit, and a determination unit. The ion implantation unit implants ions into a substrate by scanning the surface of the substrate with an ion beam containing ions having positive charges. The position detection unit detects the scanning position of the ion beam on the substrate. The charge supply unit generates plasma, discharges the electrons contained in the plasma and supplies the electrons to the substrate. The current value detection unit detects a current value which changes depending on the amount of electrons discharged by the charge supply unit. The determination unit determines the charged state of the substrate based on the change in the current value incident to change in the scanning position.
摘要翻译：要解决的问题：提供一种离子注入机，其允许精确确定电子是否从等离子体发生单元正常供应到基板，并提供离子注入机的状态确定方法。解决方案：离子注入机包括离子注入单元，位置检测单元，电荷供应单元，电流值检测单元和确定单元。离子注入单元通过用包含具有正电荷的离子的离子束扫描衬底的表面而将离子注入到衬底中。位置检测单元检测离子束在基板上的扫描位置。电荷供给单元产生等离子体，对包含在等离子体中的电子进行放电，并将电子供给到基板。电流值检测单元检测根据由电荷供给单元放电的电子量而变化的电流值。确定单元基于入射到当前扫描位置的变化的当前值的变化来确定基板的充电状态。

8. 发明专利

JPH06302704A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH06302704A
公开(公告)日：1994-10-28
申请号：JP8888093
申请日：1993-04-15
申请人： TOSHIBA CORP
发明人： USUI TAKAKIMI , SHIBATA HIDEKI , NAGAMATSU TAKAHITO , NISHIYAMA YUKIO
IPC分类号： H01L21/768 , H01L21/316 , H01L21/318 , H01L23/522 , H01L23/538 , H01L21/90
摘要： PURPOSE:To enhance the propagation speed of signal in semiconductor device by forming an interlayer insulation film having low permittivity thereby decreasing the capacitance between wiring films. CONSTITUTION:The semiconductor device comprises a semiconductor substrate 1 on which a plurality of semiconductor elements are formed, a plurality of metal wiring films 2 formed on the semiconductor substrate 1 and connect between the semiconductor elements or between the semiconductor element and external terminals, silicon oxide film 3 deposited on the metal wiring film 2 and the semiconductor substrate 1 while containing fluorine for insulating the wiring films, and silicon oxide film 4 deposited on the silicon oxide 3 in order to block intrusion of moisture. This structure provides an interlayer insulation film having low permittivity.

9. 发明专利

JPS63265447A MANUFACTURE OF MULTILAYER INTERCONNECTION IN SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63265447A
公开(公告)日：1988-11-01
申请号：JP10102887
申请日：1987-04-23
申请人： TOSHIBA CORP
发明人： NAGAMATSU TAKAHITO , OKUMURA KATSUYA , ARAKI TOSHINOBU
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/3205
摘要： PURPOSE:To enable the forming of a multilayer interconnection which is small in its cost and high in its productivity, by using chemical etching means which are applicable to a resist film and a first interlayer film, respectively, without using an RIE method and next by flattening the first interlayer film. CONSTITUTION:A SiO2 film 12 is formed as a first interlayer film so as to cover an Al wiring 11. A low viscosity photoresist 13 is formed on a substrate. Subsequently the substrate is provided with a proper baking process, and next a developing solution with organic alkali, e.g., TMAH ((CH3)4N+OH ) contained as its basic element is dripped on the substrate. When the substrate is rotated and the SiO2 film 12 on the Al wiring 11 is exposed, resist etching is finished. The substrate is provided with a baking process, for example, at 140 deg.C and an etchant for SiO2 (for example with hydrofluoric acid contained as a basic element) is used to expose the SiO2 film 12 on the Al wiring and remove it by etching, so that the surface of the SiO2 film 12 is flattened. Subsequently the resist film 13 remaining on the SiO2 film 12 between wirings is removed to form a SiO2 film 14 as a second interlayer film, and a second layered Al wiring 16 is formed on the film 14.

10. 发明专利

JP2005129964A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005129964A
公开(公告)日：2005-05-19
申请号：JP2004337705
申请日：2004-11-22
申请人： Toshiba Corp , 株式会社東芝
发明人： NISHIYAMA YUKIO , NAKADA RENPEI , HAYASAKA NOBUO , OKANO HARUO , AOKI RIICHIRO , NAGAMATSU TAKAHITO , SATO AKIYOSHI , TOYOSAKI MASAO , ITO HITOSHI
IPC分类号： H01L21/768 , H01L21/316 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which has an SiO 2 film having a low dielectric constant and a low hygroscopic degree as compared with an SiO 2 film deposited by a conventional plasma CVD. SOLUTION: The semiconductor device has silicon oxide films 22, 24 and 26 as at least one layer among interlayer insulating films which electrically isolate wirings which form the semiconductor device. An F concentration in the silicon oxide film of the semiconductor device is more than 3 at%, and an N concentration is more than 1 at%. COPYRIGHT: (C)2005,JPO&NCIPI

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式