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1. 发明专利

JPH11330073A SEMICONDUCTOR DEVICE AND MANUFACTURE THEROF 失效
公开(公告)号：JPH11330073A
公开(公告)日：1999-11-30
申请号：JP13188698
申请日：1998-05-14
申请人： TOSHIBA CORP
发明人： USUI TAKAKIMI , ITO SACHIYO , WATABE TADAYOSHI , KANEKO HISAFUMI , EZAWA HIROKAZU
IPC分类号： H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To enhance the electromigration or stress migration resistance of wirings and suppress the deterioration of the characteristics and reliability by providing main wirings broken at break regions and auxiliary wirings formed beneath the main wirings and break regions, using a high melting point metal. SOLUTION: A high melting point metal film is formed and patterned into a normal etching process, etc., for forming auxiliary wirings 12, a part of an insulation film 13 on the auxiliary wiring 12 is left as a break region 15, so that the length of a groove 14 in the wiring length direction is less than the critical length of the main wiring 16 by the break region 15, a specified metal is filled in the grooves 14, and excess metal is removed to form the main wirings 16 where the characteristics and reliability can be suppressed from deteriorating due to the electromigration, etc., since the main wiring 16 is broken at the break region 15, and voids can be suppressed from developing by the auxiliary wirings 12 formed on the entire beneath the main wirings 16 and break regions 15.

2. 发明专利

JP2005019452A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2005019452A
公开(公告)日：2005-01-20
申请号：JP2003178237
申请日：2003-06-23
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUNAGA TAKESHI , USUI TAKAKIMI
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/822 , H01L23/367 , H01L23/485 , H01L27/04 , H01L29/417
CPC分类号： H01L24/05 , H01L23/367 , H01L23/3677 , H01L29/41725 , H01L2224/02166 , H01L2224/05093 , H01L2224/05556 , H01L2224/05624 , H01L2224/05647 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01055 , H01L2924/01074 , H01L2924/04953 , H01L2924/1306 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that also protects a wiring layer used in the surge current route of an ESD protective circuit by efficiently radiating the heat generated in the wiring layer. SOLUTION: This semiconductor device is provided with: an input protective circuit having a protective element which is connected to the wiring between an external terminal and an internal circuit, and protects the internal circuit from excessive electrostatic surge inputs impressed upon the external terminal; a first metallic wiring layer 25 connected to the input protective circuit and contained in the surge current route; and a radiator 20 connected to the first metallic wiring layer 25 and constituted by using wiring made of a material having good thermal conductivity. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种半导体器件，其还通过有效地辐射在布线层中产生的热量来保护用于ESD保护电路的浪涌电流路径中的布线层。解决方案：该半导体器件具有：输入保护电路，其具有与外部端子和内部电路之间的布线连接的保护元件，并且保护内部电路免受外部端子上施加的过多静电浪涌输入 ; 连接到输入保护电路并包含在浪涌电流路径中的第一金属布线层25; 以及连接到第一金属布线层25并由使用由具有良好导热性的材料制成的布线构成的散热器20。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2000340569A WIRING STRUCTRE OF SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF 失效
公开(公告)号：JP2000340569A
公开(公告)日：2000-12-08
申请号：JP2000074491
申请日：2000-03-16
申请人： TOSHIBA CORP
发明人： MATSUNAGA NORIAKI , ITO SACHIYO , USUI TAKAKIMI
IPC分类号： H01L23/52 , H01L21/312 , H01L21/3205 , H01L21/768 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To provide a wiring structure of a semiconductor device which can have an interlayer insulating film, having a low dielectric constant and can suppress generation of crackings in the insulating film under an electrode pad. SOLUTION: A first organic SOG(spin-on-glass) layer 13, a reinforcing insulating layer 14 of a silicon oxide or nitride film formed by a plasma CVD(chemical vapor deposition) method, and a second organic SOG layer 16 are formed on a wiring layer 12 in this order. A via hole 15 is made in the first SOG layer 13 and a reinforcing layer 14, and a groove 17 is made in the second SOG layer 16 corresponding to the hole 15. A conductive via plug 19 and an electrode pad 20 are formed embedded within the hole 15 and groove 17 respectively. A passivation layer 21 is formed on the second SOG layer 16, and an opening 22 is made in the layer 21 to expose the pad 20. A wire 23 is connected onto the pad 20 exposed to the opening 22.

4. 发明专利

JP2000269332A SEMICONDUCTOR DEVICE, MANUFACTURE THEREOF AND CONTACT BETWEEN CONDUCTIVE LAYERS 失效
公开(公告)号：JP2000269332A
公开(公告)日：2000-09-29
申请号：JP7306699
申请日：1999-03-18
申请人： TOSHIBA CORP
发明人： TOSHIMA HIROYUKI , USUI TAKAKIMI
IPC分类号： H01L23/52 , H01L21/28 , H01L21/3205 , H01L21/768
摘要： PROBLEM TO BE SOLVED: To make it possible to form via parts, contact parts and the like even though pretreatment filling of holes is not performed, thus to make it possible to raise also the yield of products. SOLUTION: A conductive oxide metal film 3 which shows a conductivity even though oxidized, or its oxide film 12 is formed on a lower wiring layer 5 or a semiconductor substrate or the like, which is used as the bottoms of via plugs 10 inserted in an LIS multilayer wiring or the like and the bottoms of contact holes. Thereafter, an interlayer insulating film 6 is laminated on the substrate and holes 8, such as vias, are bored until the surface of the film 3 or the oxide film is exposed to perform filling of the via parts and the like without a pretreatment.

5. 发明专利

JPH07135188A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH07135188A
公开(公告)日：1995-05-23
申请号：JP28219893
申请日：1993-11-11
申请人： TOSHIBA CORP
发明人： MATSUNAGA NORIAKI , SHIBATA HIDEKI , MATSUNOU TADASHI , USUI TAKAKIMI
IPC分类号： H01L21/285 , H01L21/28 , H01L21/768 , H01L23/522
摘要： PURPOSE:To ensure sufficiently the growth time for a buried electrode layer by a method wherein an interlayer connection hole is formed in an insulating layer in such a way that at least one part of the upper surface of a first conductive layer is exposed and the buried electrode layer is formed in such a way as to cover the surface of the first conductive layer. CONSTITUTION:A first conductive layer 3 having a plug material selective growth rate quicker than that of a second conductive layer 4b is exposed through the bottom of a via hole. Therefore, the growth of a buried electrode layer on the layer 3 is started much quicker than that of the buried electrode layer on the layer 4b. Accordingly, deposition of the material for the thicker buried electrode layer 5 on the layer 3 becomes possible during the time to take until breaking of a selectivity of the material for the layer 5 on the surface of an insulating layer 2b is generated. Moreover, the material for the layer 5 is not grown on the surface of the layer 2b by the formation of the layer 5 and a short-circuit between wirings is never caused. Thereby, the growth time for the layer 5 can be sufficiently ensured and the good buried electrode layer 5 can be formed.

6. 发明专利

JP2003324103A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2003324103A
公开(公告)日：2003-11-14
申请号：JP2003047728
申请日：2003-02-25
申请人： Toshiba Corp , 株式会社東芝
发明人： USUI TAKAKIMI , ITO SACHIYO
IPC分类号： H01L23/52 , H01L21/3205
CPC分类号： H01L24/05 , H01L2224/04042 , H01L2224/48463 , H01L2924/14 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device of which the radiation characteristic is improved, and the deterioration of performance and the deterioration of long-term reliability, etc., are prevented, and further, the improvement the performance is made possible. SOLUTION: The semiconductor device includes a semiconductor substrate 101 and a first insulation film 113 provided above the semiconductor substrate. A first wiring layer 117 is provided on the first insulation film. A second insulation film 118 is provided above the first wiring layer and the first insulation film. A first protection film 119 is provided above the second insulation film and is substantially formed of a metal material. A second protection film 122b is substantially formed of the passive state of the metal material, and is provided on the surface of the first protection film. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种改善了辐射特性的半导体器件，并且防止了性能的恶化和长期可靠性的劣化等，并且进一步提高了性能可能。解决方案：半导体器件包括半导体衬底101和设置在半导体衬底之上的第一绝缘膜113。第一布线层117设置在第一绝缘膜上。第二绝缘膜118设置在第一布线层和第一绝缘膜之上。第一保护膜119设置在第二绝缘膜的上方，并且基本上由金属材料形成。第二保护膜122b基本上由金属材料的被动状态形成，并且设置在第一保护膜的表面上。版权所有（C）2004，JPO

7. 发明专利

JP2003168709A RELIABILITY EVALUATING AND TESTING DEVICE, RELIABILITY EVALUATING AND TESTING SYSTEM, CONTACTOR, AND RELIABILITY EVALUATING AND TESTING METHOD 审中-公开
公开(公告)号：JP2003168709A
公开(公告)日：2003-06-13
申请号：JP2001367268
申请日：2001-11-30
申请人： TOKYO ELECTRON LTD , TOSHIBA CORP , IBIDEN CO LTD
发明人： TAKEKOSHI KIYOSHI , HOSAKA HISATOMI , HAGIWARA JUNICHI , HATSUKA KUNIHIKO , USUI TAKAKIMI , KANEKO HISAFUMI , HAYASAKA NOBUO , IDO YOSHIYUKI
IPC分类号： G01R31/26 , G01R1/04 , G01R31/28 , G01R31/30 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To provide a reliability evaluating and testing device and testing system, a contactor, and a reliability evaluating and testing method by which the reliability of a semiconductor element can be evaluated and tested quickly, efficiently, and highly reliably on a wafer level and, at the same time, the labor and cost required for the evaluation and tests can be reduced remarkably. SOLUTION: The reliability evaluating and testing device 10 is provided with an airtight heat-insulating wafer housing section, which houses a wafer W in a state where the electrode pads of a plurality of devices formed on the wafer W are collectively brought into electrical contact with the bumps of the contactor 11, and transmits and receives test signals to and from a measuring section 15. The wafer housing section has a pressing mechanism 13 which presses the contactor 11 against the wafer W and a heating mechanism 14 which directly heats the wafer W collectively brought into contact with the contactor 11 by means of the pressing mechanism 13 to a prescribed high temperature. The device 10 evaluates the reliability of wiring and insulating films formed on the wafer W under an accelerating condition. COPYRIGHT: (C)2003,JPO

8. 发明专利

JP2001274162A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2001274162A
公开(公告)日：2001-10-05
申请号：JP2000086383
申请日：2000-03-27
申请人： TOSHIBA CORP
发明人： HATANO SHOSUKE , USUI TAKAKIMI
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/768 , H01L23/485 , H01L23/532 , H01L23/538
摘要： PROBLEM TO BE SOLVED: To improve the characteristics and reliability of a semiconductor device having a Cu film for wiring and an Al film for pad connected to the Cu film. SOLUTION: This semiconductor device has the Cu film 23 constituting a wiring layer, an intermediate layer formed on the film 23, and the Al film 34 which is formed on the intermediate layer and becomes a pad layer. The intermediate layer is composed of a first high-melting point metal film 33a, a high-melting point metal nitride film 33b formed on the film 33a, and a second high-melting point metal film 33c formed on the film 33b.

9. 发明专利

JPH10242279A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH10242279A
公开(公告)日：1998-09-11
申请号：JP35038297
申请日：1997-12-19
申请人： TOSHIBA CORP
发明人： WADA JUNICHI , SAKATA ATSUKO , KATADA TOMIO , USUI TAKAKIMI , SHIBATA HIDEKI , HAYASAKA NOBUO , OKUMURA KATSUYA
IPC分类号： H01L21/28 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To provide highly reliable dual damascene wiring structure. SOLUTION: An insulating film 2 is made on an Si substrate which has a first wiring layer 1, and next, in the insulating film 2, a connection hole and a wiring groove are made to reach the wiring layer 1, and next, the connection hole is stopped with an Si film 7, and next, an Al film 8 and a Ti film 9 are made in order all over the surface, and next, the Ti film 9 is replaced with the Al film by heat treatment, and also, the Si film 7 is absorbed by the Ti film 9, whereby the connection hole and the wiring groove are filled with the Al film 8, and lastly, a Ti.Ti silicide film 10 consisting of the Ti being produced by making the Ti film 9 absorb the Si film 7 and surplus Ti is removed, and an Al plug, within the connection hole, and Al wiring, in the wiring groove, are made, respectively.

10. 发明专利

JPH1056018A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH1056018A
公开(公告)日：1998-02-24
申请号：JP16975497
申请日：1997-06-26
申请人： TOSHIBA CORP
发明人： OKAZAKI MOTOYA , USUI TAKAKIMI , OKUMURA KATSUYA
IPC分类号： H01L29/41 , H01L21/3205 , H01L23/52
摘要： PROBLEM TO BE SOLVED: To narrow the width of wiring and to enhance the current density for which the wiring can withstand while prventing the defect generated by electromigration. SOLUTION: A wiring 40 is composer of a plurality of wiring layers 42, 44, 46 and 48 which contain a plurality of metal grains 50 and arranged in parallel with each ether. The grain boundaries 60, located between the metal grains in the above-mentioned wiring layers, are connected with each other so that they form a bamboo stricture, and each wiring layer is separated by the distance (d). As the arrangement of the metal grains 50 in each wiring layer forms a bamboo structure, a void and other point defect in the structure can be substantially reduced to the minimum, and the generation of voids can be limited to the boundary region between the metal grains 50. The path where e3lectrons are allowed to flow become a straight line, and as the moving distance of electrons can be reduced, the affection to electromigration can be made small. As a result, current density can be enhanced while the width of the wiring is being narrowed.

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