专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPH0846986A AMPLITUDE LIMITER CIRCUIT 失效
公开(公告)号：JPH0846986A
公开(公告)日：1996-02-16
申请号：JP19489094
申请日：1994-07-27
申请人： HITACHI LTD , HITACHI VIDEO IND INF SYST INC , HITACHI MICROCOMPUTER SYST
发明人： SASAKI MASAHIRO , YAMAMOTO MOROHISA , NAKAGAWA TADASHI , TAKEBUCHI KENJI , TANABE HISANORI , ARAI IZUMI , KURIHARA TAKASHI , KASHIYA HIDEO
IPC分类号： H04N9/793 , H03G3/30 , H04N9/68
摘要： PURPOSE:To improve response to the variation of an input signal and to reduce and stabilize flickering at a transient time in processing a picture by adding linearity to a voltage signal for gain control so as to make a gain characteristic have linearity in over wide range. CONSTITUTION:After the input control voltage 4 of a smoothed color burst signal are converted into the current signals 5 and 6 of mutually opposite phases by a voltage-to-current converting circuit, the current signals 5 and 6 are converted into voltage signals 7 and 8 by a current-to-voltage converting circuit 2. The voltage signals 7 and 8 are logarithmic-compressed by respective diodes 13 and 14 and the signal 8 is made a voltage signal added with linearity by a prescribed resistor R1. The signals 7 and 8 are provided to the respective bases of balanced differential transistors Q2, Q3 and Q1, Q4, and the current signals of mutually opposite phases are provided to respective emitters 9 and 10 to obtain output current 12 and 13 which are gain-controlled. It is possible to make the gain characteristic with respect to control voltage have linearity over a wide range adding linearity to the signal 8 by the resistor R1 like this.

2. 发明专利

JPH08273106A MAGNETIC RECORDING CIRCUIT 失效
公开(公告)号：JPH08273106A
公开(公告)日：1996-10-18
申请号：JP9775195
申请日：1995-03-30
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： ARAI IZUMI , NAKAGAWA TADASHI
IPC分类号： G11B5/027 , G11B5/03
摘要： PURPOSE: To make the magnetic recording circuit of a sound system nonadjustable over a wide range by performing feedback of a bias current component superimposed over an input signal current and controlling it to be a prescrived value. CONSTITUTION: A resistor R2 is inserted in series a circuit for making a synthetic current ih obtained by superimposing the input sound signal current over the bias current generated by a bias oscillation circuit flow into a recording head. A voltage signal generated by the resistor R2 is amplified by an amplifier, and a frequency component corresponding to the bias current is taken out by a high pass filter HPF. Then, this bias current component is detected by a detecting circuit, and a current output corresponding to a difference from a reference voltage Vth is taken out. A bias current source Ia is added to or subtracted from this current output to drive a transistor Q2, so that the bias oscillation circuit is controlled, and hence the bias current is controlled to a desired value.

3. 发明专利

JPH098557A FREQUENCY DISCRIMINATING CIRCUIT 失效
公开(公告)号：JPH098557A
公开(公告)日：1997-01-10
申请号：JP14924395
申请日：1995-06-15
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： KANESHIRO KATSUMI , NAKAGAWA TADASHI , TAKEBUCHI KENJI , HORI HIROYUKI , YAMAMOTO MOROHISA
IPC分类号： H03D13/00
摘要： PURPOSE: To unnecessitate a phase shift circuit and to discriminate the frequency of an input signal with high accuracy without receiving effect of the dispersion in elements so much by converting the frequency of the input signal to acquire a voltage regardless of phase and making it possible to discriminate the frequency. CONSTITUTION: This circuit is provided with a first pulse generation circuit 1 forming a first pulse having the width corresponding to the frequency of an input signal V1 for each fixed period and a second pulse generation circuit 2 forming a second pulse having the width corresponding to the frequency of a reference signal V2 for each fixed period. The circuit is provided with capacity C1 to be charged or discharged by constant current for a first pulse period and to be charged or discharged by constant current for a second pulse period. Namely, the constant current charge (or discharge) of the capacity C1 is performed for the first pulse period, the constant current discharge (or charge) of the capacity C1 is performed for the second pulse period and the potential of the capacity C1 is taken out as the frequency discriminating output of an input signal V1.

4. 发明专利

JPH0818919A FM MODULATION CIRCUIT 失效
公开(公告)号：JPH0818919A
公开(公告)日：1996-01-19
申请号：JP16904894
申请日：1994-06-28
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST , VICTOR COMPANY OF JAPAN
发明人： KANESHIRO KATSUMI , YAMAMOTO MOROHISA , NAKAGAWA TADASHI , TAKEBUCHI KENJI , HORI HIROYUKI , HORI NOBUO , TANIDA YASUYUKI
IPC分类号： H04N5/922 , H03C3/09
摘要： PURPOSE:To obtain the FM modulation circuit in which an FM carrier frequency and an FM deviation are adjusted automatically with high accuracy and excellent reproduction performance, number of external terminals and external components is reduced and no-adjustment is realized. CONSTITUTION:A voltage clamping circuit 1 and an amplitude control circuit 2 make a peak level of a synchronizing signal in a video signal match with a 1st reference potential and a pedestal level match with a 2nd reference potential, and a DC current corresponding to the carrier frequency is formed by applying a reference voltage corresponding to a clamp voltage of a voltage clamp circuit 6 to a 1st resistive element. An output signal via the voltage clamping circuit 1 and the amplitude control circuit 2 is fed to a 2nd resistive element to generate an AC current corresponding to a luminance signal and the DC current and the AC current are fed to an oscillation circuit 8 via a current variable circuit 7 as a frequency control signal. Then a capacitor is charged or discharged by a 1st constant current for a 1st pulse period for an oscillation signal corresponding to a synchronizing signal period.

5. 发明专利

JPH11164317A VIDEO SIGNAL PROCESSING UNIT 失效
公开(公告)号：JPH11164317A
公开(公告)日：1999-06-18
申请号：JP32643897
申请日：1997-11-27
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： MAYUZUMI SHIRO , YAMAZAKI KOICHI , HIRANO TOSHIAKI , KAMEGAKI KAZUYUKI , HOSHINO KATSUMI , NAKAGAWA TADASHI , ICHIKAWA YOSHIHISA , OKADA YOSHITAKA , MORI SHUNJI , TAKAYAMA ETSUTAKA , KITAMURA YUKINORI , KOBAYASHI YUJI , TAKEBUCHI KENJI , KURIHARA TAKASHI
IPC分类号： H04N9/793
摘要： PROBLEM TO BE SOLVED: To provide the technology that suppresses a crosstalk up to a practical level and attains one chip processing of a recording and reproducing preamplifier and a luminance signal and color signal processing circuit. SOLUTION: A recording and reproducing preamplifier 2 and a luminance signal and color signal processing circuit 3 are formed on one semiconductor chip. Then a mode changeover control circuit (logic circuit section having a changeover control circuit 4) consisting of an IIL (integrated injection logic) having been included in the circuits 2, 3 is placed between the recording and reproducing preamplifier 2 and the luminance signal and color signal processing circuit 3 to surround the IIL circuit around the recording and reproducing preamplifier 2.

6. 发明专利

JPH0583060A ELECTRONIC VOLUME 失效
公开(公告)号：JPH0583060A
公开(公告)日：1993-04-02
申请号：JP26885891
申请日：1991-09-19
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： NAGAI SATOKO , YONETANI NOBUAKI , MATSUDA KATSUHISA , NAKAGAWA TADASHI
IPC分类号： H03F1/30 , H03G3/30
摘要： PURPOSE:To cancel a temperature characteristic included in a delivered quantity by applying variable control to a signal current delivery quantity from a bipolar transistor(TR) depending on a difference between a control voltage and a reference voltage and providing a temperature characteristic varying in response to a reciprocal of an absolute temperature to the difference. CONSTITUTION:A current conversion section 11 converts an analog input signal voltage Vin into a current signal. A transmission control section 12 delivers a signal current through a current mirror comprising a bipolar transistor(TR) and the delivery quantity of a signal current is subject to variable control in response to a difference between a control voltage Vcnt and a reference voltage VR. A voltage conversion section 13 converts an output current of the control section 12 into an analog output signal voltage Vout. A constant current I1 is fed from a output signal potential Vcc to a collector of a bipolar TrQ1 in a compensation voltage generating circuit 2, a band gap voltage Vbg is given to an emitter and a voltage V1 shifted toward the potential Vcc by a base- emitter voltage of the TrQ1 from the voltage Vbg is outputted from the collector. Thus, the temperature characteristic in a parameter of the delivery quantity is cancelled efficiently.

7. 发明专利

JPS6038936A RECEIVER 失效
公开(公告)号：JPS6038936A
公开(公告)日：1985-02-28
申请号：JP14651383
申请日：1983-08-12
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： KAWAMOTO MIKIHIKO , NAKAGAWA TADASHI
IPC分类号： H04B1/16 , H03J5/02 , H03J7/28
摘要： PURPOSE:To save a narrow band filter or the like being an externally mounted component in case of circuit integration by obtaining a sound signal and a so- called stop signal for conducting digital tuning from a synchronism detecting circuit. CONSTITUTION:In receiving a certain broadcast radio wave corresponding to a frequency dividing ratio M of a programmable divider 10, when the level of an intermediate frequency signal obtained from a frequency mixing circuit 3 of a PLL circuit comprising 7, 8, 9, 3, 16 and 17 is large and the signal is locked accurately to the output of a reference frequency oscillating circuit 5, its lock detecting signal indicates the automatic search of a broadcast station. On the other hand, accurate locking is impossible, a central processing unit 20 changes the frequency dividing ratio of the divider 10. Since the PLL circuits have a prescribed lock-in range or capture range and the synchronism detecting circuits 18, 18' detect the said relation of synchronism, no narrow band filter is required.

8. 发明专利

JPS5691538A PLL FREQUENCY SYNTHESIZER TUNER 失效
公开(公告)号：JPS5691538A
公开(公告)日：1981-07-24
申请号：JP16839679
申请日：1979-12-26
申请人： HITACHI LTD , HITACHI OME ELECTRONIC CO
发明人： NAKAGAWA TADASHI
IPC分类号： H03J7/28 , H03L7/193 , H04B1/26
摘要： PURPOSE:To perform stable channel selecting operation by changing frequency dividing ratios of a prescaler by receiving N-1 count output of a program counter. CONSTITUTION:This tuner is provided with flip-flop circuit 6 that receives N-1 count detection output (a) in response to the N-value set output of program counter 4 and then regards output (phi) of prescaler 3 as a clock signal, and the frequency- dividing-ratio changeover signal of prescaler 3 is generated by its output. Program counters 4 and 5 are reset by the M count output of program counter 5 set to count value M. The output of counter 5 is compared with the frequency division output of oscillator 8 by phase comparator 7 to control local oscillating circuit 2, receiving a signal of a desired frequency.

9. 发明专利

JPS63228805A SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPS63228805A
公开(公告)日：1988-09-22
申请号：JP6095587
申请日：1987-03-18
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAGAWA TADASHI , TAKEBUCHI KENJI , ARAI IZUMI
IPC分类号： H03F3/34 , H03F3/45 , H03G11/00
摘要： PURPOSE:To improve the dynamic offset by using a current control circuit which drives a current mirror circuit that working as an active load to a variable gain amplifier with a control signal and a current adversely proportional to a drive current. CONSTITUTION:For a variable gain amplifier 2, the transistors TR Q3 and Q4 perform the amplifying operations and a TR Q5 controls a current Io corresponding to a control current ICONT. An output current Iout corresponding to Io/2-i is obtained from a current mirror circuit 3. At the same time, an output current Iout' corresponding to Io/2+i is obtained from a current mirror circuit 4. The TR Q12, Q13 and Q14 form a current mirror circuit 6 and suck a current of (Iout'-Iout). As a result, the DC components of reference currents IX and IY of both circuits 3 and 4 are set at an approximately fixed current value regardless of the level of the current ICONT. Then, the dynamic offset of an output signal Vout is improved.

10. 发明专利

JPS60223348A FM MULTIPLEX DEMODULATING CIRCUIT 失效
公开(公告)号：JPS60223348A
公开(公告)日：1985-11-07
申请号：JP7856584
申请日：1984-04-20
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： NAKAGAWA TADASHI , KAWAMOTO MIKIHIKO
IPC分类号： H03D1/22 , H04H1/00 , H04H20/47 , H04H40/45 , H04H40/54
摘要： PURPOSE:To prevent decrease in degree of separation of an L signal and an R signal without changing the duty ratio by detecting a level when a power supply voltage is decreased to drive a switching means. CONSTITUTION:When a level of a +Vcc power supply is decreased to a prescribed level or below, transistors (TRs) Q5, Q6 are driven into ON state. As a result, bases of TRs Q3, Q4 are connected forcibly to GND and the TRs Q3, Q4 are both turned off. That is, even when either of the TRs Q3, Q4 is turned off, the other TR is operated and there is no inconvenience that the duty ratio of the Q and Q' outputs is different. When the level of the +Vcc power supply is decreased, the oscillation of a flip-flop circuit is prevented, a stereophonic switch 12 is turned off completely by an output of an inverter 21, then no subcarrier signal is fed to a decoder 11. Thus, the degree of separation between R and L signals is not decreased in the stereo demodulation circuit.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式