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1. 发明专利

JPH07334359A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH07334359A
公开(公告)日：1995-12-22
申请号：JP12230294
申请日：1994-06-03
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： HAYAKAWA AKIO
IPC分类号： G06F12/14 , G06F9/06 , G06F15/78 , G06F21/22 , G06F21/24
摘要： PURPOSE:To make program analysis difficult by ciphering data concerning the semiconductor integrated circuit device connected through an external bus to an external memory. CONSTITUTION:An external memory 1 stores instruction data ciphered in advance and an offset register 7 stores an offset value as a value to cipher the data in advance. When the instruction data are outputted from the external memory 1 to a data buffer 4, the offset value is erased by the offset register 7, and those data are outputted to a CPU 6. When outputting the instruction data from the CPU 6 to the external memory 1, the offset value in the offset register 7 is added t6 the instruction data inputted to the data buffer 4. Thus, the instruction data are ciphered and the program analysis is made difficult.

2. 发明专利

JPH07311706A MEMORY DELIMITATION POINT DETECTING METHOD 失效
公开(公告)号：JPH07311706A
公开(公告)日：1995-11-28
申请号：JP12679394
申请日：1994-05-17
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： INOUE MASAYUKI , TANAKA SHINICHI , SETA KOICHI
IPC分类号： G06F12/06
摘要： PURPOSE:To provide a technology for accurately checking memory delimitation point setting. CONSTITUTION:As for a basic memory 12 and an extended memory 13, a different data pattern is set in one starting word of a memory delimitation point setting unit (memory block) of a data transfer device 14, and an end pattern is set in the end blocks of the basic memory 12 and extended memory 13, and then, the data transfer device 14 is placed in operation to transfer stored data of the basic memory 12 and extended memory 13 to an auxiliary storage device 16, and data before and after this transfer are compared to decide whether or not the memory delimitation point setting is proper.

3. 发明专利

JPH07307320A CASSETTE JIG FOR ACCOMMODATING BOARDS 失效
公开(公告)号：JPH07307320A
公开(公告)日：1995-11-21
申请号：JP9717594
申请日：1994-05-11
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： UESAWA KOUZOU
IPC分类号： B65D85/86 , B65G49/07 , H01L21/304 , H01L21/673 , H01L21/68 , H05K3/26
摘要： PURPOSE:To prevent re-adhesion of cleaning fluid to a substrate surface, by installing an introduction part member which comes into contact with the lowermost part at the time of accommodating a substrate, and has inclination facing downward further than the lowermost part of the substrate, between ''the lowermost part and the region led out to the outside of the substrate arrangement. CONSTITUTION:In a frame body 2, an introduction part member 3 is installed which comes into contact with a region 4A which turns to the lowermost part of a wafer when a semiconductor wafer 4 is accommodated in each accommodation trench 2B. The introduction part member 3 has a contact region 3A coming into contact with the lowermost region 4A, and an inclination on the rear 3B facing the contact region 3A. The inclination on the rear 3B faces from the arrangement region of semiconductor wafers 4 (arrangement region of the accommodation trenches 2B) toward a vacant region 2A constituted on the initial stage side or the final stage side of the arrangement region of the semiconductor wafers 4, and is constituted in a region facing downward further than the lowermost region 4A of each of the semiconductor wafers 4.

4. 发明专利

JPH07302191A MICROPROCESSOR AND DATA CONVERSION METHOD THEREOF 失效
公开(公告)号：JPH07302191A
公开(公告)日：1995-11-14
申请号：JP9321494
申请日：1994-05-02
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： KURIHARA KIYOSHI , IDO SHINICHI , URA HAJIME , OTSUKA KIKUO
IPC分类号： G06F7/548
摘要： PURPOSE:To provide the microprocessor in which shift conversion processing between data in row and column directions such as font data and image data at a high speed. CONSTITUTION:The microprocessor used for a printer processing and printing out font data or image data expressing characters and graphics is made up of a bus interface, an instruction decoder, a control section, an arithmetic section, a register and a program counter or the like. General-purpose registers 0 to 7 (51) are provided as the registers and a carry register 52 storing simultaneously the information of carry bit generated simultaneously from a most significant bit of the general-purpose register 51. When the information of the general- purpose registers 51 are subject to shift conversion processing at once by a left shift instruction and the information of the carry bit produced is stored simultaneously in the carry register 52.

5. 发明专利

JPH07302170A DISK CONTROLLER 失效
公开(公告)号：JPH07302170A
公开(公告)日：1995-11-14
申请号：JP9605494
申请日：1994-05-10
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： WATANABE HARUAKI , TSUBOI TOSHIAKI , YAMAKAMI KENJI , YAMAMOTO AKIRA , KANBAYASHI KIMISAKI , SATO TAKAO
IPC分类号： G06F12/08 , G06F3/06 , G06F13/10
摘要： PURPOSE:To transfer data from a disk device to a cache efficiently by minimizing waiting time of rotation of a storage medium when information of plural logic tracks is transferred from the disk device whose physical track is formed into plural logic tracks to the cache. CONSTITUTION:A control processor 20 in a disk controller 3 decides the transfer sequence when a disk device 2 transfers data of plural logic tracks to a cache 30 depending on an input output request from a central processing unit 1 by taking the arrangement of transferred data in logic tracks into account so as to minimize the rotation wait time of a storage medium between the transferred data of the logic tracks. Then the data are transferred according to the decided transfer sequence.

6. 发明专利

JPH07297644A FREQUENCY CONVERSION CIRCUIT 失效
公开(公告)号：JPH07297644A
公开(公告)日：1995-11-10
申请号：JP8875194
申请日：1994-04-26
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： KURIHARA TAKASHI , ARAI IZUMI , KURABAYASHI NAOKI , YAMAMOTO MOROHISA , FURUHATA MAKOTO
IPC分类号： H04N9/83 , H03C1/54
摘要： PURPOSE:To extremely reduce the leakage frequency component without preventing the construction of a semiconductor integrated circuit and its cost reduction. CONSTITUTION:When the input frequency f1 is converted into f2+ or -f1 by the conversion frequency f2, an input signal is divided into a positive phase one and a negative phase one/and transmitted by the use of two-transmission circuits. These two transmission outputs are alternately switched and connected to an output terminal synchronously with the frequency f2. At the same time, the connection is alternately switched synchronously with the frequency f2 between two bias circuits which sets the output bias levels of two transmission circuits respectively and these transmission circuits. Therefore the voltage set by the same bias circuit always emerges at each output terminal regardless of the conversion signal. Then the influence due to the variability caused between both bias circuits can be eliminated.

7. 发明专利

JPH07287663A POWER VOLTAGE MONITOR SYSTEM 失效
公开(公告)号：JPH07287663A
公开(公告)日：1995-10-31
申请号：JP10176194
申请日：1994-04-18
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： SUZUKI TATSUYA , NAITO YOSHIRO , AOTO GIICHI
IPC分类号： G06F1/28 , G06F11/22
摘要： PURPOSE:To provide a power voltage monitor system which can easily decide the basic potential of the power voltage and also can selectively switch the identified potentials for the abnormal drop of the power voltage in response to the basic potential and then to improve the functional performance of an emulator including a user power abnormality detecting part, etc. CONSTITUTION:A user power abnormality detecting part UVCM includes a potential deciding circuit which decides the basic potential of the user power voltage UVCC based on the frequency of the clock signal CLK of a microprocessor. Then the voltage comparators VCP1 and VCP2 are provided together with the AND gates AG1 AG2 and an OR gate OG1. Thus the abnormal drop of the voltage UVCC is identified and a user power voltage abnormality detection signal UVCE and a decode inhibition signal DECI are produced. In such a constitution of an abnormal voltage detection circuit, the identified potentials can be selectively switched based on the deciding result of the basic potential.

8. 发明专利

JPH07283988A IMAGE PICKUP DEVICE 失效
公开(公告)号：JPH07283988A
公开(公告)日：1995-10-27
申请号：JP9296894
申请日：1994-04-06
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： TAKAHASHI TAKASHI , TAKAHASHI HIROMASA
IPC分类号： H04N5/228
摘要： PURPOSE:To provide a houshold video camera by which a zoomed up video can be inserted partially to a wide-angle photographed video without providing two systems of optical lenses, etc., and to heighten operability and convenience without impairing the feature of the household video camera for which a low price, small size and light weight are requested, etc. CONSTITUTION:The optical lens without a zoom function. video memory which holds the video of an original video photographed at a wide angle via the optical lens and converted to a digital signal for a prescribed period, and an address switching part which expands the center part of the designated frame FD of the original video out of, for example, four frames FA-FD partially by delaying the essential address progression for the video memory selectively and superimposes it on the designated frame FD of the original video exclusively are provided in the household video camera provided with an electronic zoom function, etc.

9. 发明专利

JPH0636636B2 失效
公开(公告)号：JPH0636636B2
公开(公告)日：1994-05-11
申请号：JP13316784
申请日：1984-06-29
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： IZUMIDA YUUJI , MUKAEMACHI TAKUJI
IPC分类号： H04Q3/42 , H04Q3/52 , H04Q11/04

10. 发明专利

JPH0568559B2 失效
公开(公告)号：JPH0568559B2
公开(公告)日：1993-09-29
申请号：JP25479985
申请日：1985-11-15
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： ICHIHARA SEIICHI , MYAMOTO KEIJI , OKUDAIRA HIROAKI
IPC分类号： H01L21/60 , C25D17/00 , C25D17/10 , C25D21/10 , H05K3/18 , H05K3/24 , H01L21/321

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