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1. 发明公开

EP3220414A4 POLYCRYSTALLINE OXIDE THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND PREPARATION METHOD THEREFOR 有权
公开(公告)号：EP3220414A4
公开(公告)日：2018-06-20
申请号：EP15778180
申请日：2015-04-10
申请人： BOE TECHNOLOGY GROUP CO LTD
发明人： HU HEHE
IPC分类号： H01L29/786 , H01L21/02 , H01L21/465 , H01L27/12 , H01L29/66
CPC分类号： H01L27/127 , H01L21/02274 , H01L21/02472 , H01L21/02483 , H01L21/02554 , H01L21/02565 , H01L21/02592 , H01L21/02631 , H01L21/465 , H01L21/469 , H01L21/477 , H01L21/77 , H01L27/12 , H01L27/1225 , H01L27/1274 , H01L27/1296 , H01L29/10 , H01L29/66969 , H01L29/786 , H01L29/7869
摘要： This invention provides a polycrystalline oxide thin-film transistor (TFT) array substrate and a method of manufacturing the same. As the polycrystalline oxide thin film layer of the polycrystalline oxide TFT array substrate is formed by a two-step process according to the present invention, the ultra-high temperature annealing process required in the prior art is obviated, and the object of producing a polycrystalline oxide TFT array substrate by the existing manufacturing facilities of the amorphous oxide TFT array substrates is achieved without adding any special equipment or special operation, and it is easy to implement; meanwhile, the energy consumption is reduced as the high temperature annealing is no longer needed.

2. 发明授权

EP3080834B1 STRESS MITIGATING AMORPHOUS SIO2 INTERLAYER 失效转让
公开(公告)号：EP3080834B1
公开(公告)日：2018-05-23
申请号：EP14864943.7
申请日：2014-10-27
申请人： Translucent, Inc.
发明人： DARGIS, Rytis , CLARK, Andrew , ARKUN, Erdem
IPC分类号： H01L21/20 , C30B25/18 , C30B25/22 , C30B29/16 , C30B29/40
CPC分类号： H01L21/02488 , C30B25/183 , C30B25/22 , C30B29/16 , C30B29/403 , H01L21/02381 , H01L21/02433 , H01L21/02483 , H01L21/02505 , H01L21/0254 , H01L33/007 , H01L33/12 , H01L33/32
摘要： A method of forming a REO dielectric layer and a layer of a-Si between a III-N layer and a silicon substrate. The method includes depositing single crystal REO on the substrate. The single crystal REO has a lattice constant adjacent the substrate matching the lattice constant of the substrate and a lattice constant matching a selected III-N material adjacent an upper surface. A uniform layer of a-Si is formed on the REO. A second layer of REO is deposited on the layer of a-Si with the temperature required for epitaxial growth crystallizing the layer of a-Si and the crystallized silicon being transformed to amorphous silicon after transferring the lattice constant of the selected III-N material of the first layer of REO to the second layer of REO, and a single crystal layer of the selected III-N material deposited on the second layer of REO.

3. 发明授权

EP1796180B1 LIGHT EMITTING ELEMENT AND ITS MANUFACTURING METHOD 有权转让
标题翻译：发光元件及其制造方法
公开(公告)号：EP1796180B1
公开(公告)日：2017-06-07
申请号：EP05777119.8
申请日：2005-08-30
申请人： Sophia School Corporation
发明人： KIKUCHI, Akihiko , KISHINO, Katsumi
IPC分类号： H01L21/02 , H01L33/08 , H01S5/183 , C30B25/02 , H01L33/18 , H01S5/343
CPC分类号： H01L21/0254 , B82Y20/00 , C30B23/002 , C30B25/02 , C30B29/16 , C30B29/403 , C30B29/605 , H01L21/0237 , H01L21/02381 , H01L21/0242 , H01L21/02458 , H01L21/02472 , H01L21/02483 , H01L21/02505 , H01L21/02554 , H01L21/02565 , H01L21/02603 , H01L21/0262 , H01L33/007 , H01L33/0079 , H01L33/08 , H01L33/18 , H01S5/021 , H01S5/041 , H01S5/183 , H01S5/3202 , H01S5/3412 , H01S5/34333 , H01S2304/04

4. 发明公开

EP2946402A4 AIN/GAN LAYERS GROWN ON REO/SILICON 审中-公开
标题翻译：在REO / SILICON上的AIN / GAN层
公开(公告)号：EP2946402A4
公开(公告)日：2016-10-12
申请号：EP14740183
申请日：2014-01-03
申请人： TRANSLUCENT INC
发明人： ARKUN ERDEM , LEBBY MICHAEL , CLARK ANDREW , DARGIS RYTIS
IPC分类号： H01L21/20 , H01L21/314 , H01L33/00 , H01L33/02 , H01L33/32
CPC分类号： H01L21/02458 , H01L21/02381 , H01L21/02433 , H01L21/02483 , H01L21/02507 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L29/1075 , H01L29/2003 , H01L29/7786 , H01L33/007 , H01L33/02 , H01L33/32

5. 发明授权

EP2371989B1 Methods of forming a conductive transparent oxide film layer for use in a cadmium telluride based thin film photovoltaic device 有权
标题翻译：一种用于在基于碲化镉的薄膜光伏器件形成用于导电透明Oxidfolienschicht方法
公开(公告)号：EP2371989B1
公开(公告)日：2016-08-10
申请号：EP11160306.4
申请日：2011-03-29
申请人： First Solar Malaysia SDN.BHD
发明人： Feldman-Peaboy, Scott Daniel , Drayton, Jennifer Ann , Gossman, Robert Dwayne , Sadeghi, Mehran
IPC分类号： C23C14/08 , C23C14/34 , C23C14/58 , H01L31/18
CPC分类号： C23C14/086 , C23C14/34 , C23C14/5806 , H01L21/02422 , H01L21/02472 , H01L21/02483 , H01L21/02491 , H01L21/02502 , H01L21/02557 , H01L21/02631 , H01L31/073 , H01L31/1836 , H01L31/1884 , Y02E10/543 , Y02P70/521

6. 发明公开

EP2946402A1 AIN/GAN LAYERS GROWN ON REO/SILICON 审中-公开
标题翻译：在REO / SILICON上生长的AIN / GAN层
公开(公告)号：EP2946402A1
公开(公告)日：2015-11-25
申请号：EP14740183.0
申请日：2014-01-03
申请人： Translucent, Inc.
发明人： ARKUN, Erdem , LEBBY, Michael , CLARK, Andrew , DARGIS, Rytis
IPC分类号： H01L21/20 , H01L21/36 , H01L21/314
CPC分类号： H01L21/02458 , H01L21/02381 , H01L21/02433 , H01L21/02483 , H01L21/02507 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L29/1075 , H01L29/2003 , H01L29/7786 , H01L33/007 , H01L33/02 , H01L33/32
摘要： III-N material grown on a silicon substrate includes a single crystal rare earth oxide layer positioned on a silicon substrate. The rare earth oxide is substantially crystal lattice matched to the surface of the silicon substrate. A first layer of III-N material is positioned on the surface of the rare earth oxide layer. An inter-layer of aluminum nitride (A1N) is positioned on the surface of the first layer of III-N material and an additional layer of III-N material is positioned on the surface of the inter-layer of aluminum nitride. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer.
摘要翻译：生长在硅衬底上的III-N材料包括位于硅衬底上的单晶稀土氧化物层。稀土氧化物基本上与硅衬底表面的晶格匹配。第一层III-N材料位于稀土氧化物层的表面上。氮化铝（AlN）层位于III-N材料的第一层的表面上，而另一层III-N材料位于氮化铝层的表面上。将氮化铝层和附加III-N材料层重复n次以减少或设计最终III-N层中的应变。

7. 发明公开

EP2371989A1 Methods of forming a conductive transparent oxide film layer for use in a cadmium telluride based thin film photovoltaic device 有权
标题翻译：一种用于在基于碲化镉的薄膜光伏器件形成用于导电透明Oxidfolienschicht方法
公开(公告)号：EP2371989A1
公开(公告)日：2011-10-05
申请号：EP11160306.4
申请日：2011-03-29
申请人： PrimeStar Solar, Inc
发明人： Feldman-Peaboy, Scott Daniel , Drayton, Jennifer Ann , Gossman, Robert Dwayne , Sadeghi, Mehran
IPC分类号： C23C14/08 , C23C14/34 , C23C14/58 , H01L31/18
CPC分类号： C23C14/086 , C23C14/34 , C23C14/5806 , H01L21/02422 , H01L21/02472 , H01L21/02483 , H01L21/02491 , H01L21/02502 , H01L21/02557 , H01L21/02631 , H01L31/073 , H01L31/1836 , H01L31/1884 , Y02E10/543 , Y02P70/521
摘要： Methods are generally provided for forming a conductive oxide layer (14) on a substrate (12). In one particular embodiment, the method can include sputtering a transparent conductive oxide layer (14) on a substrate (12) at a sputtering temperature from about 10° C to about 100° C. A cap layer (15) including cadmium sulfide can be deposited directly on the transparent conductive oxide layer (14). The transparent conductive oxide layer (14) can be annealed at an anneal temperature from about 450° C to about 650° C.
Methods are also generally provided for manufacturing a cadmium telluride based thin film photovoltaic device (10). An intermediate substrate is also generally provided for use to manufacture a thin film photovoltaic device (10).
摘要翻译：提供了用于在衬底（12）上形成通常的导电性氧化物层（14）的方法。在一个具体实施方案中，该方法可以包括从约10℃在溅射温度的基板（12）上溅镀透明导电氧化物层（14）至约100℃包含硫化镉的帽层（15）可以是所述透明导电氧化物层（14）上直接沉积。所述透明导电氧化物层（14）可在退火在退火温度从约450℃至约650℃的方法，因此提供了用于制造基于碲化镉的薄膜光伏器件（10）基因的反弹。因此中间基材是提供一种用于制造薄膜光伏装置（10）基因的反弹。

8. 发明授权

EP1391941B1 PRODUCTION METHOD FOR A LIGHT EMITTING ELEMENT 有权
标题翻译：对于发光元件的生产过程
公开(公告)号：EP1391941B1
公开(公告)日：2008-12-31
申请号：EP02720596.2
申请日：2002-04-25
申请人： Shin-Etsu Handotai Co., Ltd.
发明人： ISHIZAKI, Jun-ya, Shin-Etsu Handotai Co., Ltd.
IPC分类号： H01L33/00 , H01L21/365 , C23C16/30
CPC分类号： C30B25/183 , C23C16/40 , C30B25/02 , C30B25/105 , C30B29/16 , H01L21/0242 , H01L21/02472 , H01L21/02477 , H01L21/0248 , H01L21/02483 , H01L21/02507 , H01L21/02554 , H01L21/02565 , H01L21/02579 , H01L21/0262 , H01L33/0083
摘要： In a first invention, a p-type MgxZn1-xO-type layer is grown based on a metal organic vapor-phase epitaxy process by supplying organometallic gases which serves as a metal source, an oxygen component source gas and a p-type dopant gas into a reaction vessel. During and/or after completion of the growth of the p-type MgxZn1-xO-type layer, the MgxZn1-xO-type thereof is annealed in an oxygen-containing atmosphere. This is successful in forming the layer of p-type oxide in a highly reproducible and stable manner for use in light emitting device having the layer of p-type oxide of Zn and Mg. In a second invention, a semiconductor layer which composes the light emitting layer portion is grown by introducing source gases in a reaction vessel having the substrate housed therein, and by depositing a semiconductor material produced by chemical reactions of the source gas on the main surface of the substrate. A vapor-phase epitaxy process of the semiconductor layer is proceed while irradiating ultraviolet light to the main surface of the substrate and the source gases. This is successful in sharply enhancing reaction efficiency of the source gases when the semiconductor layer for composing the light emitting layer portion is formed by a vapor-phase epitaxy process, and in readily obtaining the semiconductor layer having only a less amount of crystal defects. In a third invention, a buffer layer having at least an MgaZn1-aO-type oxide layer on the contact side with the light emitting layer portion is grown on the substrate, and the light emitting layer portion is grown on the buffer layer. The buffer layer is oriented so as to align the c-axis thereof to the thickness-wise direction, and is obtained by forming a metal monoatomic layer on the substrate based on the atomic layer epitaxy, and then by growing residual oxygen atom layers and the metal atom layers. This is successful in obtaining the light emitting portion with an excellent quality. In a fourth invention, a ZnO-base semiconductor active layer included in a double heterostructured, light emitting layer portion is formed using a ZnO-base semiconductor mainly composed of ZnO containing Se or Te, so as to introduce Se or Te, the elements in the same Group with oxygen, into oxygen deficiency sites in the ZnO crystal possibly produced during the formation process of the active layer, to thereby improve crystallinity of the active layer. Introduction of Se or Te shifts the emission wavelength obtainable from the active layer towards longer wavelength regions as compared with the active layer composed of ZnO having a band gap energy causative of shorter wavelength light than blue light. This is contributive to realization of blue-light emitting devices.

9. 发明公开

EP0874405A2 GaN group crystal base member having low dislocation density, use thereof and manufacturing methods thereof 失效
标题翻译： Element auf Basis von GaN mit niedriger Versetzungsdichte，seine Verwendung und Herstellungsverfahren
公开(公告)号：EP0874405A2
公开(公告)日：1998-10-28
申请号：EP98105090.9
申请日：1998-03-20
申请人： Mitsubishi Cable Industries, Ltd.
发明人： Kazuyuki, Tadatomo, c/o Itami Factory , Okagawa, Hiroaki, c/o Itami Factory , Ohuchi, Youichiro, c/o Itami Factory , Miyashita, Keiji, c/o Itami Factory , Hiramatsu, Kazumasa , Sawaki, Nobuhiko , Yahashi, Katsunori , Shibata, Takumi
IPC分类号： H01L33/00 , H01S3/19
CPC分类号： H01L33/32 , H01L21/02389 , H01L21/0242 , H01L21/02458 , H01L21/02483 , H01L21/0254 , H01L21/0262 , H01L21/02647 , H01L33/007 , H01L33/025 , H01S5/0213 , H01S5/22 , H01S5/32341 , H01S2301/173 , H01S2304/12
摘要： A GaN group crystal base member comprising a base substrate, a mask layer partially covering the surface of said base substrate to give a masked region, and a GaN group crystal layer grown thereon to cover the mask layer, which is partially in direct contact with the non-masked region of the base substrate, use thereof for a semiconductor element, manufacturing methods thereof and a method for controlling a dislocation line. The manufacturing method of the present invention is capable of making a part in the GaN group crystal layer, which is above a masked region or non-masked region, have a low dislocation density.
摘要翻译：一种GaN基晶体基底构件，包括基底衬底，掩模层，部分地覆盖所述基底衬底的表面以产生掩模区域，以及生长在其上以覆盖掩模层的GaN组晶体层，所述掩模层部分地与所述掩模层直接接触基底的非掩蔽区域，半导体元件的用途，其制造方法以及位错线的控制方法。本发明的制造方法能够使位于掩模区域或非掩蔽区域以上的GaN族结晶层的一部分具有低位错密度。

10. 发明公开

EP3370257A1 DIMINUTION DE LA TEMPERATURE DE RECUIT DE COUCHE IGZO OBTENUE PAR SOL GEL 无效
公开(公告)号：EP3370257A1
公开(公告)日：2018-09-05
申请号：EP18158413.7
申请日：2018-02-23
申请人： Commissariat à l'énergie atomique et aux énergies alternatives
发明人： BENWADIH, Mohammed , REVENANT-BRIZARD, Christine
IPC分类号： H01L27/12 , H01L29/786 , H01L21/477 , H01L21/02
CPC分类号： H01L21/02554 , H01L21/02422 , H01L21/02472 , H01L21/02483 , H01L21/02502 , H01L21/02565 , H01L21/02628 , H01L21/477 , H01L29/66969 , H01L29/7869
摘要： La présente demande concerne un procédé de formation d'une zone active d'oxyde métallique pour composant électronique comprenant la formation d'un empilement de couches d'IXZO (9 1 , 9 2 , 9 3 ) réalisées par dépôt en phase liquide sur un substrat, les couches de cet empilement ayant des fractions atomiques différentes entre elles afin de permettre de diminuer la température de recuit permettant de les rendre fonctionnelles.

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