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1. 发明授权

EP3410181B1 ARRAY SUBSTRATE AND DISPLAY DEVICE 有权
公开(公告)号：EP3410181B1
公开(公告)日：2024-10-16
申请号：EP16871782.5
申请日：2016-08-25
IPC分类号： H01L29/417 , H01L29/786 , H01L27/12 , G02F1/1362
CPC分类号： H01L29/78618 , H01L27/127 , G02F1/136213 , H01L27/124 , H01L27/1255 , H01L27/1288 , H01L29/41733

2. 发明授权

EP2881785B1 ARRAY SUBSTRATE, MANUFACTURING METHOD THEREFOR, AND DISPLAY APPARATUS 有权
公开(公告)号：EP2881785B1
公开(公告)日：2018-08-29
申请号：EP13863698.0
申请日：2013-11-28
申请人： BOE Technology Group Co., Ltd. , Ordos Yuansheng Optoelectronics Co., Ltd.
发明人： SUN, Jian , LI, Cheng , AN, Seongjun , RYU, Bongyeol
IPC分类号： G02F1/1362
CPC分类号： H01L27/1222 , G02F1/136227 , G02F1/136286 , H01L21/28 , H01L27/124 , H01L27/127 , H01L29/6675 , H01L29/78621
摘要： The invention discloses an array substrate and a manufacturing method thereof and a display device, which can solve the problems such as complicated, high cost, time-consuming process in the prior art, and increase the storage capacitance. In the array substrate, data lines and a common electrode line are provided in the same layer on the base substrate and below an active layer, the data lines and the common electrode line are provided separately, the common electrode is provided with a connection part which partly overlaps with the common electrode line in an orthographic projection direction, and the common electrode is electrically connected to the common electrode line through a first via between the connection part and the common electrode line.

3. 发明公开

EP3352221A2 ARRAY SUBSTRATE AND FABRICATING METHOD THEREOF, DISPLAY PANEL, DISPLAY APPARATUS, ELECTRONIC DEVICE, COMPUTER PROGRAM AND RECORDING MEDIUM 无效
公开(公告)号：EP3352221A2
公开(公告)日：2018-07-25
申请号：EP17191049.0
申请日：2017-09-14
申请人： Beijing Xiaomi Mobile Software Co., Ltd.
发明人： JIANG, Zhongsheng , LIU, Anyu
IPC分类号： H01L27/146 , G06K9/00
CPC分类号： H01L27/14678 , G02F1/13318 , G02F1/13338 , G02F1/133512 , G02F1/1368 , G02F2001/133626 , G06F3/041 , G06K9/00013 , G06K9/0004 , G09G3/3406 , G09G2354/00 , H01L27/124 , H01L27/1255 , H01L27/1262 , H01L27/127 , H01L27/14632 , H01L27/14685 , H01L27/14687 , H01L27/14692 , H01L31/102 , H01L31/1105 , H01L31/1136
摘要： The present invention relates to an array substrate and a fabricating method thereof, a display panel, a display apparatus, an electronic device, a computer program and a recording medium. The array substrate comprises: a base; a thin film transistor provided in a first region on a side of the base; a photoelectric sensor, provided in a second region on the side of the base, for fingerprint identification; and a passivation layer provided on a side of both the thin film transistor and the photoelectric sensor away from the base. According to technical solutions of the present invention, by disposing a photoelectric sensor on a base of an array substrate, the photoelectric sensor can be integrated in the array substrate. In a display apparatus manufactured by using the array substrate, it is possible to place a finger at a position corresponding to a second region of the array substrate for fingerprint identification. Thus, there is no need to set an extra fingerprint identification sensor in the display apparatus, thereby simplifying the manufacturing process and improving the stability and integration of the overall structure.

4. 发明公开

EP3343618A1 THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE INCLUDING THE SAME 有权
公开(公告)号：EP3343618A1
公开(公告)日：2018-07-04
申请号：EP17210707.0
申请日：2017-12-27
申请人： LG Display Co., Ltd.
发明人： JOON, Hyung
IPC分类号： H01L27/12 , H01L29/78 , H01L29/49 , H01L29/66 , H01L29/786
CPC分类号： H01L27/1251 , H01L21/02175 , H01L21/02178 , H01L21/02186 , H01L21/02194 , H01L21/02244 , H01L27/1225 , H01L27/1229 , H01L27/127 , H01L29/24 , H01L29/4908 , H01L29/66969 , H01L29/78606 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor and a method for manufacturing the same, and a display device including the same are disclosed, in which P type semiconductor characteristic is realized using an active layer that includes an Sn based oxide. The thin film transistor comprises an active layer that includes an Sn(II)O based oxide; a metal oxide layer being in contact with one surface of the active layer; a gate electrode overlapped with the active layer; a gate insulating film provided between the gate electrode and the active layer; a source electrode being in contact with a first side of the active layer; and a drain electrode being in contact with a second side of the active layer.

5. 发明公开

EP3220414A4 POLYCRYSTALLINE OXIDE THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND PREPARATION METHOD THEREFOR 有权
公开(公告)号：EP3220414A4
公开(公告)日：2018-06-20
申请号：EP15778180
申请日：2015-04-10
申请人： BOE TECHNOLOGY GROUP CO LTD
发明人： HU HEHE
IPC分类号： H01L29/786 , H01L21/02 , H01L21/465 , H01L27/12 , H01L29/66
CPC分类号： H01L27/127 , H01L21/02274 , H01L21/02472 , H01L21/02483 , H01L21/02554 , H01L21/02565 , H01L21/02592 , H01L21/02631 , H01L21/465 , H01L21/469 , H01L21/477 , H01L21/77 , H01L27/12 , H01L27/1225 , H01L27/1274 , H01L27/1296 , H01L29/10 , H01L29/66969 , H01L29/786 , H01L29/7869
摘要： This invention provides a polycrystalline oxide thin-film transistor (TFT) array substrate and a method of manufacturing the same. As the polycrystalline oxide thin film layer of the polycrystalline oxide TFT array substrate is formed by a two-step process according to the present invention, the ultra-high temperature annealing process required in the prior art is obviated, and the object of producing a polycrystalline oxide TFT array substrate by the existing manufacturing facilities of the amorphous oxide TFT array substrates is achieved without adding any special equipment or special operation, and it is easy to implement; meanwhile, the energy consumption is reduced as the high temperature annealing is no longer needed.

6. 发明公开

EP3306648A1 FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY APPARATUS 有权
标题翻译：薄膜晶体管及其制造方法，阵列基板及其制造方法和显示装置
公开(公告)号：EP3306648A1
公开(公告)日：2018-04-11
申请号：EP15885770.6
申请日：2015-10-19
申请人： BOE Technology Group Co., Ltd.
发明人： YANG, Wei , LIU, Xiang
IPC分类号： H01L21/28 , H01L29/786 , H01L21/8234 , H01L27/32
CPC分类号： H01L27/1288 , G02F1/136286 , G02F1/1368 , G02F2201/121 , G02F2201/123 , H01L21/425 , H01L27/1225 , H01L27/124 , H01L27/127 , H01L27/3262 , H01L27/3276 , H01L29/42364 , H01L29/66742 , H01L29/66757 , H01L29/66765 , H01L29/66969 , H01L29/7866 , H01L29/7869 , H01L29/78696 , H01L2227/323
摘要： A thin-film transistor (TFT) and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are disclosed. The manufacturing method of a TFT (200) includes: forming an active layer (210), a gate electrode (232), a source electrode (231) and a drain electrode (233) respectively electrically connected with the active layer (210), and a gate insulating layer (220) disposed between the gate electrode (232) and the active layer (210), so that the gate electrode (232), the source electrode (231) and the drain electrode (233) are formed in the same patterning process. The method can reduce the number of masks used in the manufacturing process of the TFT (200) or an array substrate (20), reduce the technology process, improve the productivity, and reduce the production cost.
摘要翻译：公开了一种薄膜晶体管（TFT）及其制造方法，阵列基板及其制造方法和显示装置。所述TFT（200）的制造方法包括：形成分别与所述有源层（210）电连接的有源层（210），栅电极（232），源电极（231）和漏电极（233）和设置在栅电极（232）和有源层（210）之间的栅绝缘层（220），使得栅电极（232），源电极（231）和漏电极（233）形成在相同的图案化过程。该方法可以减少在TFT（200）或阵列基板（20）的制造过程中使用的掩模的数量，减少工艺过程，提高生产率并降低生产成本。

7. 发明公开

EP3304190A1 ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME, AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：阵列基板，具有该基板的显示装置及其制造方法
公开(公告)号：EP3304190A1
公开(公告)日：2018-04-11
申请号：EP15858105.8
申请日：2015-12-10
申请人： BOE Technology Group Co., Ltd. , Hefei Xinsheng Optoelectronics Technology Co. Ltd
发明人： MA, Jun
IPC分类号： G02F1/1362
CPC分类号： H01L27/124 , G02F1/136286 , G02F2001/136295 , H01L27/1222 , H01L27/127
摘要： The present application discloses an array substrate comprising a first layer comprising a data line; at least one second layer comprising at least one data line overlapping area on intersections between the first layer and the at least one second layer; and a spacer layer between the first layer and the second layer. The spacer layer comprises a plurality of spacer units spaced apart from each other. Each of the plurality of spacer units is in an area corresponding to the overlapping area.

8. 发明公开

EP3073522A4 ARRAY SUBSTRATE AND PREPARATION METHOD THEREFOR, AND DISPLAY DEVICE 有权
标题翻译： ARRAYSUBSTRAT UND HERSTELLUNGSVERFAHRENDAFÜRUND ANZEIGEVORRICHTUNG
公开(公告)号：EP3073522A4
公开(公告)日：2017-06-28
申请号：EP14859300
申请日：2014-07-25
申请人： BOE TECHNOLOGY GROUP CO LTD
发明人： LIU XIANG
IPC分类号： H01L27/12 , H01L21/027 , H01L21/28 , H01L21/311 , H01L21/3213 , H01L29/49 , H01L29/66 , H01L29/786
CPC分类号： H01L27/1288 , H01L21/02565 , H01L21/0274 , H01L21/28008 , H01L21/31144 , H01L21/32139 , H01L21/441 , H01L21/469 , H01L21/47573 , H01L21/47635 , H01L21/56 , H01L21/76831 , H01L23/3171 , H01L23/5226 , H01L23/528 , H01L27/1225 , H01L27/124 , H01L27/1259 , H01L27/127 , H01L29/24 , H01L29/4908 , H01L29/66969 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： An array substrate, a manufacturing method thereof, and a display device are provided, which are related to a display technology filed. The method includes: forming a pattern layer (201a) including a pixel electrode (20), and a pattern layer including a gate electrode (30) and a gate line on a base substrate (10) through one patterning process; on the substrate (10) with the pattern layer including the gate electrode (30) and the gate line formed thereon, forming a gate insulating layer (401), a pattern layer at least including a metal oxide semiconductor active layer (50) and a pattern layer at least including an etch stop layer (601) through one patterning process or two patterning processes; wherein, a first via hole (71) for exposing the pixel electrode (20) is formed over the pixel electrode (20); on the substrate (10) with the etch stop layer (601) formed thereon, forming a pattern layer including a source electrode (80a), a drain electrode (80b) and a data line through one patterning process; wherein, the source electrode (80a) and the drain electrode (80b) each contact a metal oxide semiconductor active layer (50), and the drain electrode (80a) is electrically connected to the pixel electrode (20) through the first via hole (71).
摘要翻译：提供了一种阵列基板及其制造方法和显示装置，与显示技术领域相关。该方法包括：通过一次构图工艺在衬底基板（10）上形成包括像素电极（20）的图形层（201a）以及包括栅电极（30）和栅线的图形层; 在具有包括栅极电极30和形成在其上的栅极线的图案层的衬底10上形成栅极绝缘层401，至少包括金属氧化物半导体活性层50和图案化层50的图案层，通过一个构图工艺或两个构图工艺至少包括蚀刻停止层（601）的图案层; 其中，在像素电极（20）上形成用于暴露像素电极（20）的第一通孔（71）; 在其上形成有蚀刻停止层（601）的衬底（10）上，通过一次构图工艺形成包括源电极（80a），漏电极（80b）和数据线的图形层; 其中，所述源电极80a和所述漏电极80b分别与金属氧化物半导体有源层50接触，所述漏电极80a通过所述第一过孔电连接所述像素电极20， 71）。

9. 发明公开

EP3174097A1 THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY USING THE SAME 有权
标题翻译：薄膜晶体管衬底和使用相同的显示
公开(公告)号：EP3174097A1
公开(公告)日：2017-05-31
申请号：EP16200472.5
申请日：2016-11-24
申请人： LG Display Co., Ltd.
发明人： MOON, Kyeongju , NOH, Soyoung , SHIN, Hyunsoo , KIM, Wonkyung
IPC分类号： H01L27/12
CPC分类号： H01L29/78606 , G02F1/134309 , G02F1/136286 , G02F1/1368 , G02F2001/134372 , G02F2201/121 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/127 , H01L27/3262 , H01L29/78633 , H01L29/78675 , H01L29/7869
摘要： A thin film transistor substrate includes a first thin film transistor disposed having a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode and a first drain electrode; a first gate insulating layer between the polycrystalline semiconductor layer and the first gate electrode; a second thin film transistor disposed having an oxide semiconductor layer on the first gate electrode, a second gate electrode on the oxide semiconductor layer, a second source electrode and a second drain electrode; an intermediate insulating layer disposed on the first gate electrode and under the oxide semiconductor layer; and a second gate insulating layer on the intermediate insulating layer and under the first source electrode, the first drain electrode and the second gate electrode.
摘要翻译：薄膜晶体管基板包括：第一薄膜晶体管，设置为具有多晶半导体层，第一栅电极在多晶半导体层上，第一源电极和第一漏电极; 在多晶半导体层和第一栅电极之间的第一栅绝缘层; 第二薄膜晶体管，所述第二薄膜晶体管设置在所述第一栅电极上，所述氧化物半导体层上的第二栅电极，第二源电极和第二漏电极上具有氧化物半导体层; 中间绝缘层，设置在第一栅电极上并且在氧化物半导体层下; 以及在所述中间绝缘层上并且在所述第一源电极，所述第一漏电极和所述第二栅电极下方的第二栅绝缘层。

10. 发明公开

EP3041048A1 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE 审中-公开
标题翻译： ARRAYSUBSTRAT UND HERSTELLUNGSVERFAHRENDAFÜRUND ANZEIGEVORRICHTUNG
公开(公告)号：EP3041048A1
公开(公告)日：2016-07-06
申请号：EP13852351.9
申请日：2013-11-13
申请人： BOE Technology Group Co., Ltd.
发明人： CHENG, Hongfei
IPC分类号： H01L27/12 , H01L29/786 , H01L21/77
CPC分类号： H01L27/127 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1248
摘要： An array substrate comprises a base substrate, a gate line, a data line and a thin film transistor arranged in an array on the base substrate, a pixel electrode and a passivation layer, the thin film transistor include a gate electrode, an active layer, a source electrode and a drain electrode, and the pixel electrode and the active layer, the drain are disposed in a same layer and formed integrally. A display device comprising the array substrate and a manufacturing method of the array substrate are further disclosed.
摘要翻译：阵列基板包括在基底基板上排列成阵列的基底基板，栅极线，数据线和薄膜晶体管，像素电极和钝化层，薄膜晶体管包括栅电极，有源层，源电极和漏电极，并且像素电极和有源层，漏极设置在同一层中并整体形成。进一步公开了包括阵列基板的显示装置和阵列基板的制造方法。

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