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1. 发明授权

EP4009350B1 HARD MASK INCLUDING AMORPHOUS OR NANOCRYSTALLINE BORON NITRIDE FILM AND METHOD OF FABRICATING THE HARD MASK, AND PATTERNING METHOD USING THE HARD MASK 有权
公开(公告)号：EP4009350B1
公开(公告)日：2024-07-17
申请号：EP21200908.8
申请日：2021-10-05
IPC分类号： H01L21/033 , H01L21/02 , H01L21/311
CPC分类号： H01L21/02175 , H01L21/0332 , H01L21/31144

2. 发明公开

EP3173381A1 OXIDE DIELECTRIC AND METHOD FOR MANUFACTURING SAME, AND SOLID STATE ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：氧化物电介质及其制造方法体和电子固态装置和方法及其生产
公开(公告)号：EP3173381A1
公开(公告)日：2017-05-31
申请号：EP15823922.8
申请日：2015-07-10
申请人： Japan Advanced Institute of Science and Technology , Adamant Co., Ltd.
发明人： SHIMODA, Tatsuya , INOUE, Satoshi , ARIGA, Tomoki
IPC分类号： C01G33/00 , C04B35/00 , H01G4/12
CPC分类号： H01G4/1254 , C01G33/00 , C04B35/4521 , C04B35/495 , C04B35/62218 , C04B2235/3251 , C04B2235/3298 , C04B2235/76 , C04B2235/80 , H01G4/12 , H01L21/02175 , H01L21/0226 , H01L29/7869
摘要： There are provided an oxide dielectric having excellent properties and a solid state electronic device (e.g., a capacitor, a semiconductor device, or a small electromechanical system) having such an oxide dielectric.
An oxide layer 30 includes an oxide dielectric (possibly including inevitable impurities) including bismuth (Bi) and niobium (Nb) and having a first crystal phase of a pyrochlore-type crystal structure and a second crystal phase of a β-BiNbO 4 -type crystal structure. The oxide layer 30 has a controlled content of the first crystal phase and a controlled content of the second crystal phase, in which the first crystal phase has a dielectric constant that decreases with increasing temperature of the oxide layer 30 in a temperature range of 25°C or more and 120°C or less, and the second crystal phase has a dielectric constant that increases with increasing temperature of the oxide layer 30 in the temperature range.
摘要翻译：本发明提供在具有优异的性能和固态电子装置（E. G.，电容器，半导体装置，或较小的机电系统），其具有检测上氧化物电介质的介电氧化物。氧化物层30包括氧化物介电（可能包括不可避免的杂质）包含铋（Bi）和铌（Nb）和具有烧绿石型晶体结构的第一晶体相和²-宾波4型的第二晶相晶体结构。该氧化物层30具有与第一晶相的控制的内容和第二晶相的控制的内容，其中，所述第一结晶相的介电常数所做降低了与在一个温度范围内的25°增加氧化物层30的温度 ℃或更高和120℃或以下，并且第二晶相的介电常数做了与在所述温度范围增加氧化物层30的温度增加。

3. 发明授权

EP2335276B1 CAPACITORS, DIELECTRIC STRUCTURES, AND METHODS OF FORMING DIELECTRIC STRUCTURES 有权
标题翻译：电容器，电介质结构及其制造方法电介质结构
公开(公告)号：EP2335276B1
公开(公告)日：2015-02-25
申请号：EP09820968.7
申请日：2009-09-10
申请人： Micron Technology, Inc.
发明人： ROCKLEIN, Noel , CARLSON, Chris, M. , PETERSON, Dave , YANG, Cunyu , VAIDYANATHAN, Praveen , BHAT, Vishwanath
IPC分类号： H01L21/314 , H01L21/8242 , H01L27/108 , H01L29/51 , H01L21/28 , H01L21/02 , H01L49/02 , H01L29/78
CPC分类号： H01L21/28273 , H01L21/02175 , H01L21/02194 , H01L21/022 , H01L21/0228 , H01L21/3142 , H01L27/10852 , H01L28/40 , H01L28/91 , H01L29/51 , H01L29/513 , H01L29/78

4. 发明公开

EP2399282A1 ISOLATIONSMATERIAL FÜR INTEGRIERTE SCHALTKREISE UND DEREN VERWENDUNG 有权
标题翻译：集成电路的含保温材料及其用途集成电路
公开(公告)号：EP2399282A1
公开(公告)日：2011-12-28
申请号：EP10704527.0
申请日：2010-02-03
申请人： Leibniz-Institut für Festkörper- und Werkstoffforschung Dresden e.V.
发明人： SEIFERT, Gotthart , HERMANN, Helmut , ZAGORODNIY, Konstyantyn , ZSCHECH, Ehrenfried
IPC分类号： H01L21/312 , C07F5/06 , C07F5/00 , C07F3/00
CPC分类号： H01L21/02118 , H01L21/02175 , H01L21/312
摘要： The invention deals with the fields of microelectronics and the material sciences and relates to an insulation layer material for integrated circuits in microelectronics that can be used, for example, in integrated circuits as an insulation material in semiconductor components. The problem of the present invention is to specify an insulation material for integrated circuits that has dielectric constants of k ≤ 2 and at the same time has good mechanical properties. The problem is solved by means of an insulation material for integrated circuits that contains at least MOFs and/or COFs.

5. 发明公开

EP2277045A2 PROCESS FOR FABRICATING NANOWIRE ARRAYS 审中-公开
标题翻译： VERFAHREN ZUR HERSTELLUNG VON NANODRAHTANORDNUNGEN
公开(公告)号：EP2277045A2
公开(公告)日：2011-01-26
申请号：EP09743228.0
申请日：2009-04-14
申请人： Bandgap Engineering, Inc.
发明人： BUCHINE, Brent, A. , MODAWAR, Faris , BLACK, Marcie, R.
IPC分类号： G01N33/53
CPC分类号： H01L29/0669 , B01J20/10 , B01J20/28007 , B82Y20/00 , B82Y30/00 , C23C14/34 , H01L21/02118 , H01L21/02164 , H01L21/02175 , H01L21/02244 , H01L21/02282 , H01L21/02307 , H01L21/0234 , H01L21/02488 , H01L21/02513 , H01L21/02532 , H01L21/02603 , H01L21/2855 , H01L21/28568 , H01L21/30604 , H01L21/3086 , H01L21/32134 , H01L29/04 , H01L29/0676 , H01L29/16 , H01L31/0236 , H01L31/02363 , H01L31/028 , H01L31/0352 , H01M4/0492 , H01M4/134 , H01M4/1395 , H01M4/366 , H01M4/386 , H01M4/661 , H01M10/0525 , H01M2004/027 , Y02E10/50 , Y10S977/762
摘要： A process is provided for etching a silicon-containing substrate to form nanowire arrays. In this process, one deposits nanoparticles and a metal film onto the substrate in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. One submerges the metallized substrate into an etchant aqueous solution comprising HF and an oxidizing agent. In this way arrays of nanowires with controlled diameter and length are produced.
摘要翻译：提供了一种用于蚀刻含硅衬底以形成纳米线阵列的工艺。在该方法中，将纳米颗粒和金属膜以这样一种方式将金属纳米沉积到金属膜上，使金属存在并接触需要蚀刻的硅，并阻止其接触硅或不存在硅。一个将金属化衬底浸入包含HF和氧化剂的蚀刻剂水溶液中。以这种方式产生具有受控直径和长度的纳米线阵列。

6. 发明公开

EP1907354A2 UNSYMMETRICAL LIGAND SOURCES, REDUCED SYMMETRY METAL-CONTAINING COMPOUNDS, AND SYSTEMS AND METHODS INCLUDING SAME 有权
标题翻译：来源不对称LIGANGEN，含金属化合物对称性减量以及系统和方法针对这算是二手
公开(公告)号：EP1907354A2
公开(公告)日：2008-04-09
申请号：EP06774112.4
申请日：2006-06-27
申请人： Micron Technology, Inc.
发明人： MILLWARD, Dan , UHLENBROCK, Stefan , QUICK, Timothy, A.
IPC分类号： C07C251/12 , C07F3/00 , C07F7/00 , C23C16/40 , H01L21/316
CPC分类号： H01L21/0228 , C07C251/12 , C07F5/003 , C23C16/18 , C23C16/40 , H01L21/02175 , H01L21/02197 , H01L21/28556 , H01L21/3141 , H01L21/316
摘要： The present invention provides metal-containing compounds that include at least one beta-diketiminate ligand, and methods of making and using the same. In some embodiments, the metal-containing compounds are homoleptic complexes that include unsymmetrical beta-diketiminate ligands. In other embodiments, the metal-containing compounds are heteroleptic complexes including at least one beta-diketiminate ligand. The compounds can be used to deposit metal-containing layers using vapor deposition methods. Vapor deposition systems including the compounds are also provided. Sources for beta-diketiminate ligands are also provided.

7. 发明公开

EP1800336A1 REVETEMENT A BASE DE MGO POUR L'ISOLATION ELECTRIQUE DE SUBSTRATS SEMI-CONDUCTEURS ET PROCEDE DE FABRICATION 审中-公开
标题翻译：基于MgO涂料用于生产电气绝缘半导体衬底工艺
公开(公告)号：EP1800336A1
公开(公告)日：2007-06-27
申请号：EP05810812.7
申请日：2005-10-12
申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE
发明人： BONDOUX, Céline , PRENE, Philippe , BELLEVILLE, Philippe , JERISIAN, Robert, Mr Piskis
IPC分类号： H01L21/316
CPC分类号： H01L21/02175 , C01F5/08 , C23C16/403 , H01B3/10 , H01L21/02107 , H01L21/02172 , H01L21/02205 , H01L21/02282 , H01L21/316 , H01L23/3171 , H01L23/5329 , H01L23/564 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to an inorganic magnesium oxide-based coating (MgO) for electrically insulating semi-conductor substrates such as a silicon carbide (SiC) and to a method for producing said insulating coating. The inventive method consists in preparing a treating solution of at least one type of water-soluble organomagnesium and/or of at least one type of a water-soluble magnesium salt for forming a homogenous polymer magnesium oxide/hydroxide layer by a hydrolysis-condensation reaction with water, in applying the treating water-soluble organomagnesium or water-soluble magnesium salt solution to a surface for forming a magnesium oxide-base layer and in densifying the thus formed layer at a temperature equal to or less than 1000 °C.

8. 发明公开

EP1599899A2 ATOMIC LAYER DEPOSITED DIELECTRIC LAYERS 审中-公开
标题翻译： ATOM BASES沉积的介电层
公开(公告)号：EP1599899A2
公开(公告)日：2005-11-30
申请号：EP04717434.7
申请日：2004-03-04
申请人： MICRON TECHNOLOGY, INC.
发明人： AHN, Kie, Y. , FORBES, Leonard
IPC分类号： H01L21/316 , H01L21/314 , H01L29/51 , C23C16/40 , H01L21/28 , H01L21/8242
CPC分类号： H01L21/0228 , H01L21/02175 , H01L21/02181 , H01L21/28229 , H01L21/28273 , H01L21/3141 , H01L21/31645 , H01L21/31683 , H01L27/10873 , H01L27/11 , H01L28/40 , H01L29/517 , H01L29/66825 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： An atomic layer deposited dielectric layer and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO 2 . Depositing a hafnium metal layer on a substrate surface by atomic layer deposition and depositing a hafnium oxide layer on the hafnium metal layer by atomic layer deposition form a hafnium oxide dielectric layer substantially free of silicon oxide. Dielectric layers containing atomic layer deposited hafnium oxide are thermodynamically stable such that the hafnium oxide will have minimal reactions with a silicon substrate or other structures during processing.

9. 发明公开

EP1560664A1 NANOSTRUCTURED AND NANOPOROUS FILM COMPOSITIONS, STRUCTURES, AND METHODS FOR MAKING THE SAME 审中-公开
标题翻译：纳米结构和纳米多孔膜组成，结构和方法及其
公开(公告)号：EP1560664A1
公开(公告)日：2005-08-10
申请号：EP03754979.7
申请日：2003-09-26
申请人： Simon Fraser University
发明人： SVENDSEN, Leo, G. , MUKHERJEE, Shyama, P. , ROMAN, Paul, J., Jr. , HILL, Ross, H. , MADSEN, Harold, O. , ZHANG, Xin411 Louis Riel House , HOHERTZ, Donna
IPC分类号： B05D1/02 , B05D1/18 , B05D3/00 , B05D3/02 , B05D3/06 , B05D5/00 , C23C14/04 , C23C14/06 , C23C14/08 , C23C14/14 , C23C14/28 , H05H1/00 , H05H1/24
CPC分类号： C23C18/06 , C01G11/02 , C23C2/04 , C23C2/26 , C23C8/02 , C23C18/08 , C23C18/1204 , C23C18/1216 , C23C18/127 , C23C18/1279 , C23C18/1283 , C23C18/14 , C23C24/08 , C23C26/00 , C23C26/02 , C23C30/00 , G03F7/0047 , H01L21/02175 , H01L21/02183 , H01L21/02186 , H01L21/02189 , H01L21/02194 , H01L21/02203 , H01L21/02282 , H01L21/02337 , H01L21/02348 , H01L21/31691 , H01L21/31695 , H05K1/162 , H05K3/105
摘要： This invention comprises methods for making nanostructured and nanoporous thin film structures of various compositions. These films can be directly patterned. In these methods, precursor films are deposited on a surface and different components of the precursor film are reacted under selected conditions, forming a nanostructured or nanoporous film. Such films can be used in a variety of applications, for example, low k dielectrics, sensors, catalysts, conductors or magnetic films. Nanostructured films can be created: (1) using one precursor component and two reactions, (2) using two or more components based on differential rates of photochemical conversion, (3) using two precursors based on the thermal sensitivity of one precursor and the photochemical sensitivity of the other, and (4) by photochemical reaction of a precursor film and selected removal of a largely unreacted component from the film.

10. 发明公开

EP1195799A1 High pressure process for the formation of crystallized ceramic films at low temperatures 审中-公开
标题翻译：在低温下制备结晶陶瓷层的高压法
公开(公告)号：EP1195799A1
公开(公告)日：2002-04-10
申请号：EP00308782.2
申请日：2000-10-05
申请人： Lu, Chung-Hsin
发明人： Lu, Chung-Hsin
IPC分类号： H01L21/316
CPC分类号： C23C14/5806 , C23C14/08 , C23C16/40 , C23C16/56 , C23C18/1208 , H01L21/02175 , H01L21/02183 , H01L21/02186 , H01L21/02194 , H01L21/02197 , H01L21/02266 , H01L21/02282 , H01L21/02337 , H01L21/02356 , H01L21/31691 , H01L41/314
摘要： A process is disclosed for forming crystallized ceramic films at low temperatures by providing a higher pressure under which the formation of crystallized ceramic films from the amorphous or partially crystallized precursor films of ceramics can be significantly enhanced. The present invention not only improves quality, performance and reliability of the ceramic films, but also reduces the cost for production. By lowering the formation temperatures of crystallized ceramic films, the cost for thermal energy consumed during the heating process is greatly reduced. In addition, the interaction or interdiffusion occurring between films and substrates is significantly suppressed or essentially prevented, avoiding the off-stoichiometry and malfunction of thin films, which usually occur in the conventional high-temperature processes. The process of present invention also decreases the grain size of formed films, thus reducing the roughness of films and producing relatively smooth, good quality films. This process makes possible the fabrication of ceramic films with larger area at substantially low temperatures, and is applicable to very large scale integrated circuit technologies. The present invention finds broad applications including manufacturing ferroelectric memories, dynamic random access memories, nonvolatile random access memories, photo catalysis, optical lenses, magnetic devices, capacitors, actuators, piezoelectric devices, pyroelectric devices, sensors, electro-optic switching, glass coating, non-liner optical devices, reflective/antireflective coating, etc.
摘要翻译：一种方法是游离缺失盘通过提供更高的压力下，从陶瓷的无定形或结晶的部分的前体膜结晶化的陶瓷膜的形成可显着增强形成在低温下结晶的陶瓷膜。本发明不仅提高了质量，性能和可靠性的陶瓷薄膜所以，但降低了生产成本。通过降低结晶温度的陶瓷膜的形成中，在加热过程期间所消耗的热能的成本大大降低。此外，相互作用或相互扩散膜与基板之间出现被抑制或显着本质上阻止，避免偏离化学计量和薄膜的故障，这在传统的高温工艺，通常会出现。因此本发明的方法降低了形成的膜的晶粒尺寸，从而降低膜的粗糙度和产生相对光滑，良好的质量的膜。这个过程使得有可能与更大面积的陶瓷膜的制造在低温度基本上，并适用于超大规模集成电路技术。本发明发现有广泛的应用包括制造铁电存储器，动态随机存取存储器，非易失性随机存取存储器，光催化，光学透镜，磁器件，电容器，致动器，压电器件，热电装置，传感器，电 - 光开关，玻璃涂层，非线性光学器件，反射/抗反射涂层等

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