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1. 发明公开

EP3345206A1 PLASMA GENERATING APPARATUS AND METHOD OF MANUFACTURING PATTERNED DEVICES USING SPATIALLY RESOLVED PLASMA PROCESSING 审中-公开
公开(公告)号：EP3345206A1
公开(公告)日：2018-07-11
申请号：EP16758167.7
申请日：2016-08-30
申请人： Total S.A. , Ecole Polytechnique , Centre National de la Recherche Scientifique
发明人： JOHNSON, Erik , BRUNEAU, Bastien , ROCA I CABARROCAS, Pere , BULKIN, Pavel , HABKA, Nada
IPC分类号： H01J37/32 , H01L31/18 , C23C14/04 , C23C16/509
CPC分类号： H01J37/32091 , C23C16/04 , C23C16/045 , C23C16/45565 , C23C16/45574 , C23C16/505 , H01J37/32366 , H01J37/32541 , H01J37/32568 , H01J37/32816 , H01L31/03921 , H01L31/202 , Y02E10/50 , Y02P70/521
摘要： The invention concerns a plasma generating apparatus, for manufacturing devices having patterned layers, comprising a first electrode assembly (1) and a second electrode assembly (2) placed in a plasma reactor chamber, an electrical power supply (6) for generating a voltage difference between the first electrode assembly (1) and the second electrode assembly (2). According to the invention, the second electrode assembly (2) is configured for receiving a substrate (5), and the first electrode assembly (1) comprises a plurality of protrusions (11) and a plurality of recesses (12, 13, 14, 15, 16, 17, 18), the protrusions (11) and recesses (12, 13, 14, 15, 16, 17, 18) being dimensioned and set at respective distances (D1, D2) from the surface (51) of the substrate (5) so as to generate a plurality of spatially isolated plasma zones (21, 22) located selectively either between said surface (51) of the substrate (5) and said plurality of recesses (12, 13, 14, 15, 16, 17, 18) or between said surface (51) of the substrate (5) and said plurality of protrusions (11).

2. 发明公开

EP3238271A1 OPTO-ELECTRONIC DEVICE WITH TEXTURED SURFACE AND METHOD OF MANUFACTURING THEREOF 审中-公开
标题翻译：具有纹理化表面的光电装置及其制造方法
公开(公告)号：EP3238271A1
公开(公告)日：2017-11-01
申请号：EP15813453.6
申请日：2015-12-21
申请人： Total S.A. , Ecole Polytechnique , Centre National de la Recherche Scientifique
发明人： ROCA I CABARROCAS, Pere , CHEN, Wanghua , FOLDYNA, Martin , POULAIN, Gilles
IPC分类号： H01L31/0216 , H01L31/0232 , H01L31/0236
CPC分类号： H01L31/0236 , H01L31/02168 , H01L31/02327 , H01L31/18 , Y02E10/50
摘要： The present invention concerns an opto-electronic device comprising a semiconducting substrate, a layered interface comprising at least one layer (2, 3), said layered interface having a first surface (21) in contact with a surface (20) of said semiconducting substrate (1) and said layered interface being adapted for passivating said surface (20) of said semiconducting substrate (1), said layered interface having a second surface (23) and said layered interface being adapted for electrically insulating said first surface (21) from said second surface (23), and a textured surface structure comprising a plurality of nanowires (4) and a transparent dielectric coating (5), said textured surface structure being in contact with said second surface (23) of said layered interface, said plurality of nanowires (4) protruding from said second surface (23) and said plurality of nanowires (4) being embedded between said second surface (23) and said transparent dielectric coating (5).
摘要翻译：本发明涉及包括半导体衬底，包括至少一个层（2,3）的分层界面的光电子器件，所述分层界面具有与所述半导体衬底（2）的表面（20）接触的第一表面（21）（1）和所述分层界面适于钝化所述半导体衬底（1）的所述表面（20），所述分层界面具有第二表面（23），并且所述分层界面适于将所述第一表面（21）与所述第一表面所述第二表面（23）和包括多个纳米线（4）和透明电介质涂层（5）的纹理化表面结构，所述纹理化表面结构与所述分层界面的所述第二表面（23）接触，所述多个从所述第二表面（23）突出的纳米线（4），并且所述多个纳米线（4）嵌入在所述第二表面（23）和所述透明电介质涂层（5）之间。

3. 发明授权

EP2471103B1 PROCÉDÉ DE TEXTURATION DE LA SURFACE D'UN SUBSTRAT DE SILICIUM ET SUBSTRAT DE SILICIUM TEXTURÉ POUR CELLULE SOLAIRE 有权转让
公开(公告)号：EP2471103B1
公开(公告)日：2019-01-02
申请号：EP10762743.2
申请日：2010-08-23
申请人： Total S.A. , Centre National de la Recherche Scientifique , Ecole Polytechnique
发明人： ROCA I CABARROCAS, Pere , MORENO, Mario , DAINEKA, Dimitri
IPC分类号： H01L31/0236

4. 发明公开

EP2334848A1 PROCEDE DE FABRICATION DE NANOFILS SEMICONDUCTEURS A CROISSANCE LATERALE ET TRANSISTORS OBTENUS PAR CE PROCEDE 有权
标题翻译：用于生产方半导体生长纳米线直接收到的TRANSISTORS
公开(公告)号：EP2334848A1
公开(公告)日：2011-06-22
申请号：EP09756003.1
申请日：2009-10-09
申请人： Ecole Polytechnique , Centre National de la Recherche Scientifique
发明人： ROCA I CABARROCAS, Pere , YU, Linwei
IPC分类号： C30B11/12 , C30B29/06 , C30B29/60 , C30B29/08 , H01L29/06 , H01L29/786
CPC分类号： H01L21/02653 , B82Y10/00 , B82Y30/00 , B82Y40/00 , C30B9/10 , C30B29/06 , C30B29/08 , C30B29/52 , C30B29/605 , H01L21/02403 , H01L21/02414 , H01L21/02529 , H01L21/02532 , H01L21/02603 , H01L21/0262 , H01L21/02639 , H01L21/02645 , H01L29/0665 , H01L29/0673 , H01L29/16 , H01L29/161 , H01L29/24 , H01L29/6675 , H01L29/66772 , H01L29/7854 , H01L29/78603 , H01L29/78696 , H01L51/0048
摘要： The invention relates to a method for making semiconductor nanowires (5) on a substrate (1) including a metal oxide layer (2), said method including the following steps: (a) exposing the metal oxide layer (2) to a hydrogen plasma (11) capable of triggering a reduction of the layer (2) and of generating metal nanodrops (3) having a radius (Rm) at the surface of the metal oxide layer (2); (b) plasma-depositing a thin layer (4) of a semiconductor material on the metal oxide layer (2), said thin layer (4) having a thickness (H3) suitable for covering the metal nanodrops (3); (c) and thermal annealing at a temperature T sufficient for activating a side growth of nanowires (5) by catalysis of the material deposited as a thin layer (4) from the metal nanodrops (3). The invention also relates to the nanowires (5) obtained by the method of the invention, and to nanometric transistors including a semiconductor nanowire (5), e.g. a silicon nanowire (SiNW) for forming a semiconductor link between the source (16), the drain (17), and the gate (18).

5. 发明公开

EP1604406A1 TRANSISTOR FOR ACTIVE MATRIX DISPLAY AND A METHOD FOR PRODUCING SAID TRANSISTOR 审中-公开
标题翻译：晶体管用于生产晶体管有源矩阵显示器和方法
公开(公告)号：EP1604406A1
公开(公告)日：2005-12-14
申请号：EP04708761.4
申请日：2004-02-06
申请人： CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS) , ECOLE POLYTECHNIQUE
发明人： ROCA I CABARROCAS, Pere , VANDERHAGHEN, Régis , DREVILLON, Bernard
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/66765 , H01L29/78603 , H01L29/78678
摘要： The invention concerns a transistor for active matrix display and a method for producing the said transistor (1). The transistor (1) comprises a microcrystalline silicon film (5) and an insulator (3). The crystalline fraction of the said microcrystalline silicon film (5) is above 80%. According to the invention, the transistor (1) comprises a plasma treated interface (4) located between the insulator (3) and the microcrystalline silicon film (5) so that the said transistor (1) has a linear mobility equal or superior to 1.5 cm2V-1s-1, shows threshold voltage stability and wherein the microcrystalline silicon film (5) comprises grains (6) whose size ranges between 10 nm and 400 nm. The invention concerns as well a display unit having a line-column matrix of pixels that are actively addressed, each pixel comprising at least a transistor as described above.

7. 发明公开

EP2353184A2 MODULE PHOTOVOLTAIQUE COMPRENANT UNE ELECTRODE TRANSPARENTE CONDUCTRICE D'EPAISSEUR VARIABLE ET PROCEDES DE FABRICATION D'UN TEL MODULE 有权转让
标题翻译：与用于生产中变厚度过程变得透明电极引线光伏组件
公开(公告)号：EP2353184A2
公开(公告)日：2011-08-10
申请号：EP09801494.7
申请日：2009-12-03
申请人： Ecole Polytechnique , Centre National de la Recherche Scientifique , Total SA
发明人： JOHNSON, Erik, V. , ROCA I CABARROCAS, Pere
IPC分类号： H01L31/0224 , H01L31/18 , H01L31/042 , H01L31/0392
CPC分类号： H01L31/022466 , H01L31/046 , H01L31/1884 , Y02E10/50
摘要： The invention relates to a photovoltaic module (1) that includes at least two photovoltaic cells (7, 7’) in series, each rectangular cell (7, 7’) including, respectively, a first rear thin film electrode (5, 5’), a photovoltaic stack having at least two active materials (3) included between the rear electrode (5) and a transparent conductive electrode (TC) made of a thin film (4), said electrode TC (4, 4’) being capable of collecting and transmitting an electric current (10, 10’) generated by the photovoltaic stack (3, 3’), the two photovoltaic cells (7, 7’) being electrically connected in series by an electrical contact strip (6) that is included between the electrode TC (4) of the first cell (7) and the rear electrode (5’) of the second cell (7’). According to the invention, the local thickness (e) of the electrode TC (4) of the cell (7) varies depending on the distance to the electrical contact strip (6). The invention also relates to methods for depositing and etching the transparent conductive film (TC) so as to simultaneously manufacture a plurality of cells (7, 7’, 7”…) for a single module (1).

8. 发明授权

EP2491576B1 PROCEDE DE FABRICATION D'UN FILM MULTICOUCHE COMPRENANT AU MOINS UNE COUCHE MINCE DE SILICIUM CRISTALLIN 有权
标题翻译：用于生产多层膜具有至少晶体硅薄层
公开(公告)号：EP2491576B1
公开(公告)日：2014-04-02
申请号：EP10785124.8
申请日：2010-10-15
申请人： Ecole Polytechnique , Centre National de la Recherche Scientifique
发明人： ROCA I CABARROCAS, Pere , MORENO, Mario
IPC分类号： H01L21/762 , H01L21/02
CPC分类号： H01L21/0245 , H01L21/02381 , H01L21/0243 , H01L21/02532 , H01L21/0262 , H01L21/02658 , H01L21/02661 , H01L21/76254

9. 发明授权

EP2471111B1 PROCEDE DE NETTOYAGE DE LA SURFACE D'UN SUBSTRAT DE SILICIUM 有权转让
标题翻译：清理方法在硅衬底的表面
公开(公告)号：EP2471111B1
公开(公告)日：2013-10-02
申请号：EP10762742.4
申请日：2010-08-23
申请人： Ecole Polytechnique , Centre National de la Recherche Scientifique
发明人： ROCA I CABARROCAS, Pere , MORENO, Mario
IPC分类号： H01L31/18 , C30B33/12 , C30B29/06
CPC分类号： C30B33/12 , C30B29/06 , H01L31/1804 , Y02E10/547 , Y02P70/521

10. 发明公开

EP2471111A1 PROCEDE DE NETTOYAGE DE LA SURFACE D'UN SUBSTRAT DE SILICIUM 有权转让
标题翻译：清理方法在硅衬底的表面
公开(公告)号：EP2471111A1
公开(公告)日：2012-07-04
申请号：EP10762742.4
申请日：2010-08-23
申请人： Ecole Polytechnique , Centre National de la Recherche Scientifique
发明人： ROCA I CABARROCAS, Pere , MORENO, Mario
IPC分类号： H01L31/18 , C30B33/12 , C30B29/06
CPC分类号： C30B33/12 , C30B29/06 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： The invention relates to a method for cleaning the surface of a silicon substrate, said surface being covered by a layer of silicon oxide. According to the invention, the method includes: a step of a) exposing said surface to a radiofrequency plasma, generated from a fluorinated gas, for stripping the silicon oxide layer and for inducing the adsorption of fluorinated elements on the surface of the silicon substrate, said exposure being performed for a duration of 60 to 900 seconds, the power density generated using the plasma being 10 mW/cm
2 to 350 mW/cm
2 , the fluorinated gas pressure being 10 mTorrs to 200 mTorrs, and the silicon substrate temperature being lower than or equal to 300°C; and a step b) of exposing said surface including the fluorinated elements to a hydrogen radiofrequency plasma, in order to remove said fluorinated elements from the substrate surface, said exposure being performed for a duration of 5 to 120 seconds, the power density generated using the plasma being 10 mW/cm
2 to 350 mW/cm
2 , the hydrogen pressure being 10 mTorrs to 1 Torr, and the silicon substrate temperature being lower than or equal to 300°C.

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