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    • 4. 发明公开
    • ENERGY SELECTIVE PHOTODETECTOR
    • 能量选择性光电探测器
    • EP3301728A1
    • 2018-04-04
    • EP17183442.7
    • 2017-07-27
    • Sharp Kabushiki Kaisha
    • DIMMOCK, James Andrew RobertKAUER, MatthiasEKINS-DAUKES, Nicholas J.STAVRINOU, Paul N.
    • H01L31/108
    • H01L31/035227H01L31/02H01L31/02161H01L31/02168H01L31/022408H01L31/022425H01L31/02327H01L31/03046H01L31/035209H01L31/07H01L31/108H01L31/1085Y02E10/50
    • A semiconductor device has a layered structure. The semiconductor device includes a metallic layer of thickness 1-100nm, with a thickness optimised to absorb light in a wavelength range of operation. The device further includes an adjacent semiconductor layer additionally adjacent to an ohmic electrical contact, wherein the interface between the metallic layer and the semiconductor layer is electrically rectifying and energy selective. The device further includes a reflective back surface positioned opposite to the semiconductor layer relative to incident light providing broadband reflection in the wavelength range of operation. The semiconductor layer includes a quantum well adjacent to the metallic layer, wherein the energy selectivity is provided by the quantum well allowing charge carrier tunneling from the metallic layer. The device further may include an additional anti-reflection dielectric layer deposited on the metallic layer that is configured to minimise reflection of light in the wavelength range of operation.
    • 半导体器件具有分层结构。 该半导体器件包括厚度为1-100nm的金属层,其厚度被优化以吸收在工作波长范围内的光。 该器件还包括附加的与欧姆电触点相邻的半导体层,其中金属层和半导体层之间的界面是电整流和能量选择性的。 该器件还包括反射后表面,该反射后表面相对于在工作的波长范围内提供宽带反射的入射光定位在半导体层的对面。 半导体层包括与金属层相邻的量子阱,其中能量选择性由量子阱提供,允许电荷载流子从金属层隧穿。 该器件还可以包括沉积在金属层上的附加抗反射介电层,该附加抗反射介电层被配置成使波长范围内的光的反射最小化。
    • 8. 发明公开
    • A METHOD FOR THE PRODUCTION OF A CONFORMAL ELEMENT, A CONFORMAL ELEMENT AND USES OF THE SAME
    • VERFAHREN ZUR HERSTELLUNG EINES KONFORMEN元素,KONFORMES ELEMENT UND VERWENDUNG DAVON
    • EP2543061A4
    • 2016-08-17
    • EP11750245
    • 2011-03-07
    • CANATU OY
    • BROWN DAVID P
    • G06F3/041B82B1/00G06F3/044
    • B82Y40/00B82Y30/00G02F1/13338G02F1/167G02F2001/133334H01L31/035227H05K1/0216H05K2201/0323H05K2201/0715Y10T156/10
    • The embodiment relates to a method for the production of an at least partially electrically conductive or semi-conductive element on a structure, wherein the element comprises one or more layers, and is configured to serve as a capacitive touch and/or proximity sensitive film, the method comprising the steps of a) forming a formable element comprising one or more layers, wherein at least one layer comprises a network of high aspect ratio molecular structures (HARM-structures), wherein the HARM-structures are electrically conductive or semi-conductive, and b) arranging the formable element in a conformal manner onto a structure by thermoforming the formable element on a three-dimensional surface of the structure, for producing a conformal and at least partially electrically conductive or semi-conductive element comprising one or more layers, wherein at least one layer comprises a network of HARM-structures, on the three dimensional surface of the structure.
    • 本发明涉及一种用于在结构上制造至少部分导电或半导电元件的方法,其中所述元件包括一层或多层,所述方法包括以下步骤:a)形成包含一个或多个 层,其中至少一个层包括高纵横比分子结构(HARM结构)的网络,其中所述HARM结构是导电的或半导电的,以及b)将所述可成形元件以共形方式布置在结构上 在结构的三维表面上压制和/或真空密封可成形元件,以产生包含一层或多层的保形和至少部分导电或半导电元件,其中至少一层包括HARM网络 结构,在结构的三维表面上。 此外,本发明涉及保形元件及其应用。