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1. 发明授权

EP4220686B1 METHOD FOR DEPOSITING A STRAIN RELAXED GRADED BUFFER LAYER OF SILICON GERMANIUM ON A SURFACE OF A SUBSTRATE 有权
公开(公告)号：EP4220686B1
公开(公告)日：2024-07-10
申请号：EP22154292.1
申请日：2022-01-31
IPC分类号： H01L21/20
CPC分类号： H01L21/0245 , H01L21/02532 , H01L21/02381 , H01L21/0262 , H01L21/0251 , H01L21/02502

2. 发明公开

EP4386826A1 PROCÉDÉ DE FABRICATION D'UN DISPOSITIF SEMI-CONDUCTEUR 审中-实审
公开(公告)号：EP4386826A1
公开(公告)日：2024-06-19
申请号：EP23215732.1
申请日：2023-12-12
申请人： Commissariat à l'énergie atomique et aux énergies alternatives
发明人： ACOSTA ALBA, Pablo , REBOH, Shay
IPC分类号： H01L21/8234 , H01L21/324 , H01L21/8238 , H01L21/02 , H01L29/78 , H01L29/10 , H01L21/268
CPC分类号： H01L21/823821 , H01L21/823807 , H01L29/1054 , H01L21/268 , H01L21/02532 , H01L21/02381 , H01L21/0245 , H01L21/02675 , H01L21/0251 , H01L21/76224
摘要： Un aspect de l'invention concerne un procédé de fabrication d'un dispositif semiconducteur comprenant une première zone semi-conductrice optimisée pour la conduction par électrons et une deuxième zone semi-conductrice optimisée pour la conduction par trous, le procédé comprenant les étapes suivantes :
- fournir une structure multicouches comprenant un substrat et une couche de silicium-germanium disposée sur le substrat ;
- définir dans la structure multicouches une première région destinée à contenir la première zone semi-conductrice et une deuxième région destinée à contenir la deuxième zone semi-conductrice ;
- soumettre la structure multicouches à un recuit laser de manière à modifier une portion de la structure multicouches située dans la première région, ladite portion comprenant avant le recuit laser une partie de la couche de silicium-germanium, ladite portion comprenant après le recuit laser une partie appauvrie en germanium et une partie enrichie en germanium disposée sur la partie appauvrie en germanium ;
- graver la partie enrichie en germanium de manière à exposer la partie appauvrie en germanium.

3. 发明授权

EP1437765B1 PRODUCTION METHOD FOR SEMICONDUCTOR SUBSTRATE AND PRODUCTION METHOD FOR FIELD EFFECT TRANSISTOR 有权
公开(公告)号：EP1437765B1
公开(公告)日：2018-12-26
申请号：EP02767854.9
申请日：2002-08-23
申请人： SUMCO CORPORATION
发明人： SHIONO, Ichiro , MIZUSHIMA,Kazuki , YAMAGUCHI, Kenji
IPC分类号： H01L21/205 , H01L21/336
CPC分类号： H01L29/165 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/02532 , H01L21/0262 , H01L29/1054 , H01L29/66916
摘要： Production of a semiconductor substrate having an silicon-germanium (SiGe) layers (2,3) formed on an silicon substrate (1) comprises heat treating at temperatures exceeding epitaxial growth temperature while or after SiGe layers are formed by epitaxial growth and polishing out surface unevenness produced by the heat treatment after the SiGe layers are formed.

4. 发明授权

EP2317542B1 Semiconductor device and method of manufacturing thereof 有权转让
公开(公告)号：EP2317542B1
公开(公告)日：2018-05-23
申请号：EP09174720.4
申请日：2009-10-30
申请人： IMEC VZW
发明人： Degroote, Stefan , Cheng, Kai
IPC分类号： H01L21/20 , H01L29/778 , H01L29/06 , H01L29/20
CPC分类号： H01L21/02389 , H01L21/02422 , H01L21/0245 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L29/0649 , H01L29/2003 , H01L29/66477 , H01L29/7786
摘要： The semiconductor substrate structure (100) a semiconductor substrate (1) and a GaN-type layer stack (20) on top of the semiconductor substrate (1). The GaN-type layer stack (20) comprises at least one buffer layer (21,22), a first active layer (2) and a second active layer (23), at an interface of which first and second active layer (2,3) active device regions are definable. The semiconductor substrate (1) is present on an insulating layer (12) and is patterned to define trenches (14) according to a predefined pattern, which pattern comprises at least one trench (14) underlying such active device region, said trenches (14) extending from the insulating layer (12) into at least one buffer layer (21,22) of the GaN-type layer stack (20) and being overgrown within said at least one buffer layer (22), so as to obtain that the first and the second active layer (2,3) are continuous at least within the active device regions.

5. 发明授权

EP2050125B1 STRAINED LAYERS WITHIN SEMICONDUCTOR BUFFER STRUCTURES 有权转让
标题翻译：半导体缓冲结构中的应变层
公开(公告)号：EP2050125B1
公开(公告)日：2017-12-20
申请号：EP07799093.5
申请日：2007-06-27
申请人： ASM America, Inc. , Soitec
发明人： CODY, Nyles, W. , FIGUET, Christophe , KENNARD, Mark
IPC分类号： H01L21/20
CPC分类号： H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02532

6. 发明授权

EP3151266B1 PROCEDE DE FORMATION D'UNE PORTION SEMICONDUCTRICE PAR CROISSANCE EPITAXIALE SUR UNE PORTION CONTRAINTE 有权
标题翻译：在约束部分上通过外延生长形成半导体部分的方法
公开(公告)号：EP3151266B1
公开(公告)日：2017-11-22
申请号：EP16190980.9
申请日：2016-09-28
申请人： Commissariat à l'énergie atomique et aux énergies alternatives
发明人： REBOUD, Vincent , GASSENQ, Alban , GUILLOY, Kévin , CALVO, Vincent , TCHELNOKOV, Alexei
IPC分类号： H01L21/20 , H01L21/02
CPC分类号： H01L33/26 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02612 , H01L21/02656 , H01L21/2007 , H01L21/823412 , H01L21/823807 , H01L29/1054 , H01L29/7842 , H01L33/0012 , H01L33/005 , H01L33/0054 , H01L33/0095 , H01L33/105 , H01L33/20 , H01L2924/01032 , H01L2924/3511 , H01L2933/0033

7. 发明公开

EP3221901A1 VERFAHREN ZUR ERZEUGUNG VON DOTIERTEN, POLYKRISTALLINEN HALBLEITERSCHICHTEN 审中-公开
标题翻译： VERFAHREN ZUR ERZEUGUNG VON DOTIERTEN，POLYKRISTALLINEN HALBLEITERSCHICHTEN
公开(公告)号：EP3221901A1
公开(公告)日：2017-09-27
申请号：EP15794943.9
申请日：2015-11-17
申请人： Evonik Degussa GmbH
发明人： MADER, Christoph , WUNNICKE, Odo , MARTENS, Susanne , LEHMKUHL, Jasmin , GUENTHER, Christian
IPC分类号： H01L31/068 , H01L21/02 , H01L31/18
CPC分类号： H01L31/182 , B05D1/005 , B05D3/0254 , H01L21/0245 , H01L21/02488 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/02628 , H01L31/0288 , H01L31/03682 , H01L31/068 , H01L31/0745 , H01L31/1804 , H01L31/1872 , Y02E10/547 , Y02P70/521
摘要： The invention relates to a method for generating highly doped polycrystalline semiconductor layers on a semiconductor substrate. A first Si precursor composition containing at least one first dopant is applied onto one or more regions of the surface of the semiconductor substrate; optionally a second Si precursor composition containing at least one second dopant is applied onto one or more additional regions of the surface of the semiconductor substrate, wherein the first dopant is an n-type dopant, and the second dopant is a p-type dopant or vice versa; and each of the coated regions of the surface of the semiconductor substrate is converted such that polycrystalline silicon is produced from the Si precursor. The invention further relates to the semiconductors which can be obtained according to the method and to the use thereof, in particular in the production of solar cells.
摘要翻译：本发明涉及一种用于在半导体衬底上产生高度掺杂的多晶半导体层的方法。将包含至少一种第一掺杂剂的第一硅前体组合物施加到半导体衬底表面的一个或多个区域上; 任选地将包含至少一种第二掺杂剂的第二Si前体组合物施加到半导体衬底表面的一个或多个附加区域上，其中第一掺杂剂是n型掺杂剂，第二掺杂剂是p型掺杂剂或反之亦然; 并且半导体衬底的表面的每个涂覆区域被转换，使得由Si前体产生多晶硅。本发明进一步涉及可以根据该方法及其用途，特别是在太阳能电池的生产中获得的半导体。

8. 发明公开

EP3193353A1 METHODS FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING ATOMIC LAYER STRUCTURES USING N2O AS AN OXYGEN SOURCE 审中-公开
标题翻译：用N2O作为氧源制造包括原子层结构的半导体器件的方法
公开(公告)号：EP3193353A1
公开(公告)日：2017-07-19
申请号：EP16205912.5
申请日：2016-12-21
申请人： Atomera Incorporated
发明人： STEPHENSON, Robert , CODY, Nyles
IPC分类号： H01L21/20 , H01L21/02
CPC分类号： H01L21/02507 , H01L21/0245 , H01L21/02488 , H01L21/0262 , H01L29/1054 , H01L29/152 , H01L29/7786 , H01L29/78 , H01L29/7842
摘要： A method for making a semiconductor device may include forming a plurality of spaced apart structures on a semiconductor substrate within a semiconductor processing chamber, with each structure including a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base silicon monolayers defining a base semiconductor portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions. Furthermore, the oxygen monolayers may be formed using N 2 O as an oxygen source.
摘要翻译：用于制造半导体器件的方法可以包括在半导体处理室内的半导体衬底上形成多个间隔开的结构，其中每个结构包括多个堆叠的层组。每组层可以包括限定基础半导体部分的多个堆叠的基础硅单层和限制在相邻基础硅部分的晶格内的至少一个氧单层。此外，氧单层可以使用N2O作为氧源形成。

9. 发明公开

EP3174677A1 PROCEDE DE FABRICATION D'UNE PLAQUETTE DE MATERIAU SEMI-CONDUCTEUR A BASE DE NITRURE D'ELEMENTS 13 审中-公开
标题翻译：用于生产半导体的晶片基于单元13 NITRIDE
公开(公告)号：EP3174677A1
公开(公告)日：2017-06-07
申请号：EP15750002.6
申请日：2015-07-27
申请人： Saint-Gobain Lumilog
发明人： BEAUMONT, Bernard , FAURIE, Jean-Pierre
IPC分类号： B28D5/02 , H01L21/02
CPC分类号： H01L21/0254 , H01L21/0242 , H01L21/0245 , H01L21/02458 , H01L21/02502 , H01L21/02639 , H01L33/0075 , H01L33/32
摘要： The invention relates to a process for fabricating a semiconductor including a layer (50) of element-13 nitride comprising active zones (52) for the fabrication of electronic components, and inactive zones (51), the active and inactive zones extending over a front side (53) of the element-13 nitride layer, the concentration of crystal defects in the active zones being lower than the concentration of defects in the inactive zones, the process comprising steps consisting in: using a mask to form, in a starting substrate (10): o first regions for growing the active zones and o second regions (11) for growing the inactive zones, the mask comprising a plurality of apertures each defining an active zone feature on the starting substrate; and growing (700) the element-13 nitride layer comprising the active and inactive zones on the first and second regions, the process being noteworthy in that it furthermore comprises the following steps: receiving a theoretical feature pitch, the theoretical feature pitch corresponding to a desired distance between two adjacent active-zone features on the front side of the element-13 nitride layer; and calculating at least one mask pitch different from the theoretical feature pitch in order to compensate for active-zone feature shifts, the active-zone feature shifts being due to the conditions of growth of the semiconductor, the mask pitch corresponding to a distance between two adjacent apertures in the protective mask.
摘要翻译：本发明涉及一种用于制造半导体，包括元件-13族氮化物构成的层（50），包括用于电子元件的制造有源区（52），和非活性区（51），活动和非活动区之上延伸的前在元件13的氮化物层，晶体缺陷在活性区比的缺陷在无效区域中的浓度低的浓度的侧（53），该方法包括步骤在由：利用掩模形成，在起始衬底（10）：○用于生长有源区和邻用于生长非活性区，所述掩模包括光圈的所述起始衬底有源区特征的每个限定的多个第二区域（11）的第一区域; 和生长（700）的元件13的氮化物层包括在所述第一和第二区域中的活动和非活动区域，则过程是值得注意之处做了进一步包括以下步骤：接收一个理论特征节距，理论特征节距对应于一个两个相邻的有源区之间所需的距离展示了在元件13的氮化物层的前侧; 并且为了补偿有源区功能偏移计算从所述理论特征节距不同的至少一个掩模间距，有源区功能偏移是由于半导体的生长条件，在掩模间距对应于两个之间的距离相邻的光圈在防护罩。

10. 发明公开

EP3119929A1 METHOD FOR MANUFACTURING GROUP 13 NITRIDE CRYSTAL AND GROUP 13 NITRIDE CRYSTAL 审中-公开
标题翻译：制造13族氮化物晶体和13族氮化物晶体的方法
公开(公告)号：EP3119929A1
公开(公告)日：2017-01-25
申请号：EP15765775.0
申请日：2015-02-19
申请人： Ricoh Company, Ltd.
发明人： HAYASHI, Masahiro , SATOH, Takashi , MIYOSHI, Naoya , WADA, Junichi , SARAYAMA, Seiji
IPC分类号： C30B29/38 , C30B19/06
CPC分类号： C30B19/066 , C30B9/10 , C30B9/12 , C30B19/02 , C30B19/06 , C30B19/12 , C30B29/406 , C30B29/68 , H01L21/0245 , H01L21/0254 , H01L21/02625 , H01L33/0075
摘要： In a method for manufacturing a group 13 nitride crystal, a seed crystal made of a group 13 nitride crystal is arranged in a mixed melt containing an alkali metal and a group 13 element, and nitrogen is supplied to the mixed melt to grow the group 13 nitride crystal on a principal plane of the seed crystal. The seed crystal is manufactured by vapor phase epitaxy. At least a part of contact members coming into contact with the mixed melt in a reaction vessel accommodating the mixed melt is made of AI
2 O
3 . An interface layer having a photoluminescence emission peak whose wavelength is longer than the wavelength of a photoluminescence emission peak of the grown group 13 nitride crystal is formed between the seed crystal and the grown group nitride crystal.
摘要翻译：在用于制造13族氮化物晶体的方法中，由13族氮化物晶体制成的晶种排列在含有碱金属和13族元素的混合熔体中，并且氮气被供应至混合熔体以生长族13 氮化物晶体在晶种的主平面上。晶种通过气相外延制造。在容纳混合熔体的反应容器中与混合熔体接触的接触部件的至少一部分由Al 2 O 3制成。具有光致发光峰的波长比光致发光峰的波长长的界面层生长的第13族氮化物晶体形成在籽晶和生长的氮化物晶体之间。

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