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    • 63. 发明公开
    • SEMICONDUCTOR DEVICE MANUFACTURING METHOD
    • HALBLEITERBAUELEMENTHERSTELLUNGSVERFAHREN
    • EP3082167A1
    • 2016-10-19
    • EP13898991.8
    • 2013-12-13
    • Mitsubishi Electric Corporation
    • KAWASE, YusukeKANADA, KazunoriMINATO, Tadaharu
    • H01L29/739H01L21/336H01L29/78
    • H01L29/7395H01L21/0415H01L21/26513H01L21/324H01L29/0821H01L29/0847H01L29/167H01L29/66333
    • A first step in which, on a first main surface and a second main surface opposite to the first main surface of a semiconductor substrate, a first conductivity-type impurity is implanted in the second main surface by using multiple ion implantations of different acceleration energies so as to form a first impurity region on the semiconductor substrate, a second step in which a second conductivity-type impurity is implanted in the second main surface using the acceleration energy lower than the multiple ion implantations, and a second impurity region is formed so that a non-implantation region in which the impurity is not implanted is left between that and the first impurity region in the semiconductor substrate, a heat treatment step in which heat treatment is applied to the semiconductor substrate so that a buffer layer is formed by the first conductivity-type impurity, a collector layer is formed by the second conductivity-type impurity, and a non-diffusion region in which the first conductivity-type impurity and the second conductivity-type impurity do not diffuse are left between the buffer layer and the collector layer, and a step in which a collector electrode in contact with the collector layer is formed are provided,
    • 第一步骤是通过使用不同加速能量的多次离子注入,在第一主表面和与半导体衬底的第一主表面相对的第二主表面上将第一导电类型杂质注入第二主表面,因此 为了在半导体衬底上形成第一杂质区域,第二步骤是使用低于多个离子注入的加速能量将第二导电类型杂质注入第二主表面,形成第二杂质区,使得 在半导体衬底中留下不注入杂质的非注入区域和第一杂质区域之间的热处理步骤,其中对半导体衬底施加热处理使得缓冲层由第一 导电型杂质,通过第二导电型杂质形成集电极层,以及非扩散区域,其中第一c 在缓冲层和集电体层之间留有感生性杂质和第二导电型杂质不扩散,并且设置形成与集电体层接触的集电极的工序,
    • 66. 发明公开
    • Semiconductor device
    • 半导体器件
    • EP2626906A3
    • 2016-06-15
    • EP13153523.9
    • 2013-01-31
    • Renesas Electronics Corporation
    • Arai, DaisukeKubo, SakaeIkegami, Yuta
    • H01L29/739H01L21/331H01L29/06H01L21/20H01L29/66H01L29/04H01L29/08
    • H01L29/7393H01L29/045H01L29/0619H01L29/0623H01L29/0696H01L29/0847H01L29/66333H01L29/7395
    • To improve a manufacture yield of semiconductor devices each including an 1GBT, an active region is defined by an insulating film and where an element of an 1GBT is formed has a first long side and a second long side spaced at a predetermined distance apart from each other and extended in a first direction in a planar view. One end of the first long side has a first short side forming a first angle with the first long side, and one end of the second long side has a second short side forming a second angle with the second long side. The other end of the first long side has a third short side forming a third angle with the first long side, and the other end of the second long side has a fourth short side forming a fourth angle with the second long side. The first angle, the second angle, the third angle, and the fourth angle are in a range larger than 90 degrees and smaller than 180 degrees.
    • 为了提高各自包括1GBT的半导体器件的制造成品率,有源区域由绝缘膜限定,并且其中形成1GBT的元件具有彼此隔开预定距离隔开的第一长边和第二长边 并且在平面图中沿第一方向延伸。 第一长边的一端具有与第一长边形成第一角度的第一短边,第二长边的一端具有与第二长边形成第二角度的第二短边。 第一长边的另一端具有与第一长边形成第三角度的第三短边,第二长边的另一端具有与第二长边形成第四角度的第四短边。 第一角度,第二角度,第三角度和第四角度在大于90度且小于180度的范围内。