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11. 发明公开

EP3257069A1 METAL HARDMASK COMPOSITION AND PROCESSES FOR FORMING FINE PATTERNS ON SEMICONDUCTOR SUBSTRATES 有权转让
标题翻译：金属硬质合金组合物和在半导体衬底上形成微细图案的工艺
公开(公告)号：EP3257069A1
公开(公告)日：2017-12-20
申请号：EP16702558.4
申请日：2016-02-02
申请人： AZ Electronic Materials Luxembourg S.à.r.l.
发明人： YAO, Huirong , WOLFER, Elizabeth , MULLEN, Salem, K. , DIOSES, Alberto, D. , CHO, JoonYeon
IPC分类号： H01L21/02
CPC分类号： C09D5/006 , G03F7/11 , H01L21/02142 , H01L21/02172 , H01L21/02175 , H01L21/02282 , H01L21/3081 , H01L21/3086 , H01L21/31133 , H01L21/31138
摘要： The present invention relates to a novel composition with improved stability containing soluble, multi-ligand-substituted metal compound, a polyol compound and a solvent useful for filling material on photoresist patterns with good trench or via filling properties of microlithographic features, where the filled patterns having good plasma etch resistance in oxygen based plasmas and are used as a hard mask in forming fine patterns on semiconductor substrates by pattern transfer of this hard mask. The present invention further relates to using the novel composition in methods for manufacturing electronic devices.

12. 发明公开

EP3211657A3 METHOD FOR MANUFACTURING DIAMOND SUBSTRATE, DIAMOND SUBSTRATE, AND FREESTANDING DIAMOND SUBSTRATE 审中-实审转让
公开(公告)号：EP3211657A3
公开(公告)日：2017-11-15
申请号：EP17000294.3
申请日：2017-02-23
申请人： Shin-Etsu Chemical Co., Ltd. , National Institute of Advanced Industrial Science and Technology , National University Corporation Kanazawa University
发明人： Noguchi, Hitoshi , Shirai, Shozo , Makino, Toshiharu , Ogura, Masahiko , Kato, Hiromitsu , Kawashima, Hiroyuki , Kuwabara, Daisuke , Yamasaki, Satoshi , Takeuchi, Daisuke , Tokuda, Norio , Inokuma, Takao , Matsumoto, Tsubasa
IPC分类号： H01L21/02
CPC分类号： C30B25/04 , C30B25/186 , C30B25/20 , C30B29/04 , H01L21/02057 , H01L21/02085 , H01L21/02376 , H01L21/02527 , H01L21/0262 , H01L21/3065 , H01L21/3086 , H01L29/1602
摘要： The present invention provides a method for manufacturing a diamond substrate, including: a first step of preparing patterned diamond on a foundation surface, a second step of growing diamond from the patterned diamond prepared in the first step to form the diamond in a pattern gap of the patterned diamond prepared in the first step, a third step of removing the patterned diamond prepared in the first step to form a patterned diamond composed of the diamond formed in the second step, and a fourth step of growing diamond from the patterned diamond formed in the third step to form the diamond in a pattern gap of the patterned diamond formed in the third step. There can be provided a method for manufacturing a diamond substrate which can sufficiently suppress dislocation defects, a high-quality diamond substrate, and a freestanding diamond substrate.

13. 发明公开

EP3141959A4 LITHOGRAPHIC FILM FORMATION MATERIAL, COMPOSITION FOR LITHOGRAPHIC FILM FORMATION, LITHOGRAPHIC FILM, PATTERN FORMATION METHOD, AND PURIFICATION METHOD 审中-公开
标题翻译： LITHOGRAFISCHES FILMBILDUNGSMATERIAL，ZUSAMMENSETZUNGFÜRLITHOGRAFISCHE FILMBILDUNG，LITHOGRAFISCHER FILM，STRUKTURBILDUNGSVERFAHREN UND REINIGUNGSVERFAHREN
公开(公告)号：EP3141959A4
公开(公告)日：2017-09-13
申请号：EP15788887
申请日：2015-05-08
申请人： MITSUBISHI GAS CHEMICAL CO
发明人： MAKINOSHIMA TAKASHI , ECHIGO MASATOSHI
IPC分类号： G03F7/11 , C07D303/18 , G03F7/26 , H01L21/027
CPC分类号： C07C39/12 , C07C25/22 , C07C43/285 , C07C69/52 , C07C69/533 , C07C205/06 , C07C211/61 , C07C321/26 , C07C2103/54 , C07D303/18 , C07D303/36 , C08G8/08 , C09D161/06 , G03F7/0045 , G03F7/039 , G03F7/11 , G03F7/162 , G03F7/168 , G03F7/2037 , G03F7/26 , G03F7/322 , G03F7/38 , H01L21/027 , H01L21/30604 , H01L21/3081 , H01L21/3086
摘要： The material for forming a film for lithography according to the present invention contains a compound represented by the following formula (1): wherein, each R° independently represents a monovalent group having an oxygen atom, a monovalent group having a sulfur atom, a monovalent group having a nitrogen atom, a hydrocarbon group or a halogen atom, and each p is independently an integer of 0 to 4.
摘要翻译：根据本发明的用于形成光刻用膜的材料含有由下式（1）表示的化合物：其中，每个R°独立地表示具有氧原子的一价基团，具有硫原子的一价基团，单价具有氮原子，烃基或卤素原子的基团，并且每个p独立地为0至4的整数。

14. 发明公开

EP3087586A4 ADVANCED ETCHING TECHNIQUES FOR STRAIGHT, TALL AND UNIFORM FINS ACROSS MULTIPLE FIN PITCH STRUCTURES 有权
标题翻译： ERWEITERTEÄTZTECHNIKENFÜRGERADLINIGE，GROSSE UNDGLEICHMÄSSIGENRIPPENÜBERMEHRERE RIPPENNEIGUNGSSTRUKTUREN
公开(公告)号：EP3087586A4
公开(公告)日：2017-08-30
申请号：EP13900261
申请日：2013-12-23
申请人： INTEL CORP
发明人： AMBATI MURALIDHAR S , JHAVERI RITESH , KIM MOOSUNG
IPC分类号： H01L21/3065 , H01L21/336
CPC分类号： H01L21/3065 , H01L21/3085 , H01L21/3086 , H01L21/31116 , H01L21/324 , H01L29/0642 , H01L29/0657 , H01L29/66795

15. 发明公开

EP3101682A1 METHOD FOR PROVIDING A PATTERNED TARGET LAYER IN A SEMICONDUCTOR STRUCTURE 审中-公开
标题翻译： VERFAHREN ZUR BEREITSTELLUNG EINER GEMUSTERTEN ZIELSCHICHT IN EINER HALBLEITERSTRUKTUR
公开(公告)号：EP3101682A1
公开(公告)日：2016-12-07
申请号：EP15170519.1
申请日：2015-06-03
申请人： IMEC VZW
发明人： Altamirano Sanchez, Efrain , Tao, Zheng
IPC分类号： H01L21/033 , H01L21/308 , H01L21/311 , H01L21/316
CPC分类号： H01L21/31144 , H01L21/02164 , H01L21/02274 , H01L21/0228 , H01L21/0337 , H01L21/3086
摘要： A method for providing a patterned target layer in a semiconductor structure, the method comprising providing a semiconductor structure comprising a target layer to be patterned and on the target layer, a first hard mask layer, providing, overlying and in contact with the first hard mask layer, a patterning stack comprising a first sacrificial material, patterning the first sacrificial material, depositing a conformal layer of a spacer material on the patterning stack, patterning the conformal layer of the spacer material, patterning the first hard mask layer by etching, whereby the patterned spacer material is used as an etch mask, and providing the patterned target layer by etching the target layer using the patterned first hard mask layer as an etch mask, wherein the first sacrificial material is an amorphous carbon, and wherein the spacer material is a dielectric comprising oxygen and the conformal deposition of the layer of the spacer material is done at a temperature in the range of 50° C-75° C using an Atomic Layer Deposition (ALD) process.
摘要翻译：一种用于在半导体结构中提供图案化目标层的方法，所述方法包括提供半导体结构，所述半导体结构包括待图案化的目标层和所述目标层上的第一硬掩模层，提供，覆盖并与第一硬掩模接触层，包括第一牺牲材料的图案化叠层，图案化第一牺牲材料，在图案化叠层上沉积间隔物材料的共形层，图案化间隔物材料的共形层，通过蚀刻图案化第一硬掩模层，由此图案化间隔物材料用作蚀刻掩模，并且通过使用图案化的第一硬掩模层作为蚀刻掩模蚀刻目标层来提供图案化目标层，其中第一牺牲材料是无定形碳，并且其中间隔物材料为包含氧的电介质和隔离材料层的共形沉积在该范围内的温度下进行使用原子层沉积（ALD）工艺的50°C-75°C。

16. 发明公开

EP3087586A1 ADVANCED ETCHING TECHNIQUES FOR STRAIGHT, TALL AND UNIFORM FINS ACROSS MULTIPLE FIN PITCH STRUCTURES 有权
标题翻译：推进了直蚀刻技术，大，即使排骨过几根肋骨边坡结构
公开(公告)号：EP3087586A1
公开(公告)日：2016-11-02
申请号：EP13900261.2
申请日：2013-12-23
申请人： Intel Corporation
发明人： AMBATI, Muralidhar S. , JHAVERI, Ritesh , KIM, Moosung
IPC分类号： H01L21/3065 , H01L21/336
CPC分类号： H01L21/3065 , H01L21/3085 , H01L21/3086 , H01L21/31116 , H01L21/324 , H01L29/0642 , H01L29/0657 , H01L29/66795
摘要： Embodiments of the invention describe semiconductor devices with high aspect ratio fins and methods for forming such devices. According to an embodiment, the semiconductor device comprises one or more nested fins and one or more isolated fins. According to an embodiment, a patterned hard mask comprising one or more isolated features and one or more nested features is formed with a hard mask etching process. A first substrate etching process forms isolated and nested fins in the substrate by transferring the pattern of the nested and isolated features of the hard mask into the substrate to a first depth. A second etching process is used to etch through the substrate to a second depth. According to embodiments of the invention, the first etching process utilizes an etching chemistry comprising HBr, O
2 and CF
4 , and the second etching process utilizes an etching chemistry comprising Cl
2 , Ar, and CH
4 .
摘要翻译：本发明的实施例描述用于形成寻求器件具有高纵横比翅片的半导体器件和方法。。根据在实施例中，半导体器件包括一个或多个嵌套散热片和一个或多个分离翼片。。根据在实施例中，图案化的硬掩模，包括一种或多种分离的特征和一个或多个嵌套的特征形成有硬掩模蚀刻工艺。第一衬底蚀刻工艺形式分离并在基板嵌套翅片由传递环的所述硬掩模进衬底的嵌套和孤立的特征到第一深度的图案。第二腐蚀过程用于通过衬底蚀刻至第二深度。。根据本发明的实施例中，在第一蚀刻工艺利用在蚀刻化学包括的HBr，O 2和CF 4，和第二蚀刻工艺在蚀刻化学包括C12，Ar和CH 4利用。

17. 发明公开

EP3007208A1 METHOD OF PROCESSING TARGET OBJECT 有权
标题翻译： VERFAHREN ZUR VERARBEITUNG EINES ZIELOBJEKTS
公开(公告)号：EP3007208A1
公开(公告)日：2016-04-13
申请号：EP15187641.4
申请日：2015-09-30
申请人： TOKYO ELECTRON LIMITED
发明人： KIHARA, Yoshihide , HISAMATSU, Toru
IPC分类号： H01L21/033 , H01L21/316
CPC分类号： H01L21/0338 , C23C16/401 , C23C16/402 , C23C16/45525 , C23C16/4554 , C23C16/45553 , H01L21/02164 , H01L21/02274 , H01L21/0228 , H01L21/0276 , H01L21/0332 , H01L21/0335 , H01L21/0337 , H01L21/3086 , H01L21/31116 , H01L21/31144 , H01L21/32139
摘要： A controllability of a size of a mask can be improved in a multi-patterning method. A process of forming a silicon oxide film on a first mask and an antireflection film is performed. In this process, plasma of a first gas including a silicon halide gas and plasma of a second gas including an oxygen gas are alternately generated. Then, a region of the silicon oxide film is removed such that only a region along a side wall of the first mask is left, and then, the first mask is removed and the antireflection film and an organic film is etched.
摘要翻译：在多图案化方法中可以提高掩模尺寸的可控性。执行在第一掩模和抗反射膜上形成氧化硅膜的工艺。在该方法中，交替地产生包括卤化硅气体的第一气体和包括氧气的第二气体的等离子体的等离子体。然后，去除氧化硅膜的区域，使得仅留下沿着第一掩模的侧壁的区域，然后去除第一掩模，并且蚀刻抗反射膜和有机膜。

18. 发明公开

EP2993695A1 SEMI-FLOATING GATE DEVICE AND MANUFACTURING METHOD THEREFOR 审中-公开
标题翻译： HUSBSCHWEBENDE GATE-VORRICHTUNG UND HERSTELLUNGSVERFAHRENDAFÜR
公开(公告)号：EP2993695A1
公开(公告)日：2016-03-09
申请号：EP14791834.6
申请日：2014-04-29
申请人： Fudan University
发明人： WANG, Pengfei , ZHANG, Wei , SUN, Qingqing
IPC分类号： H01L27/105 , H01L29/788 , H01L29/00 , H01L21/8239
CPC分类号： H01L29/788 , H01L21/265 , H01L21/28273 , H01L21/28525 , H01L21/30604 , H01L21/3085 , H01L21/3086 , H01L27/0727 , H01L27/11521 , H01L27/11553 , H01L27/11556 , H01L29/0847 , H01L29/1037 , H01L29/401 , H01L29/41 , H01L29/42324 , H01L29/42336 , H01L29/4916 , H01L29/66356 , H01L29/66666 , H01L29/66825 , H01L29/7391 , H01L29/7827 , H01L29/7889 , H01L29/861
摘要： The disclosure, belonging to the technological field of semiconductor memory, specifically relates to a semi-floating-gate device which comprises at least a semiconductor substrate, a source region, a drain region, a floating gate, a control gate, a perpendicular channel region and a gated p-n junction diode used to connect the floating gate and the substrate. The semi-floating-gate device disclosed in the disclosure using the floating gate to store information and realizing charging or discharging of the floating gate through a gated p-n junction diode boasts small unit area, high chip density, low operating voltage in data storage and strong ability in data retain.
摘要翻译：属于半导体存储器的技术领域的公开具体涉及一种半浮栅器件，其包括至少半导体衬底，源极区，漏极区，浮置栅极，控制栅极，垂直沟道区域以及用于连接浮动栅极和衬底的选通pn结二极管。在本公开中公开的使用浮动栅极存储信息并通过门控pn结二极管实现浮置栅极的充电或放电的半浮栅器件具有小的单位面积，高芯片密度，数据存储中的低工作电压和强数据保留能力。

19. 发明公开

EP2858092A4 METHOD FOR MANUFACTURING SOI WAFER 有权转让
公开(公告)号：EP2858092A4
公开(公告)日：2016-03-02
申请号：EP13794721
申请日：2013-04-19
申请人： SHINETSU HANDOTAI KK
发明人： AGA HIROJI , ISHIZUKA TORU
IPC分类号： H01L21/02 , H01L21/20 , H01L21/265 , H01L21/306 , H01L21/308 , H01L21/322 , H01L21/762 , H01L27/12
CPC分类号： H01L21/76254 , H01L21/2007 , H01L21/265 , H01L21/26506 , H01L21/30604 , H01L21/3081 , H01L21/3086 , H01L21/3226 , H01L21/76251 , H01L21/76256
摘要： The present invention provides a method for manufacturing an SOI wafer, in which an insulator film is formed at least on all surfaces of a base wafer, and while protecting a first part of the insulator film on a back surface on the opposite side from a bonded surface of the base wafer, a bonded wafer before separating a bond wafer along a layer of the implanted ion is brought into contact with a liquid capable of dissolving the insulator film or exposed to a gas capable of dissolving the insulator film, such that a second part of the insulator film interposed between the bond wafer and the base wafer is etched from an outer circumferential edge of the bonded wafer and toward the center of the bonded wafer. The method can control the terrace width, prevent the occurrence of an SOI island, and inhibit warping of the SOI wafer in a bonding process with a base wafer having an insulator film formed thereon.

20. 发明公开

EP2847234A4 PHOTOCURABLE COMPOSITION AND METHOD OF MANUFACTURING FILM USING THE COMPOSITION 有权
标题翻译：可固化组合物和方法用于产生与该组合物的薄膜
公开(公告)号：EP2847234A4
公开(公告)日：2016-02-24
申请号：EP13839386
申请日：2013-09-11
申请人： CANON KK
发明人： ITO TOSHIKI , MIHARA CHIEKO , KAWASAKI YOUJI
IPC分类号： C08F2/48 , H01L21/768 , H01L23/532 , H05K3/10
CPC分类号： C08J5/18 , B29C35/0805 , B29C2035/0827 , B29K2033/04 , B29K2105/0005 , B29K2909/00 , C08F2/48 , C08J2333/08 , G03F7/0002 , G03F7/0046 , G03F7/0048 , G03F7/027 , G03F7/031 , H01L21/02118 , H01L21/3086 , H01L21/311 , H05K3/0023 , H05K3/0076 , H05K3/0079 , H05K3/06 , H05K3/107 , H05K2203/0113 , H05K2203/086 , H05K2203/087
摘要： Provided are a photocurable composition having high filling property and capable of reducing a mold release force upon production of a film through the utilization of a photo-imprint method, and a method of manufacturing a film using the photocurable composition. The photocurable composition is a photocurable composition, including at least the following component (A) to component (C): (A) a polymerizable compound; (B) a photopolymerization initiator; and (C) a surfactant represented by the following general formula (1): Rf1-Rc-X (1)

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