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1. 发明授权

US06261967B1 Easy to remove hard mask layer for semiconductor device fabrication 有权
标题翻译：易于去除用于半导体器件制造的硬掩模层
公开(公告)号：US06261967B1
公开(公告)日：2001-07-17
申请号：US09501479
申请日：2000-02-09
申请人： Satish D. Athavale , Hua Shen , David Kotecki , Jenny Lian
发明人： Satish D. Athavale , Hua Shen , David Kotecki , Jenny Lian
IPC分类号： H01L21302
CPC分类号： H01L21/32136 , H01L21/0332 , H01L21/31116 , H01L21/32139 , H01L28/55 , H01L28/60
摘要： A method for forming a patterned shape from a noble metal, in accordance with the present invention, includes forming a noble metal layer over a dielectric layer and patterning a hard mask layer on the noble metal layer. The hard mask layer includes a mask material that is selectively removable relative to the noble metal layer and the dielectric layer and capable of withstanding plasma etching. Alternately, the hard mask material may be consumable during the noble metal layer plasma etching. Plasma etching is performed on the noble metal layer in accordance with the patterned hard mask layer. The hard mask layer is removed such that a patterned shape formed in the noble metal layer remains intact after the plasma etching and the hard mask removal.
摘要翻译：根据本发明的用于从贵金属形成图案形状的方法包括在电介质层上形成贵金属层并在贵金属层上图形化硬掩模层。硬掩模层包括可相对于贵金属层和电介质层选择性地移除并能耐受等离子体蚀刻的掩模材料。或者，在贵金属层等离子体蚀刻期间，硬掩模材料可能是可消耗的。根据图案化的硬掩模层在贵金属层上进行等离子体蚀刻。去除硬掩模层，使得在等离子体蚀刻和硬掩模去除之后，在贵金属层中形成的图案形状保持完整。

2. 发明授权

US06420272B1 Method for removal of hard mask used to define noble metal electrode 失效
标题翻译：去除用于定义贵金属电极的硬掩模的方法
公开(公告)号：US06420272B1
公开(公告)日：2002-07-16
申请号：US09460700
申请日：1999-12-14
申请人： Hua Shen , David Edward Kotecki , Satish D. Athavale , Jenny Lian , Gerhard Kunkel , Nimal Chaudhary
发明人： Hua Shen , David Edward Kotecki , Satish D. Athavale , Jenny Lian , Gerhard Kunkel , Nimal Chaudhary
IPC分类号： H01L2100
CPC分类号： H01L28/60 , H01L21/02071 , H01L21/31116 , H01L21/32139 , H01L28/55
摘要： In semiconductor dynamic random access memory circuits using stacked capacitor storage elements formed using high permittivity dielectric material, it is typical to form the stacked capacitors using noble metal electrodes. Typically, the etching process for the noble metal electrodes requires the use of a hard mask patterning material such as silicon oxide. Removal of this hard mask frequently results in damage to the dielectric surface surrounding the patterned noble metal electrode. A method of removing the hard mask material without damaging the surrounding surface includes the steps of: depositing a soft mask photoresist material over the composite surface, including the hard masked covered noble metal electrode and the dielectric surface, in a manner such that the soft mask material is thinner over the region of the noble metal electrode; removing the portion of the soft mask material over the noble metal electrode leaving the soft mask material over the dielectric surface; etching the hard mask material with the soft mask material protecting the dielectric surface; and removing the remaining portion of the soft mask material.
摘要翻译：在使用高介电常数电介质材料形成的叠层电容器存储元件的半导体动态随机存取存储器电路中，典型的是使用贵金属电极形成叠层电容器。通常，贵金属电极的蚀刻工艺需要使用诸如氧化硅的硬掩模图形材料。去除这种硬掩模常常导致图案化的贵金属电极周围的电介质表面的损坏。在不损坏周围表面的情况下去除硬掩模材料的方法包括以下步骤：在复合表面上沉积软掩模光致抗蚀剂材料，包括硬掩蔽的贵金属电极和电介质表面，使得软掩模材料在贵金属电极的区域上较薄; 在所述贵金属电极上除去所述软掩模材料的所述部分，从而将所述软掩模材料留在所述电介质表面上; 用保护电介质表面的软掩模材料蚀刻硬掩模材料; 以及去除所述软掩模材料的剩余部分。

3. 发明授权

US06207584B1 High dielectric constant material deposition to achieve high capacitance 有权
标题翻译：高介电常数材料沉积实现高电容
公开(公告)号：US06207584B1
公开(公告)日：2001-03-27
申请号：US09478270
申请日：2000-01-05
申请人： Hua Shen , David E. Kotecki , Robert Laibowitz , Katherine Lynn Saenger , Satish D. Athavale , Jenny Lian , Martin Gutsche , Yun-Yu Wang , Thomas Shaw
发明人： Hua Shen , David E. Kotecki , Robert Laibowitz , Katherine Lynn Saenger , Satish D. Athavale , Jenny Lian , Martin Gutsche , Yun-Yu Wang , Thomas Shaw
IPC分类号： H01L2131
CPC分类号： H01L28/56 , H01L21/31691 , H01L28/90
摘要： A method for forming a dielectric layer includes exposing a surface to a first dielectric material in gaseous form at a first temperature. Nuclei of the first dielectric material are formed on the surface. A layer of a second dielectric material is deposited on the surface by employing the nuclei as seeds for layer growth wherein the depositing is performed at a second temperature which is greater than the first temperature.
摘要翻译：形成电介质层的方法包括在第一温度下将表面暴露于气态的第一电介质材料。在表面上形成第一介电材料的核。通过使用核作为种子用于层生长，在表面上沉积第二介电材料层，其中沉积在大于第一温度的第二温度下进行。

4. 发明授权

US06365328B1 Semiconductor structure and manufacturing method 有权
标题翻译：半导体结构及制造方法
公开(公告)号：US06365328B1
公开(公告)日：2002-04-02
申请号：US09522883
申请日：2000-03-10
申请人： Hua Shen , David Kotecki , Satish Athavale , Jenny Lian , Laertis Economikos , Fen F. Jamin , Gerhard Kunkel , Nirmal Chaudhary
发明人： Hua Shen , David Kotecki , Satish Athavale , Jenny Lian , Laertis Economikos , Fen F. Jamin , Gerhard Kunkel , Nirmal Chaudhary
IPC分类号： G03F700
CPC分类号： H01L21/7687 , H01L21/76885 , H01L27/10852 , H01L28/55 , H01L28/60 , H01L28/75
摘要： A method for forming an electrode. The method includes forming a conductive plug through a first dielectric layer. The plug extends from an upper surface of the first dielectric layer to a contact region in a semiconductor substrate. The electrode is formed photolithographically, misalignment of a mask registration in the photolithography resulting in exposing surface portions of the barrier contact. A second dielectric layer is deposited over the first dielectric layer, over side portions and top portions of the formed electrode, and over the exposed portions of barrier contact. A sacrificial material is provided on portions of the second dielectric layer disposed on lower sides of the, electrode, on portions of the second dielectric layer disposed on the first dielectric layer, and on said exposed portions of the barrier contact while exposing portions of the second dielectric layer on the top portions and upper side portions of the formed electrode. The exposed portions of the second dielectric layer are removed while leaving the portions of the second dielectric layer on the exposed portions of the barrier contact. A material is deposited over exposed portions of the first electrode and over remaining portions of the second dielectric layer in an oxidizing environment. A second electrode is formed for the storage element over the material. In forming a capacitor storage element, the portion of the second dielectric layer on the barrier contact prevents oxidation of the barrier contact during the material formation process.
摘要翻译：一种形成电极的方法。该方法包括通过第一电介质层形成导电插塞。插头从第一电介质层的上表面延伸到半导体衬底中的接触区域。光刻地形成电极，光刻中的掩模配准不对准，导致暴露屏障接触的表面部分。第二电介质层沉积在第一电介质层上，在形成的电极的侧面部分和顶部上方以及屏蔽接触的暴露部分之上。在设置在第一电介质层上的第二电介质层的部分上的第二电介质层的设置在电极的下侧的部分上以及在屏障接触的所述暴露部分上暴露第二电介质层的部分的牺牲材料在形成的电极的顶部和上侧部分上的介电层。第二介电层的暴露部分被去除，同时将第二介电层的部分留在屏障接触的暴露部分上。材料在氧化环境中沉积在第一电极的暴露部分和第二电介质层的剩余部分上。在材料上形成用于存储元件的第二电极。在形成电容器存储元件时，屏障接触部分的第二电介质层在材料形成过程中防止了屏障接触的氧化。

5. 发明授权

US06420267B1 Method for forming an integrated barrier/plug for a stacked capacitor 有权
标题翻译：用于形成叠层电容器的集成屏障/插头的方法
公开(公告)号：US06420267B1
公开(公告)日：2002-07-16
申请号：US09551757
申请日：2000-04-18
申请人： Chenting Lin , Ronald J. Schutz , Andreas Knorr , Keith Wong , Hua Shen , Jenny Lian
发明人： Chenting Lin , Ronald J. Schutz , Andreas Knorr , Keith Wong , Hua Shen , Jenny Lian
IPC分类号： H01L2100
CPC分类号： H01L28/75 , H01L21/28568 , H01L28/55
摘要： A method of forming an integrated barrier/contact for stacked capacitors is provided which results in reduced cost of ownership and in a barrier which is nominally several times thicker than convention structures. The resulting structure results in decreased contact plug resistance as compared with conventional devices.
摘要翻译：提供了一种形成用于层叠电容器的集成屏障/触点的方法，其导致所有权成本降低以及名义上比常规结构厚几倍的屏障。与常规装置相比，所得结构导致接触插头电阻降低。

6. 发明授权

US06339007B1 Capacitor stack structure and method of fabricating description 失效
标题翻译：电容器堆叠结构及其制造方法
公开(公告)号：US06339007B1
公开(公告)日：2002-01-15
申请号：US09562556
申请日：2000-05-02
申请人： Yun-Yu Wang , Rajarao Jammy , Lee J. Kimball , David E. Kotecki , Jenny Lian , Chenting Lin , John A. Miller , Nicholas Nagel , Hua Shen , Horatio S. Wildman
发明人： Yun-Yu Wang , Rajarao Jammy , Lee J. Kimball , David E. Kotecki , Jenny Lian , Chenting Lin , John A. Miller , Nicholas Nagel , Hua Shen , Horatio S. Wildman
IPC分类号： H01L2120
CPC分类号： H01L28/75 , H01L28/55 , H01L28/60
摘要： A capacitor structure that comprises a top platinum electrode and a bottom electrode having insulator on the sidewalls of the electrodes, and wherein the bottom electrode is from depositing a first electrode portion being recessed with respect to the insulator on the sidewalls thereof and depositing a second insulator portion is provided.
摘要翻译：一种电容器结构，其包括顶部铂电极和在电极的侧壁上具有绝缘体的底部电极，并且其中底部电极从沉积相对于绝缘体在其侧壁上凹进的第一电极部分并且沉积第二绝缘体提供部分。

7. 发明授权

US07071506B2 Device for inhibiting hydrogen damage in ferroelectric capacitor devices 失效
标题翻译：用于抑制铁电电容器件中的氢损伤的装置
公开(公告)号：US07071506B2
公开(公告)日：2006-07-04
申请号：US10655757
申请日：2003-09-05
申请人： Bum-Ki Moon , Karl Hornik , Haoren Zhuang , Ulrich Egger , Jenny Lian , Andreas Hilliger
发明人： Bum-Ki Moon , Karl Hornik , Haoren Zhuang , Ulrich Egger , Jenny Lian , Andreas Hilliger
IPC分类号： H01L29/76
CPC分类号： H01L28/57 , H01L27/0805 , H01L27/11507
摘要： A ferroelectric capacitor device comprises a substrate, a contact plug passing through the substrate, a first electrode formed on the substrate, the first electrode being electrically connected to said plug, a ferroelectric layer formed on the first electrode, a second electrode formed on the ferroelectric layer, one or more first encapsulation layers on the second electrode, the encapsulation layers extending over the device, and one or more hydrogen storage material layers on the encapsulation layers. One or more second encapsulation layers may be formed on the one or more hydrogen storage material layers.
摘要翻译：铁电电容器装置包括基板，穿过基板的接触插塞，形成在基板上的第一电极，第一电极电连接到所述插头，形成在第一电极上的铁电层，形成在铁电体上的第二电极层，在第二电极上的一个或多个第一封装层，在器件上延伸的封装层以及封装层上的一个或多个储氢材料层。一个或多个第二封装层可以形成在一个或多个储氢材料层上。

8. 发明授权

US07041551B2 Device and a method for forming a capacitor device 失效
标题翻译：装置及形成电容器装置的方法
公开(公告)号：US07041551B2
公开(公告)日：2006-05-09
申请号：US10677099
申请日：2003-09-30
申请人： Haoren Zhuang , Nicolas Nagel , Jenny Lian , Rainer Bruchhaus
发明人： Haoren Zhuang , Nicolas Nagel , Jenny Lian , Rainer Bruchhaus
IPC分类号： H01L21/8242
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/65 , H01L28/92
摘要： A device and method for forming a capacitor device comprises forming a substrate, forming a first interlayer dielectric layer on the substrate and forming two or more contact plugs through the substrate. A conducting layer is formed on the first interlayer dielectric layer and an electrode is formed on alternate ones of the contact plugs by etching the conducting layer. The etched electrodes are then coated with a ferroelectric layer. The ferroelectric layer is etched from the surfaces separating the contact plugs and additional electrodes are created by filling the spaces between the electrodes on alternate ones of the contact plugs with a conductive material to establish electrical contact between the plugs and the electrodes.
摘要翻译：用于形成电容器器件的器件和方法包括形成衬底，在衬底上形成第一层间电介质层，并通过衬底形成两个或更多个接触插塞。在第一层间电介质层上形成导电层，通过蚀刻导电层，在交替的接触插塞上形成电极。然后用铁电层涂覆蚀刻的电极。从分离接触塞的表面蚀刻铁电层，并且通过用导电材料填充交替的接触插塞上的电极之间的空间来产生附加电极，以建立插塞和电极之间的电接触。

9. 发明授权

US06734057B2 Method of patterning capacitors and capacitors made thereby 失效
标题翻译：图案化电容器和电容器的方法
公开(公告)号：US06734057B2
公开(公告)日：2004-05-11
申请号：US10260229
申请日：2002-09-27
申请人： Jenny Lian , Haoren Zhuang , Ulrich Egger , Karl Hornik
发明人： Jenny Lian , Haoren Zhuang , Ulrich Egger , Karl Hornik
IPC分类号： H01L218242
CPC分类号： H01L28/55 , H01L21/31122
摘要： A method of forming a ferroelectric capacitor, in particular for use in a FeRAM or high-k DRAM application, and a capacitor made by the method. The method comprises forming a first layer which is patterned, for example by a reactive ion etching method. A ferroelectric material is then formed over the patterned first layer. The morphology of the ferroelectric material will be dependent upon the patterning of the first layer. The ferroeletric layer is then patterned, for example using a wet etching or a reactive ion etching method. The etching will depend upon the morphology of the ferroelectric layer. After etching the ferroelectric layer, a conductive layer is provided over the ferroelectric layer to form a first electrode of the capacitor. If the first layer is a conductive layer, this forms the second electrode. If the first layer is a non-conductive layer, the conductive layer is patterned to form both the first and second electrodes.
摘要翻译：形成铁电电容器的方法，特别是用于FeRAM或高k DRAM应用的方法，以及由该方法制成的电容器。该方法包括形成图案化的第一层，例如通过反应离子蚀刻方法。然后在图案化的第一层上形成铁电材料。铁电材料的形态将取决于第一层的图案化。然后将铁素体层图案化，例如使用湿蚀刻或反应离子蚀刻方法。蚀刻将取决于铁电层的形态。在对铁电体层进行蚀刻之后，在铁电层上设置导电层，形成电容器的第一电极。如果第一层是导电层，则形成第二电极。如果第一层是非导电层，则导电层被图案化以形成第一和第二电极。

10. 发明授权

US07002196B2 Ferroelectric capacitor devices and FeRAM devices 失效
标题翻译：铁电电容器件和FeRAM器件
公开(公告)号：US07002196B2
公开(公告)日：2006-02-21
申请号：US10713239
申请日：2003-11-13
申请人： Andreas Hilliger , Jenny Lian
发明人： Andreas Hilliger , Jenny Lian
IPC分类号： H01L29/76
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/57 , H01L28/65
摘要： A ferroelectric capacitor device, such as an FeRAM device is formed of a substrate having one or more contact plugs extending therethrough, and a first interlayer dielectric layer formed on the substrate. A spacer layer is formed on the first interlayer dielectric layer, a first oxygen barrier layer is formed on the spacer layer and a buffer layer is formed on the first oxygen barrier layer. A layer of liner material is formed on the buffer layer between the buffer layer and the contact plugs and a dielectric layer is sandwiched between a first electrode and a second electrode. A second oxygen barrier layer is applied to the device. The spacer layer should prevent any oxidation from reaching the interface between the liner material and the contact plugs as this interface is located beneath the first oxygen barrier layer. As a result, the electrical contact is not damaged.
摘要翻译：诸如FeRAM器件的铁电电容器器件由具有延伸穿过其中的一个或多个接触插塞的衬底和形成在衬底上的第一层间电介质层形成。在第一层间电介质层上形成间隔层，在间隔层上形成第一氧阻隔层，在第一氧阻隔层上形成缓冲层。在缓冲层和接触塞之间的缓冲层上形成一层衬垫材料，并且介电层夹在第一电极和第二电极之间。将第二氧阻挡层施加到该装置。当该界面位于第一氧阻隔层下方时，间隔层应防止任何氧化到达衬垫材料和接触塞之间的界面。因此，电气接触不会损坏。

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