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1. 发明申请

WO2018217269A1 THREE-LEVEL FERROELECTRIC MEMORY CELL USING BAND ALIGNMENT ENGINEERING 审中-公开
公开(公告)号：WO2018217269A1
公开(公告)日：2018-11-29
申请号：PCT/US2018/021046
申请日：2018-03-06
申请人： SANDISK TECHNOLOGIES LLC
发明人： CHEN, Yangyin , PETTI, Christopher J
IPC分类号： H01L27/11502 , H01L29/51 , H01L29/66 , H01L29/78
CPC分类号： H01L29/78391 , G11C11/22 , G11C11/2275 , H01L27/11514 , H01L27/11597 , H01L28/55 , H01L28/65 , H01L29/516 , H01L29/6684
摘要： A non-volatile memory cell stores 1.5 bits of data in three polarization states. The memory cell may have two ferroelectric layers and three electrodes. The energy bands of the ferroelectric layers are adjusted by providing two of the electrodes with different work functions. The difference in the work functions may be significant, such as at least 0.4-0.6 V or more. Two of the electrodes may have equal or similar work functions. For example, the work functions may be equal within a tolerance of +/- 0.1 V. The memory cell can be arranged in various configurations including a FeFET (ferroelectric field effect transistor) and a FeRAM (ferroelectric random access memory). A set of memory cells can be arranged in a string such as a NAND string.

2. 发明申请

WO2018125491A1 NON-DESTRUCTIVE FERROELECTRIC MEMORY CELL 审中-公开
公开(公告)号：WO2018125491A1
公开(公告)日：2018-07-05
申请号：PCT/US2017/063716
申请日：2017-11-29
申请人： AUCMOS TECHNOLOGIES USA, INC. , YAN, Tianhong
发明人： YAN, Tianhong
IPC分类号： G11C14/00
CPC分类号： G11C14/0072 , G11C11/22 , G11C11/221
摘要： A FeSRAM cell includes (a) first and second inverters between a power supply voltage and a ground reference cross-coupled to each other, the first and second cross-coupled inverters providing first and second data terminals; (b) first and second select transistors respectively coupled to the first and second data terminals to control access to the first second data terminals; and (c) first and second ferroelectric capacitors coupled between a first plate line and respectively the first and second data terminals, the first plate line receiving a negative programming voltage having a magnitude greater than the power supply voltage to allow programming one of the first and second ferroelectric capacitors into a first non-volatile programmed state.

3. 发明申请

WO2017086399A1 不揮発性メモリ素子、不揮発性メモリおよび不揮発性メモリの制御方法审中-公开
标题翻译：非易失性存储器件，非易失性存储器和用于非易失性存储器的控制方法
公开(公告)号：WO2017086399A1
公开(公告)日：2017-05-26
申请号：PCT/JP2016/084156
申请日：2016-11-17
申请人：国立大学法人東京大学 , 国立研究開発法人産業技術総合研究所 , 学校法人上智学院
发明人：徳永　将史 , 河智　史朗 , 伊藤　利充 , 黒江　晴彦
IPC分类号： H01L27/105 , G11C11/22 , H01L45/00 , H01L49/00
CPC分类号： G11C11/22 , H01L27/105 , H01L45/00 , H01L49/00
摘要：電極層２４，２６を、ビスマスフェライト層２２を形成するビスマスフェライトの結晶のｃ軸と垂直な方向からビスマスフェライト層２２を挟むように配置して、ビスマスフェライト層２２に接続する。そして、電極層２４，２６との間に電圧を印加して、ビスマスフェライトの結晶のｃ軸と垂直な方向の電場をビスマスフェライト層２２に印加する。これにより、データを書き込むことができ、消費電力の低い不揮発性メモリを提供することができる。
摘要翻译：被
电极层24，设置在从c轴垂直于铁酸铋的形成铁酸铋层22以夹着所述铁酸铋层22晶体的方向，铁酸铋层22 连接。然后，将电压施加在电极层24和26之间施加电压，垂直于铁酸铋的结晶铁酸铋层22的方向上施加的c轴的电场。结果，可以写入数据，并且可以提供具有低功耗的非易失性存储器。

4. 发明申请

WO2017040053A1 METHODS OF OPERATING FERROELECTRIC MEMORY CELLS, AND RELATED FERROELECTRIC MEMORY CELLS 审中-公开
标题翻译：操作电磁记忆细胞的方法和相关的电磁记忆细胞
公开(公告)号：WO2017040053A1
公开(公告)日：2017-03-09
申请号：PCT/US2016/047584
申请日：2016-08-18
申请人： MICRON TECHNOLOGY, INC.
发明人： NICHOLES, Steven C. , CHAVAN, Ashonita A. , ROCKLEIN, Matthew N.
IPC分类号： G11C11/22 , H01L27/115
CPC分类号： G11C11/225 , G11C11/22 , G11C11/221 , G11C11/2273 , G11C11/2275 , G11C11/2297 , G11C11/5657 , G11C13/047 , G11C14/00 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/56 , H01L28/65 , H01L28/75
摘要： Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.
摘要翻译：操作铁电存储单元的方法。该方法包括将正偏置电压和负偏置电压中的一个施加到包括上电极，底电极，顶电极和底电极之间的铁电材料的电容器和铁电存储单元之间的界面材料的铁电存储单元，铁电材料和顶电极和底电极之一。该方法还包括将另一个正偏置电压和负偏置电压施加到铁电存储单元以切换铁电存储单元的极化，其中负偏置电压的绝对值与正偏压的绝对值不同电压。还描述了铁电存储器单元。

5. 发明申请

WO2016124645A1 METHOD FOR FERROELECTRIC POLARIZATION SWITCHING USING POLARIZED LIGHT 审中-公开
标题翻译：使用偏振光的电磁极化开关方法
公开(公告)号：WO2016124645A1
公开(公告)日：2016-08-11
申请号：PCT/EP2016/052288
申请日：2016-02-03
申请人： CONSEJO SUPERIOR DE INVESTIGACIONES CIENTÍFICAS
发明人： FERNÁNDEZ LOZANO, José Francisco , DEL CAMPO GARCIA, Adolfo , RUBIO MARCOS, Fernando
IPC分类号： G11C11/22 , G11C13/04 , G11B9/02
CPC分类号： G11C11/22 , G11B9/02 , G11C11/2275 , G11C13/04 , G11C13/048
摘要： The present invention refers to a method for switching the polarization of a ferroelectric material by applying a polarized coherent light at a light polarization angle θ, and while the polarized coherent light is being applied, varying said light polarization angle θ. Additionally, the invention is directed to a method for writing data in a data storage device comprising switching the polarization of a ferroelectric material according to the method of the invention and to a data storage device comprising a ferroelectric material wherein the stored data is written by switching the polarization of the ferroelectric material according to the method of the invention.
摘要翻译：本发明涉及一种通过以偏振角θ施加极化相干光并且在施加偏振相干光的同时改变所述光偏振角θ来切换铁电体的偏振的方法。另外，本发明涉及一种在数据存储装置中写入数据的方法，包括：根据本发明的方法切换铁电材料的极化，并将该数据存储装置包括铁电材料，其中存储的数据通过切换根据本发明的方法的铁电材料的极化。

6. 发明申请

WO2016099515A1 MAGNETO-ELECTRIC DEVICES AND INTERCONNECT 审中-公开
标题翻译： MAGNETO电气设备和互连
公开(公告)号：WO2016099515A1
公开(公告)日：2016-06-23
申请号：PCT/US2014/071215
申请日：2014-12-18
申请人： INTEL CORPORATION
发明人： NIKONOV, Dmitri E. , MANIPATRUNI, Sasikanth , YOUNG, Ian A.
IPC分类号： H01L43/08 , G11C11/15
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1675 , G11C11/22 , G11C21/00 , H01L41/12 , H01L43/10 , H03K19/20 , H03K19/23
摘要： Described is an interconnect which comprises: a first end having a ferromagnetic layer coupled to a first magnetoelectric material layer; and a second end having a second magnetoelectric material layer coupled to the ferromagnetic layer, wherein the ferromagnetic layer extends from the first end to the second end. Described is a majority gate device which comprises: a ferromagnetic layer; and first, second, third, and fourth magnetoelectric material layers coupled to the ferromagnetic layer. Described is an apparatus which comprises: a first end having a ferromagnetic layer coupled to a first magnetoelectric material layer; and a second end having a tunnel junction device coupled to the ferromagnetic layer. Described is an apparatus which comprises: a first terminal coupled to a tunneling junction device; a second terminal coupled to a layer coupling the tunneling junction device and a magnetoelectric device; and a third terminal coupled to the magnetoelectric device.
摘要翻译：描述的是互连，其包括：具有耦合到第一磁电材料层的铁磁层的第一端; 以及具有耦合到所述铁磁层的第二磁电材料层的第二端，其中所述铁磁层从所述第一端延伸到所述第二端。描述的是多数门装置，其包括：铁磁层; 以及耦合到铁磁层的第一，第二，第三和第四磁电材料层。描述了一种装置，其包括：具有耦合到第一磁电材料层的铁磁层的第一端; 以及具有耦合到铁磁层的隧道结装置的第二端。描述了一种装置，其包括：耦合到隧道连接装置的第一端子; 耦合到耦合所述隧道连接装置的层和磁电装置的第二端子; 以及耦合到所述磁电装置的第三端子。

7. 发明申请

WO2013147755A1 NONVOLATILE MEMORY BANK GROUPS 审中-公开
标题翻译：非易失存储器银行组
公开(公告)号：WO2013147755A1
公开(公告)日：2013-10-03
申请号：PCT/US2012/030772
申请日：2012-03-27
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , BENEDICT, Melvin K.
发明人： BENEDICT, Melvin K.
IPC分类号： G11C16/06
CPC分类号： G06F12/0246 , G06F2212/7201 , G11C11/1653 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/22 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0023 , G11C13/004 , G11C13/0061 , G11C13/0069 , G11C16/08 , G11C16/10 , G11C16/26 , G11C2013/0088 , G11C2207/2272
摘要： A nonvolatile memory (10) is partitioned into bank groups (24) based upon a write-to-read latency of the nonvolatile memory (10).
摘要翻译：基于非易失性存储器（10）的写入 - 读取等待时间，非易失性存储器（10）被划分为存储体组（24）。

8. 发明申请

WO2013048347A1 GRAPHENE FERROELECTRIC DEVICE AND OPTO-ELECTRONIC CONTROL OF GRAPHENE FERROELECTRIC MEMORY DEVICE 审中-公开
标题翻译：石墨电子设备的石墨电子设备和光电子控制
公开(公告)号：WO2013048347A1
公开(公告)日：2013-04-04
申请号：PCT/SG2012/000366
申请日：2012-10-01
申请人： NATIONAL UNIVERSITY OF SINGAPORE
发明人： OZYILMAZ, Barbaros , KAHYA, Orhan , TOH, Chee Tat , JAISWAL, Manu , SAHA, Surajit
IPC分类号： H01L29/772 , H01L29/16 , B82Y10/00 , G11B7/241 , G11B9/02 , G11C11/22 , G11C11/56 , G11C13/02
CPC分类号： G11C11/223 , B82Y10/00 , B82Y20/00 , G11B7/241 , G11B9/02 , G11C11/22 , G11C13/0002 , G11C13/04 , G11C2213/35 , G11C2213/53 , H01L29/1606 , H01L29/516 , H01L29/778 , H01L43/02
摘要： In accordance with an embodiment of the invention, there is provided a graphene ferroelectric device. The device comprises a graphene transistor channel and a ferroelectric gate of the graphene transistor channel, the ferroelectric gate comprising a linear polarization at a first applied gate voltage less than a threshold voltage, and a hysteretic polarization at a second applied gate voltage greater than the threshold voltage. The device may be configured to undergo optical switching of the graphene transistor channel between a high resistance state and a low resistance state in response to photoillumination of the device.
摘要翻译：根据本发明的实施例，提供了一种石墨烯铁电体器件。该器件包括石墨烯晶体管沟道和石墨烯晶体管沟道的铁电栅极，铁电栅极包括在小于阈值电压的第一施加栅极电压处的线性极化，以及在大于阈值的第二施加栅极电压处的滞后极化电压。该器件可以被配置为响应于器件的光照而在高电阻状态和低电阻状态之间进行石墨烯晶体管沟道的光学切换。

9. 发明申请

WO2013000501A1 SHORT CIRCUIT REDUCTION IN A FERROELECTRIC MEMORY CELL COMPRISING A STACK OF LAYERS ARRANGED ON A FLEXIBLE SUBSTRATE 审中-公开
标题翻译：在包含安装在柔性基板上的层叠的电介质存储单元中的短路电路减少
公开(公告)号：WO2013000501A1
公开(公告)日：2013-01-03
申请号：PCT/EP2011/060740
申请日：2011-06-27
申请人： THIN FILM ELECTRONICS ASA , KARLSSON, Christer , HAGEL, Olle Jonny , NILSSON, Jakob , BRÖMS, Per
发明人： KARLSSON, Christer , HAGEL, Olle Jonny , NILSSON, Jakob , BRÖMS, Per
IPC分类号： G11B9/02 , H01L27/28 , H01L27/115 , G11C13/00 , G11C11/56
CPC分类号： H01L27/11507 , G11B9/02 , G11C11/161 , G11C11/22 , H01L23/562 , H01L27/0248 , H01L27/11502 , H01L27/1203 , H01L28/40 , H01L28/55 , H01L28/75 , H01L43/02 , H01L43/12 , H01L51/0591 , H01L2924/0002 , H01L2924/00
摘要： A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). The ferroelectric memory cell comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one ferroelectric memory material layer (7) between said electrodes. The stack further comprises a buffer layer (13) arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.
摘要翻译：铁电存储器单元（1）和包括一个或多个这样的单元（1）的存储器件（100）。铁电存储单元包括布置在柔性基板（3）上的层叠层（4）。所述堆叠包括电活性部分（4a）和保护层（11），用于保护电活性部分免受划伤和磨损。所述电活性部分包括底电极层（5）和顶电极层（9）和在所述电极之间的至少一个铁电存储材料层（7）。该堆叠还包括布置在顶部电极层（9）和保护层（11）之间的缓冲层（13）。缓冲层（13）适于至少部分地吸收出现在保护层（11）中的横向尺寸变化（ΔL），从而防止所述尺寸变化（ΔL）转移到电活性部分（4a）从而降低电极之间发生短路的风险。

10. 发明申请

WO2011091709A1 铁电阻变存储器及其操作方法、制备方法审中-公开
公开(公告)号：WO2011091709A1
公开(公告)日：2011-08-04
申请号：PCT/CN2011/000050
申请日：2011-01-12
申请人：复旦大学 , 江安全 , 刘骁兵
发明人：江安全 , 刘骁兵
IPC分类号： H01L27/24 , H01L45/00 , H01L21/8247 , G11C13/00
CPC分类号： G11C11/22 , G11C13/0007 , G11C13/003 , G11C2013/0073 , G11C2213/72 , G11C2213/73 , H01L28/55 , H01L45/04 , H01L45/147 , H01L45/1625

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