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    • 1. 发明申请
    • METHOD OF PRODUCING A SUBSTRATE FOR AN OPTOELECTRONIC APPLICATION
    • 生产用于光电子应用的基板的方法
    • WO2006074933A1
    • 2006-07-20
    • PCT/EP2006/000230
    • 2006-01-12
    • S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.LETERTRE, FabriceFAURE, Bruce
    • LETERTRE, FabriceFAURE, Bruce
    • H01L21/20H01L33/00
    • H01L31/1892H01L21/2007H01L21/76254H01L33/0079Y02E10/50
    • The present invention relates to a method of producing a substrate for an optoelectronic application, the substrate having at least one active nitride layer on a final carrier and a metallic intermediate layer therebetween, wherein the method comprises: preparation of an auxiliary substrate wherein one semi-conducting nitride layer is placed on an auxiliary carrier; metallising the auxiliary substrate on the side of the nitride layer; bonding of the metallised carrier substrate with the final carrier; and removing of the auxiliary carrier after the bonding step. It is the object of the present invention to provide a method of this type in which the crystalline quality of the active nitride layer(s) can be improved. The object is solved by a method of the above mentioned type wherein the step of preparing the auxiliary substrate comprises: detaching a part from a massive semi-conducting nitride substrate; and transferring said part onto the auxiliary carrier to form the semi-conducting nitride layer thereon.
    • 本发明涉及一种制备光电子应用基片的方法,该基底在最终载体上具有至少一个活性氮化物层和其间的金属中间层,其中所述方法包括:制备辅助基底,其中, 导电氮化物层放置在辅助载体上; 在氮化物层的侧面对辅助衬底进行金属化; 金属化载体基板与最终载体的接合; 以及在接合步骤之后去除辅助载体。 本发明的目的是提供一种可以提高活性氮化物层的结晶质量的方法。 该目的通过上述类型的方法来解决,其中准备辅助衬底的步骤包括:从块状半导体氮化物衬底分离一部分; 并将所述部分转移到辅助载体上以在其上形成半导电氮化物层。
    • 8. 发明申请
    • A METHOD OF FABRICATING AN EPITAXIALLY GROWN LAYER
    • 一种制造外观成层的方法
    • WO2005014896A1
    • 2005-02-17
    • PCT/EP2004/007578
    • 2004-07-07
    • S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIESLETERTRE, FabriceFAURE, Bruce
    • LETERTRE, FabriceFAURE, Bruce
    • C30B25/02
    • H01L21/76254C30B25/18C30B33/00Y10S438/928Y10S438/977
    • The invention concerns a method of fabricating an epitaxially grown layer (6), an epitaxy support (9,9') and its method of fabricating. This method is remarkable in that it comprises the following steps consisting in : a) implanting atomic species within a support substrate (1) to define therein a zone of weakness which demarcates a thin support layer (13) from the remainder (11) of said substrate ; b) transferring onto said thin layer (13) a thin nucleation layer (23) ; c) detaching said remainder (11) along said zone of weakness, but while maintaining the thin support layer (13) in contact with said remainder (11) ; d) growing said epitaxially grown layer (6) by epitaxy on said nucleation layer (23); and e) moving away the remainder (11) from the thin support layer (13). Application to the field of optics, opto-electronics, or electronics.
    • 本发明涉及制造外延生长层(6),外延支撑(9,9')及其制造方法的方法。 该方法是显着的,其包括以下步骤,其包括:a)在支撑衬底(1)内植入原子物质以在其中限定弱化区域,其将薄支撑层(13)与所述 基质 ; b)将薄的成核层(23)转移到所述薄层(13)上。 c)沿着所述弱化区域分离所述剩余部分(11),同时保持所述薄支撑层(13)与所述剩余部分(11)接触; d)通过所述成核层(23)上的外延生长所述外延生长层(6)。 以及e)从所述薄支撑层(13)移开剩余部分(11)。 应用于光学,光电子学或电子学领域。
    • 9. 发明申请
    • PASSIVATION OF ETCHED SEMICONDUCTOR STRUCTURES
    • WO2010015301A8
    • 2010-02-11
    • PCT/EP2009/004791
    • 2009-07-02
    • S.O.I. TEC SILICON ON ISULATOR TECHNOLOGIESFAURE, BruceGUENARD, Pascal
    • FAURE, BruceGUENARD, Pascal
    • H01L21/762H01L21/324H01L21/20
    • The present invention relates to a method for passivation of a semiconductor structure, comprising the steps providing at least one first material layer; forming at least one second material layer that is to be patterned above the first material layer; forming a diffusion barrier layer between the at least one second material layer and the at least one first material layer thereby forming a multilayer stack and patterning, in particular, etching, the at least one second material layer down to but not completely through the diffusion barrier layer and without exposing portions of the at least one first material layer such that diffusion of material of the at least one first material layer through the diffusion barrier layer during a subsequent heat treatment of the multilayer stack is substantially prevented. The invention also relates to a method for passivation of a semiconductor structure, comprising the steps providing a multilayer stack comprising at least one buried layer formed below a second material layer; patterning, in particular, etching, the surface of the multilayer stack through the second material layer thereby exposing portions of the at least one buried layer and depositing a diffusion barrier layer at least on the exposed portions of the at least one buried layer such that diffusion of material of the at least one buried layer through the diffusion barrier layer during a subsequent heat treatment of the multilayer stack is substantially prevented.