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1. 发明申请

WO2007119208A3 DOHERTY AMPLIFIER 审中-公开
标题翻译： DOHERTY放大器
公开(公告)号：WO2007119208A3
公开(公告)日：2007-12-27
申请号：PCT/IB2007051305
申请日：2007-04-11
申请人： KONINKL PHILIPS ELECTRONICS NV , BLEDNOV IGOR
发明人： BLEDNOV IGOR
IPC分类号： H03F1/07
CPC分类号： H03F3/195 , H03F1/0288 , H03F2200/225 , H03F2200/391
摘要： An integrated Doherty amplifier structure comprises an input bond pad (IBP), and an output bond pad (OBP). A first transistor (T1) forms the peak amplifier stage of the Doherty amplifier and has a control input (G1) to receive a first input signal (ISl) being an input signal of the Doherty amplifier, and has an output (Dl) to supply an amplified first input signal (OS1) at an output of the Doherty amplifier. A second transistor (T2) forms a main amplifier stage of the Doherty amplifier and has a control input (G2) to receive a second input signal (IS2) and has an output (D2) to supply an amplified second input signal (0S2). The first input signal (ISl) and the second input signal (IS2) have a 90° phase offset. A first bond wire (BW1) forms a first inductance (L1), and extends in a first direction, and is arranged between the input bond pad (IBP) and the control input (G1) of the first transistor (T1). A second bond wire (B W2) forms a second inductance (L2), and extends in the first direction, and is arranged between the output bond pad (OBP) and the output (D1) of the first transistor (T1). A third bond wire (B W3) forms a third inductance (L3) and extends in a second direction substantially perpendicular to the first direction, and is arranged between the output (D1) of the first transistor (T1) and the output (D2) of the second transistor (T2).
摘要翻译：集成的Doherty放大器结构包括输入接合焊盘（IBP）和输出接合焊盘（OBP）。第一晶体管（T1）形成Doherty放大器的峰值放大器级，并具有控制输入（G1），以接收作为Doherty放大器的输入信号的第一输入信号（IS1），并具有输出（D1）在Doherty放大器的输出处的放大的第一输入信号（OS1）。第二晶体管（T2）形成Doherty放大器的主放大器级，并具有用于接收第二输入信号（IS2）的控制输入（G2），并且具有用于提供放大的第二输入信号（0S2）的输出（D2）。第一输入信号（IS1）和第二输入信号（IS2）具有90°相位偏移。第一接合线（BW1）形成第一电感（L1），并且沿第一方向延伸，并且布置在第一晶体管（T1）的输入接合焊盘（IBP）和控制输入端（G1）之间。第二接合线（B W2）形成第二电感（L2），并且在第一方向上延伸，并且布置在第一晶体管（T1）的输出接合焊盘（OBP）和输出（D1）之间。第三接合线（B W3）形成第三电感（L3）并且在基本上垂直于第一方向的第二方向上延伸，并且布置在第一晶体管（T1）的输出（D1）和输出（D2）之间，的第二晶体管（T2）。

2. 发明申请

WO2006123289A3 INTEGRATED DOHERTY TYPE AMPLIFIER ARRANGEMENT WITH HIGH POWER EFFICIENCY 审中-公开
标题翻译：集成式DOHERTY型放大器布置，具有高功率效率
公开(公告)号：WO2006123289A3
公开(公告)日：2007-02-15
申请号：PCT/IB2006051535
申请日：2006-05-16
申请人： KONINKL PHILIPS ELECTRONICS NV , BLEDNOV IGOR
发明人： BLEDNOV IGOR
IPC分类号： H03F1/02 , H03F1/56 , H03F3/195
CPC分类号： H03F3/195 , H01L2224/48091 , H01L2224/4813 , H03F1/0288 , H03F1/565 , H03F2200/192 , H03F2200/198 , H03F2200/225 , H01L2924/00014
摘要： The present invention relates to an integrated Doherty type amplifier arrangement and an amplifying method for such an arrangement, wherein a lumped element hybrid power divider (12) is provided for splitting input signals of main and peak amplifier stages (20, 30, 40) at predetermined phase shifts and non-equal division rates and at least one wideband lumped element artificial line (Zl, Z2) combined with wideband compensation circuit for receiving said first amplified signal and for applying said predetermined phase shift to said first amplified signal and its higher harmonics. Thereby, the low gain of the peak amplifier is compensated by providing the non-equal power splitting at the input. Moreover, the use of the lumped element hybrid power divider leads to an improved isolation between the input ports of the main and peak amplifiers decreasing final distortions of the output signal.
摘要翻译：本发明涉及一种用于这种布置的集成Doherty型放大器装置和放大方法，其中提供了集总元件混合功率分配器（12），用于将主放大器级（20,30,40）的输入信号分离在与宽带补偿电路组合的至少一个宽带集总元件人造线路（Z1，Z2），用于接收所述第一放大信号并将所述预定相移应用于所述第一放大信号及其高次谐波。因此，通过在输入端提供不相等的功率分配来补偿峰值放大器的低增益。此外，集总元件混合功率分配器的使用导致主和峰值放大器的输入端口之间的改进的隔离减小了输出信号的最终失真。

3. 发明申请

WO2007122586A2 A HIGH POWER INTEGRATED RF AMPLIFIER 审中-公开
标题翻译：高功率集成射频放大器
公开(公告)号：WO2007122586A2
公开(公告)日：2007-11-01
申请号：PCT/IB2007051492
申请日：2007-04-24
申请人： KONINKL PHILIPS ELECTRONICS NV , BLEDNOV IGOR
发明人： BLEDNOV IGOR
CPC分类号： H03F3/195 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2223/6644 , H01L2223/6655 , H01L2224/48137 , H01L2224/4911 , H01L2224/49175 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01031 , H01L2924/01033 , H01L2924/01055 , H01L2924/01068 , H01L2924/01072 , H01L2924/01074 , H01L2924/01076 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H03F1/0288 , H03F1/565 , H03F2200/222 , H03F2200/387 , H03F2200/451 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
摘要： An integrated HF-amplifÊer structure comprises in a first direction (FD) in the order mentioned: an input bond pad (IBP), a plurality of cells (CE1, CE2) being displaced with respect to each other in the first direction (FD), and an output bond pad (OBP). Each one of the cells (CE1, CE2) comprises an amplifier having an input pad (GP1, GP2), an active area (A1, A2), and an output pad (DP1, DP2). The active area (A1, A2) is arranged in- between the input pad (GP1, GP2) and the output pad (DP1, DP2), and the input pad (GP1, GP2), the active area (A1, A2), and the output pad (DP1, DP2) are displaced with respect to each other in a second direction (SD) substantially perpendicular to the first direction (FD). A first network (Nl) comprises first interconnecting means (Li, Ci; Li1, Li2, Ci1) to interconnect input pads (GP1, GP2) of adjacent ones of the plurality of cells (CE1, CE2), and extends in the first direction (FD). A second network (N2) comprises second interconnecting means (Lo, Co; Lo1, Lo2, Co1) to interconnect output pads (DPI, DP2) of adjacent ones of the plurality of cells (CE1, CE2), and extends in the first direction (FD). The first network (Nl) and the second network (N2) are constructed for obtaining an output signal (OS) at the output bond pad (OBP) having for all the interconnected cells (CE1, CE2) an equal phase shift and amplitude for a same input signal (IS) at the input bond pad (IBP). At particular bias and phase shift conditions the structure provides a Doherty amplifier with improvement of efficiency at power back off.
摘要翻译：集成的HF放大器结构包括按照所述顺序的第一方向（FD）：输入接合焊盘（IBP），多个单元（CE1，CE2）在第一方向（FD）上相对于彼此移位，和输出接合焊盘（OBP）。单元（CE1，CE2）中的每一个包括具有输入焊盘（GP1，GP2），有效区域（A1，A2）和输出焊盘（DP1，DP2）的放大器。有源区域（A1，A2）布置在输入焊盘（GP1，GP2）和输出焊盘（DP1，DP2）之间，输入焊盘（GP1，GP2），有效区域（A1，A2）并且输出焊盘（DP1，DP2）在基本上垂直于第一方向（FD）的第二方向（SD）上相对于彼此移位。第一网络（N1）包括互连多个单元（CE1，CE2）中的相邻单元（CE1，CE2）的输入焊盘（GP1，GP2）的第一互连装置（Li，Ci; Li1，Li2，Ci1），并且在第一方向（FD）。第二网络（N2）包括第二互连装置（Lo，Co; Lo1，Lo2，Co1），以互连多个小区（CE1，CE2）中的相邻小区的输出焊盘（DPI，DP2），并沿第一方向（FD）。第一网络（N1）和第二网络（N2）被构造用于在具有用于所有互连的小区（CE1，CE2）的输出接合焊盘（OBP）处获得相等相移和幅度的输出信号（OS）在输入接合焊盘（IBP）处的相同输入信号（IS）。在特定的偏置和相移条件下，该结构为Doherty放大器提供了功率回退时的效率提高。

4. 发明申请

WO2006097893A3 METHOD AND SYSTEM FOR OUTPUT MATCHING OF RF TRANSISTORS 审中-公开
标题翻译：射频晶体管输出匹配的方法与系统
公开(公告)号：WO2006097893A3
公开(公告)日：2007-03-29
申请号：PCT/IB2006050791
申请日：2006-03-14
申请人： KONINKL PHILIPS ELECTRONICS NV , BLEDNOV IGOR
发明人： BLEDNOV IGOR
IPC分类号： H01L23/66
CPC分类号： H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2223/6644 , H01L2224/45015 , H01L2224/48011 , H01L2224/48091 , H01L2224/4813 , H01L2224/48137 , H01L2224/48247 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01055 , H01L2924/01061 , H01L2924/01074 , H01L2924/01082 , H01L2924/10329 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/19041 , H01L2924/19043 , H01L2924/19051 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , Y10T29/49018 , H01L2924/00 , H01L2224/45099 , H01L2924/207 , H01L2924/20753
摘要： A high frequency power device (100) is described comprising a high frequency power transistor (102) having a first main electrode, a second main electrode acting as output electrode and a control electrode, and an output compensation circuit (104) for compensating parasitic output capacitance of the transistor (102). The output compensation circuit is physically positioned relative to the transistor such that a shorter bond wire between the output electrode of the transistor and an output lead of the high frequency power device is obtained. The output compensation circuit (104) therefore is physically located in between an input lead (108) of the high frequency power device (100) and the transistor (102). The inductance introduced by the bond wire Lcomp from the output compensation circuit (104) to the output electrode of the transistor (102) can be used as a feedback signal. Selection of the mutual inductive coupling between the bond wire LcOmP and a bond wire connected to the pre-matching circuit (106) allows to further optimize the properties of the high frequency power device.
摘要翻译：一种高频功率器件（100）被描述为包括具有第一主电极，作为输出电极的第二主电极和控制电极的高频功率晶体管（102）和用于补偿寄生输出的输出补偿电路（104）晶体管（102）的电容。输出补偿电路相对于晶体管物理定位，使得在晶体管的输出电极和高频功率器件的输出引线之间获得较短的接合线。因此，输出补偿电路（104）物理地位于高频功率器件（100）的输入引线（108）和晶体管（102）之间。由接合线Lcomp从输出补偿电路（104）引入到晶体管（102）的输出电极的电感可以用作反馈信号。选择接合线LcOmP和连接到预匹配电路（106）的接合线之间的互感耦合允许进一步优化高频功率器件的特性。

5. 发明申请

WO2009027916A3 INTEGRATED DOHERTY AMPLIFIER 审中-公开
标题翻译：集成DOHERTY放大器
公开(公告)号：WO2009027916A3
公开(公告)日：2009-04-30
申请号：PCT/IB2008053382
申请日：2008-08-22
申请人： NXP BV , BLEDNOV IGOR
发明人： BLEDNOV IGOR
IPC分类号： H03F1/02 , H03F1/07
CPC分类号： H03F1/0288 , H01L2224/48137 , H03F3/195
摘要： The invention relates to an integrated Doherty amplifier with an input network connecting the input to the main stage and to the peak stage, and with an output network connecting the main stage and the peak stage to the output. The output network has a shunt capacitor to signal-ground in parallel to a parasitic capacitance of the main stage, and has a shunt inductor between the main stage and signal ground. The shunt configuration enables to use the MMIC Doherty amplifier in a wide frequency range. At least some of the inductors of the input network and/or output network are implemented using bond wires. Their orientations and locations provide minimal mutual electromagnetic coupling between the wires and the return RF current paths.
摘要翻译：本发明涉及一种集成的Doherty放大器，其输入网络将输入连接到主级和峰值级，并且将主级和峰值级的输出网络连接到输出。输出网络具有并联电容器，并联到主级的寄生电容，并且在主级和信号地之间具有并联电感器。分流配置可以在宽频率范围内使用MMIC Doherty放大器。输入网络和/或输出网络的至少一些电感器使用接合线实现。它们的取向和位置在导线和返回RF电流路径之间提供最小的相互电磁耦合。

6. 发明申请

WO2014068351A3 AMPLIFICATION STAGE AND WIDEBAND POWER AMPLIFIER 审中-公开
标题翻译：放大级和宽带功率放大器
公开(公告)号：WO2014068351A3
公开(公告)日：2015-03-12
申请号：PCT/IB2012002652
申请日：2012-10-31
申请人： FREESCALE SEMICONDUCTOR INC , BLEDNOV IGOR
发明人： BLEDNOV IGOR
IPC分类号： H03F1/07 , H03F3/60 , H03F3/68
CPC分类号： H03F1/42 , H03F1/0288 , H03F3/195 , H03F3/211 , H03F3/24 , H03F3/245 , H03F3/602 , H03F3/604 , H03F2203/21106 , H03F2203/21142
摘要： An amplification stage (100) and a wideband power amplifier are provided. The amplification stage (100) comprises a stage input terminal (102), a stage output terminal (110), an amplifier (106), an input compensation network (103), and in output compensation network (109). At the stage input terminal (102) is received a signal which is provided via the input compensation network (103) to the amplifier (106). The input compensation network (103) filters the signal to allow a wideband operation of the amplification stage around an operational frequency. The amplified signal provided by the amplifier (106) is provided via the output compensation network (109) to the stage output terminal (110). The output compensation network (109) match output of power device to the output terminal to allow a wideband operation of the amplification stage (100) around the operational frequency with a minimal phase shift and distortion of amplitude and phase frequency response. The wideband power amplifier comprises a plurality of amplification stage combined with transmission lines or their lumped element equivalents in a specific circuit topology.
摘要翻译：提供了放大级（100）和宽带功率放大器。放大级（100）包括级输入端（102），级输出端（110），放大器（106），输入补偿网（103）和输出补偿网（109）。在阶段输入端（102）接收经由输入补偿网络（103）提供给放大器（106）的信号。输入补偿网络（103）对该信号进行滤波以允许放大级周围的工作频率的宽带操作。由放大器（106）提供的放大信号通过输出补偿网络（109）提供给级输出端（110）。输出补偿网络（109）将功率器件的输出与输出端匹配，以允许放大级（100）在工作频率周围进行宽带工作，具有最小的相移和幅度和相位频率响应的失真。宽带功率放大器包括与特定电路拓扑中的传输线或其集总元件等效物组合的多个放大级。

7. 发明申请

WO2008062371A3 INTEGRATED DOHERTY TYPE AMPLIFIER ARRANGEMENT WITH HIGH POWER EFFICIENCY 审中-公开
标题翻译：具有高功率效率的集成式多频率型放大器布置
公开(公告)号：WO2008062371A3
公开(公告)日：2008-12-18
申请号：PCT/IB2007054732
申请日：2007-11-21
申请人： NXP BV , BLEDNOV IGOR
发明人： BLEDNOV IGOR
IPC分类号： H03F1/07
CPC分类号： H03F1/0288 , H03F3/195
摘要： The present invention shows a Doherty type of amplifier arrangement comprising a plurality of parallel unit cells. Each unit cell is of relatively low power. Suitably it comprises a compensation circuit at the input of the main amplifier and peak amplifier stage.
摘要翻译：本发明示出了包括多个并联单元单元的多尔蒂型放大器装置。每个单位电池的功率相对较低。它适合在主放大器和峰值放大器的输入端包含一个补偿电路。

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