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1. 发明申请

WO2009014574A1 TAMPER-EVIDENT CONNECTOR 审中-公开
标题翻译：防篡改连接器
公开(公告)号：WO2009014574A1
公开(公告)日：2009-01-29
申请号：PCT/US2008/006575
申请日：2008-05-21
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , NGUYEN, Vincent , HUA, Chanh V. , NGUYEN, Minh H. , NEUFELD, E. D.
发明人： NGUYEN, Vincent , HUA, Chanh V. , NGUYEN, Minh H. , NEUFELD, E. D.
IPC分类号： H01R13/639
CPC分类号： H01R13/6397 , H01R12/52 , H01R13/6275 , H01R24/62
摘要： Embodiments of a tamper-evident connector (200 or 300) are disclosed which may optionally be used in a trusted computing environment. In an exemplary embodiment, a tamper-evident connection includes a mate-once engaging assembly (310) for providing with a first component (320), the mate-once engaging assembly (310) including a foldable portion (315a). The tamper-evident connection also includes a receiving chamber (330) for providing with a second component (340), the mate-once engaging assembly (310) fitting in the receiving chamber (330) to physically secure the first component (320) to the second component (340), the foldable portion (315a) of the mate-once engaging assembly (310) unfolding during removal of the mate-once engaging assembly (310) from the receiving chamber (330) to provide evidence of tampering when the first component (310) has been removed from the second component (340). Optionally, the first component is a Trusted Platform Module (TPM) (165) and the second component is a system board (105).
摘要翻译：公开了可以在可信计算环境中使用的显窃启连接器（200或300）的实施例。在示例性实施例中，防窃启连接包括用于提供第一部件（320）的配合接合组件（310），该配合接合组件（310）包括可折叠部分（315a）。防窃启连接还包括用于提供第二部件（340）的接收室（330），配合在接收室（330）中的配合接合组件（310）以物理地将第一部件（320）固定到所述第二部件（340），所述配合接合组件（310）的可折叠部分（315a）在从所述接收室（330）移除所述配合接合组件（310）期间展开，以提供篡改的证据第一部件（310）已经从第二部件（340）移除。可选地，第一组件是可信平台模块（TPM）（165），第二组件是系统板（105）。

2. 发明申请

WO2010050940A1 COMPONENT INSTALLATION GUIDANCE 审中-公开
标题翻译：组件安装指导
公开(公告)号：WO2010050940A1
公开(公告)日：2010-05-06
申请号：PCT/US2008/081631
申请日：2008-10-29
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , HUA, Chanh, V. , NGUYEN, Vincent , NGUYEN, Binh
发明人： HUA, Chanh, V. , NGUYEN, Vincent , NGUYEN, Binh
IPC分类号： G06F11/32 , G06F11/30 , G06F9/06
CPC分类号： G06F11/321
摘要： In accordance with embodiments, a system includes a plurality of component slots and at least one indicator associated with each of said slots. The system also includes a controller coupled to the indicators. The indicators selectively provide installation guidance of components into said slots based on signals from the controller.
摘要翻译：根据实施例，系统包括多个组件槽和与每个所述槽相关联的至少一个指示器。该系统还包括耦合到指示器的控制器。指示器基于来自控制器的信号选择性地提供组件到所述时隙中的安装指导。

3. 发明申请

WO2013126053A1 MULTIPLEXER FOR SIGNALS ACCORDING TO DIFFERENT PROTOCOLS 审中-公开
标题翻译：用于不同协议的信号的多路复用器
公开(公告)号：WO2013126053A1
公开(公告)日：2013-08-29
申请号：PCT/US2012/026066
申请日：2012-02-22
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , NGUYEN, Vincent
发明人： NGUYEN, Vincent
IPC分类号： G06F13/14 , G06F13/42
CPC分类号： G06F13/287 , G06F13/4022 , G06F13/4072 , G06F2213/2804 , G06F2213/4004
摘要： A multi-protocol multiplexer provides signals according to different protocols for accessing a storage subsystem to a connector, where the signals according to a first protocol are to be routed over a first subset of channels of an interconnect to the storage subsystem, and the signals according to a second protocol are routed over a second subset of channels of the interconnect.
摘要翻译：多协议多路复用器根据不同协议提供信号以访问存储子系统到连接器，其中根据第一协议的信号将通过互连的第一子信道路由到存储子系统，并且根据到第二协议被路由在互连的信道的第二子集上。

4. 发明申请

WO2013165347A1 ADDRESS TRANSLATION GASKET 审中-公开
标题翻译：地址翻译垫
公开(公告)号：WO2013165347A1
公开(公告)日：2013-11-07
申请号：PCT/US2012/035776
申请日：2012-04-30
申请人： HEWLETT PACKARD DEVELOPMENT COMPANY, L.P. , LESARTRE, Gregg , NGUYEN, Vincent , KNEBEL, Patrick
发明人： LESARTRE, Gregg , NGUYEN, Vincent , KNEBEL, Patrick
IPC分类号： G06F15/80 , G06F12/02
CPC分类号： G06F12/06 , G06F12/0284 , G06F12/0292 , G06F12/145 , G06F2212/251
摘要： An example processor includes a plurality of processor core components, a memory interface component, and an address translation gasket. Each processor core component is assigned to one of a plurality of system images, and the plurality of system images share a common memory component by at least utilizing the address translation gasket to maintain separation between memory regions assigned to each of the plurality of system images. The memory interface component is shared by the plurality of independent system images. The address translation gasket is configured to intercept transactions bound for the memory interface component comprising a system image identifier and a target address, generate a translation address based at least in part on the system identifier and the target address, and send the translation address to the memory interface component.
摘要翻译：示例处理器包括多个处理器核心部件，存储器接口部件和地址转换垫圈。每个处理器核心组件被分配给多个系统图像中的一个，并且多个系统图像通过至少利用地址转换垫圈来保持分配给多个系统图像中的每一个的存储器区域之间的分离来共享公共存储器组件。存储器接口组件由多个独立系统映像共享。地址翻译垫圈被配置为截取包括系统图像标识符和目标地址的存储器接口部件绑定的事务，至少部分地基于系统标识符和目标地址生成翻译地址，并将翻译地址发送到内存接口组件。

5. 发明申请

WO2011014158A1 METHOD AND SYSTEM FOR POWER-EFFICIENT AND NON-SIGNAL-DEGRADING VOLTAGE REGULATION IN MEMORY SUBSYSTEMS 审中-公开
标题翻译：存储器件中功率有效和非信号降低电压调节的方法和系统
公开(公告)号：WO2011014158A1
公开(公告)日：2011-02-03
申请号：PCT/US2009/051875
申请日：2009-07-27
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , BACCHUS, Reza, M. , NGUYEN, Vincent , BENEDICT, Melvin, K.
发明人： BACCHUS, Reza, M. , NGUYEN, Vincent , BENEDICT, Melvin, K.
IPC分类号： G06F1/26 , G06F1/32 , G06F13/16 , G06F13/14 , G06F12/00
CPC分类号： G11C5/04 , G06F1/3225 , G11C5/147
摘要： Embodiments of the present invention are directed to a memory subsystem comprising a memory controller, multiple memory modules interconnected with the memory controller by one or more communications media, each memory module comprising a substrate to which multiple memory chips are mounted and electronically connected to the communications media, and a power-supply signal routed to two or more voltage regulators within the memory subsystem from a system power supply, the voltage regulators outputting two or more internal power signals, each power signal providing a different, regulated voltage, which are routed to each of the memory chips. Another embodiment of the present invention is directed to a memory module comprising a substrate to which multiple memory chips are mounted and two or more voltage regulators mounted to, or fabricated within, the substrate.
摘要翻译：本发明的实施例涉及一种存储器子系统，其包括存储器控制器，通过一个或多个通信介质与存储器控制器互连的多个存储器模块，每个存储器模块包括衬底，多个存储器芯片被安装到该衬底上并且电连接到通信介质和从系统电源路由到存储器子系统内的两个或更多个稳压器的电源信号，电压调节器输出两个或多个内部功率信号，每个功率信号提供不同的调节电压，其被路由到每个内存芯片。本发明的另一个实施例涉及一种存储器模块，其包括安装多个存储器芯片的衬底和安装到衬底上或在衬底内制造的两个或更多个稳压器。

6. 发明申请

WO2009017538A2 CENTRALIZED SERVER RACK MANAGEMENT USING USB 审中-公开
标题翻译：使用USB集中式服务器机架管理
公开(公告)号：WO2009017538A2
公开(公告)日：2009-02-05
申请号：PCT/US2008/007406
申请日：2008-06-13
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , NGUYEN, Vincent
发明人： NGUYEN, Vincent
IPC分类号： G06F15/00 , G06F15/16
CPC分类号： G06F3/0653 , G06F3/0605 , G06F3/067
摘要： A multi-server computing system includes a plurality of server modules (S1-Sn) mounted in an enclosure; each server has a universal serial bus (USB) interface (204). An enclosure onboard administration (OA) module (200) is also mounted in the enclosure and has an addressable communication interface (230) for connection to a remote management system (220) and a USB interface (202) connected to each of the plurality of servers. The USB interface of the enclosure OA operates as a master and the USB interface of each of the plurality of servers acts as a slave to the enclosure OA, such that each of the server modules can be managed by the remote management system using a single communication address.
摘要翻译：多服务器计算系统包括安装在外壳中的多个服务器模块（S1-Sn）每个服务器具有通用串行总线（USB）接口（204）。机箱机载管理（OA）模块（200）也安装在机箱中并且具有用于连接到远程管理系统（220）的可寻址通信接口（230）和连接到多个远程管理系统（220）中的每一个的USB接口服务器。机柜OA的USB接口用作主机，并且多个服务器中的每一个的USB接口充当机柜OA的从机，使得每个服务器模块可以由远程管理系统使用单个通信来管理地址。

7. 发明申请

WO2013165349A1 PROCESSOR PROVIDING MULTIPLE SYSTEM IMAGES 审中-公开
标题翻译：处理器提供多个系统图像
公开(公告)号：WO2013165349A1
公开(公告)日：2013-11-07
申请号：PCT/US2012/035782
申请日：2012-04-30
申请人： HEWLETT PACKARD DEVELOPMENT COMPANY, L.P. , LESARTRE, Gregg , NGUYEN, Vincent , KNEBEL, Patrick
发明人： LESARTRE, Gregg , NGUYEN, Vincent , KNEBEL, Patrick
IPC分类号： G06F15/80 , G06F9/46
CPC分类号： G06F9/4403 , G06F9/44505 , G06F9/45541 , G06F9/45558 , G06F9/5077 , G06F2009/45579 , Y02D10/22 , Y02D10/36
摘要： An example processor includes a plurality of processing core components, one or more memory interface components, and a management component, wherein the one or more memory interface components are each shared by the plurality of processing core components, and wherein the management component is configured to assign each of the plurality of processing core components to one of a plurality of system images.
摘要翻译：示例性处理器包括多个处理核心组件，一个或多个存储器接口组件和管理组件，其中所述一个或多个存储器接口组件各自由所述多个处理核心组件共享，并且其中所述管理组件被配置为将多个处理核心组件中的每一个分配给多个系统映像之一。

8. 发明申请

WO2016080973A1 A RESISTIVE RANDOM-ACCESS MEMORY IN PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板中的电阻随机存取存储器
公开(公告)号：WO2016080973A1
公开(公告)日：2016-05-26
申请号：PCT/US2014/066292
申请日：2014-11-19
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
发明人： GE, Ning , NGUYEN, Vincent , YANG, Jianhua , HUA, Chanh , WARNES, Lidia , FUJII, David B.
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： H01L27/2463 , G11C2213/77 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/16 , H01L45/1608 , H05K1/16 , H05K1/167 , H05K3/061 , H05K3/4685 , H05K2201/10159
摘要： Provided in one example is an article. The article including: a first electrode; a switching layer disposed over at least a portion of the first electrode, the switching layer including a metal oxide; and a second electrode disposed over at least a portion of the switching layer. The first electrode, the switching layer, and the second electrode are parts of a resistive random-access memory, and one or both of the first electrode and the second electrode is a part of a layer of a printed circuit board.
摘要翻译：在一个例子中提供了一篇文章。该物品包括：第一电极; 开关层，设置在所述第一电极的至少一部分上，所述开关层包括金属氧化物; 以及设置在所述开关层的至少一部分上的第二电极。第一电极，开关层和第二电极是电阻随机存取存储器的一部分，第一电极和第二电极中的一个或两个是印刷电路板的一部分。

9. 发明申请

WO2016018407A1 MOUNTING ASSEMBLY 审中-公开
标题翻译：安装总成
公开(公告)号：WO2016018407A1
公开(公告)日：2016-02-04
申请号：PCT/US2014/049277
申请日：2014-07-31
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
发明人： MOORE, Earl W. , NGUYEN, Vincent
IPC分类号： G06F1/18
CPC分类号： G06F1/187 , A47B88/49 , G11B33/005
摘要： An example mounting assembly is provided herein. The mounting assembly includes a first cage, a second cage, a rail member, a rigid cable member, a latch member, and a lock mechanism. The rail member to move the first cage and the second cage between an installed position, an access position, and a transitional position. The rigid cable member to move with the first cage and the second cage along the rail member. The latch member to retain the first cage and the second cage in the installed position. The lock mechanism to hold the second cage in the access position.
摘要翻译：本文提供了示例性安装组件。安装组件包括第一保持架，第二保持架，轨道构件，刚性电缆构件，闩锁构件和锁定机构。轨道构件将第一笼和第二笼移动到安装位置，进入位置和过渡位置之间。刚性电缆构件沿着导轨构件与第一保持架和第二保持架一起移动。闩锁构件将第一保持架和第二保持架保持在安装位置。锁定机构将第二个笼子保持在通道位置。

10. 发明申请

WO2015152895A1 PROVIDING BACKUP POWER 审中-公开
标题翻译：提供备份电源
公开(公告)号：WO2015152895A1
公开(公告)日：2015-10-08
申请号：PCT/US2014/032480
申请日：2014-04-01
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
发明人： NGUYEN, Vincent , WANG, Han , RAYMOND, Patrick , VENUGOPAL, Raghavan V.
IPC分类号： G06F1/26
CPC分类号： G06F3/0625 , G06F1/266 , G06F3/0655 , G06F3/0688 , G11C14/0018 , G11C16/30
摘要： A technique for providing backup power can include determining a backup power demand of at least two nodes on a chassis, each node supporting multiple loads. A technique for providing backup power can include selectively enabling an output of power from a battery module to the at least two nodes.
摘要翻译：提供备用电力的技术可以包括确定底盘上的至少两个节点的备用电力需求，每个节点支持多个负载。用于提供备用电力的技术可以包括选择性地实现从电池模块到至少两个节点的电力输出。

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